)]}'
{
  "commit": "b2f8240153fb762e23dfc3dd1b042c299b3e265b",
  "tree": "1c6c8c679f2410c541d16adef879f384fe61bb88",
  "parents": [
    "6af88ccfcbdce7a28ba45b1884d69a579e54e00c",
    "1cbdfcfd08c4f47b8019c4f34a2c87fe6c444a31",
    "9abc1eb62aa15546f5da5f39ce08f27f721a6d0b",
    "e0b255df027e9745ec4c21dd08e333e46c03556c",
    "0c159634c9a0c8836948893cfc27586ef2b73696",
    "53454b7a4104786a7902603727140c276f325738"
  ],
  "author": {
    "name": "Stephen Boyd",
    "email": "sboyd@kernel.org",
    "time": "Mon Nov 18 20:00:28 2024 -0800"
  },
  "committer": {
    "name": "Stephen Boyd",
    "email": "sboyd@kernel.org",
    "time": "Mon Nov 18 20:00:28 2024 -0800"
  },
  "message": "Merge branches \u0027clk-mobileye\u0027, \u0027clk-twl\u0027, \u0027clk-nuvoton\u0027, \u0027clk-renesas\u0027 and \u0027clk-bindings\u0027 into clk-next\n\n - Mobileye EyeQ5, EyeQ6L and EyeQ6H clk driver\n - TWL6030 clk driver\n - Nuvoton Arbel BMC NPCM8XX SoC clks\n - Convert more clk bindings to YAML\n\n* clk-mobileye:\n  clk: eyeq: add EyeQ6H west fixed factor clocks\n  clk: eyeq: add EyeQ6H central fixed factor clocks\n  clk: eyeq: add EyeQ5 fixed factor clocks\n  clk: eyeq: add fixed factor clocks infrastructure\n  clk: eyeq: require clock index with phandle in all cases\n  clk: fixed-factor: add clk_hw_register_fixed_factor_index() function\n  dt-bindings: clock: eyeq: add more Mobileye EyeQ5/EyeQ6H clocks\n  dt-bindings: soc: mobileye: set `#clock-cells \u003d \u003c1\u003e` for all compatibles\n  clk: eyeq: add driver\n  clk: divider: Introduce CLK_DIVIDER_EVEN_INTEGERS flag\n  dt-bindings: clock: add Mobileye EyeQ6L/EyeQ6H clock indexes\n  Revert \"dt-bindings: clock: mobileye,eyeq5-clk: add bindings\"\n\n* clk-twl:\n  clk: twl: add TWL6030 support\n  clk: twl: remove is_prepared\n\n* clk-nuvoton:\n  clk: npcm8xx: add clock controller\n  reset: npcm: register npcm8xx clock auxiliary bus device\n  dt-bindings: reset: npcm: add clock properties\n\n* clk-renesas:\n  clk: renesas: vbattb: Add VBATTB clock driver\n  clk: Add devm_clk_hw_register_gate_parent_hw()\n  clk: renesas: rzg2l: Fix FOUTPOSTDIV clk\n  dt-bindings: clock: renesas,r9a08g045-vbattb: Document VBATTB\n  clk: renesas: r9a08g045: Add power domain for RTC\n  clk: renesas: r9a08g045: Mark the watchdog and always-on PM domains as IRQ safe\n  clk: renesas: rzg2l-cpg: Use GENPD_FLAG_* flags instead of local ones\n  clk: renesas: rzg2l-cpg: Move PM domain power on in rzg2l_cpg_pd_setup()\n  dt-bindings: clock: r9a08g045-cpg: Add power domain ID for RTC\n  clk: renesas: r8a779h0: Drop CLK_PLL2_DIV2 to clarify ZCn clocks\n  clk: renesas: r9a09g057: Add clock and reset entries for ICU\n  clk: renesas: r9a09g057: Add CA55 core clocks\n  clk: renesas: Remove duplicate and trailing empty lines\n\n* clk-bindings:\n  dt-bindings: clock: actions,owl-cmu: convert to YAML\n  dt-bindings: clock: ti: Convert mux.txt to json-schema\n  dt-bindings: clock: ti: Convert divider.txt to json-schema\n  dt-bindings: clock: ti: Convert interface.txt to json-schema\n  dt-bindings: clock: convert rockchip,rk3328-cru.txt to YAML\n",
  "tree_diff": []
}