ARM: dts: aspeed: Fix hwrng register address
The register address should be the full address of the rng, not the
offset from the start of the SCU.
OpenBMC-Staging-Count: 1
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index 9354ac9..4b2f5fb 100644
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -122,9 +122,9 @@
};
};
- rng: hwrng@78 {
+ rng: hwrng@1e6e2078 {
compatible = "timeriomem_rng";
- reg = <0x78 0x4>;
+ reg = <0x1e6e2078 0x4>;
period = <1>;
quality = <100>;
};
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index f7c33fb..622e69e 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -163,9 +163,9 @@
};
};
- rng: hwrng@78 {
+ rng: hwrng@1e6e2078 {
compatible = "timeriomem_rng";
- reg = <0x78 0x4>;
+ reg = <0x1e6e2078 0x4>;
period = <1>;
quality = <100>;
};
