u-boot-nuvoton: cherry pick patch to clear GPIO events

If the GPIO events are enabled during a reboot, it can panic the kernel.

Tested: Used u-boot console to perform the equivalent memory writes and
recovered a failing machine.

Fusion-Link: n/a, only affects NPCM8xx platforms
Origin-Uri: https://github.com/Nuvoton-Israel/u-boot/commit/1f3277216735d851150b93e8e6337e887268c9e0
Google-Bug-Id: 371446645
Google-Bug-Id: 370982152
Change-Id: I09b8c71904b8b5338847d2bdb92c9a87cabd0ea5
Signed-off-by: Benjamin Fair <benjaminfair@google.com>
diff --git a/dynamic-layers/nuvoton-layer/recipes-bsp/u-boot/u-boot-nuvoton/0001-pinctrl-npcm8xx-clear-all-gpio-events.patch b/dynamic-layers/nuvoton-layer/recipes-bsp/u-boot/u-boot-nuvoton/0001-pinctrl-npcm8xx-clear-all-gpio-events.patch
new file mode 100644
index 0000000..ce3cdf1
--- /dev/null
+++ b/dynamic-layers/nuvoton-layer/recipes-bsp/u-boot/u-boot-nuvoton/0001-pinctrl-npcm8xx-clear-all-gpio-events.patch
@@ -0,0 +1,66 @@
+From 1f3277216735d851150b93e8e6337e887268c9e0 Mon Sep 17 00:00:00 2001
+From: Stanley Chu <yschu@nuvoton.com>
+Date: Fri, 9 Aug 2024 10:47:51 +0800
+Subject: [PATCH] pinctrl: npcm8xx: clear all gpio events
+
+Clear all gpio events to avoid unexpected interrupts
+during kernel booting.
+
+Signed-off-by: Stanley Chu <yschu@nuvoton.com>
+
+Patch Tracking Bug: b/372124027
+Upstream info / review: https://github.com/Nuvoton-Israel/u-boot/commit/1f3277216735d851150b93e8e6337e887268c9e0
+Upstream-Status: Accepted
+Justification: Present in the Nuvoton u-boot repo. Will get the patch
+  after we bump the u-boot SRCREV
+
+---
+ drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 18 ++++++++++++++++++
+ 1 file changed, 18 insertions(+)
+
+diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c
+index ff49819b58..67e564f85c 100644
+--- a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c
++++ b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c
+@@ -48,6 +48,7 @@
+ #define GPIO_OES	0x70 /* Output Enable Set */
+ #define GPIO_OEC	0x74 /* Output Enable Clear */
+ 
++#define NPCM8XX_NUM_GPIO_BANK	8
+ #define NPCM8XX_GPIO_PER_BANK	32
+ #define GPIOX_OFFSET	16
+ 
+@@ -967,6 +968,18 @@ static int npcm8xx_pinconf_set(struct udevice *dev, unsigned int selector,
+ }
+ #endif
+ 
++static void npcm8xx_pinctrl_clear_events(struct npcm8xx_pinctrl_priv *priv)
++{
++	void __iomem *base;
++	int i;
++
++	for (i = 0; i < NPCM8XX_NUM_GPIO_BANK; i++) {
++		base = priv->gpio_base + (0x1000 * i);
++		clrbits_le32(base + GPIO_EVEN, 0xFFFFFFFF);
++		setbits_le32(base + GPIO_EVST, 0xFFFFFFFF);
++	}
++}
++
+ static struct pinctrl_ops npcm8xx_pinctrl_ops = {
+ 	.set_state	= pinctrl_generic_set_state,
+ 	.get_pins_count = npcm8xx_get_pins_count,
+@@ -1001,6 +1014,11 @@ static int npcm8xx_pinctrl_probe(struct udevice *dev)
+ 	if (IS_ERR(priv->rst_regmap))
+ 		return -EINVAL;
+ 
++	/*
++	 * Clear all previous gpio events, otherwise it may produce
++	 * unexpected interrupts during kernel booting.
++	 */
++	npcm8xx_pinctrl_clear_events(priv);
+ 	return 0;
+ }
+ 
+-- 
+2.47.0.rc0.187.ge670bccf7e-goog
+
diff --git a/dynamic-layers/nuvoton-layer/recipes-bsp/u-boot/u-boot-nuvoton_%.bbappend b/dynamic-layers/nuvoton-layer/recipes-bsp/u-boot/u-boot-nuvoton_%.bbappend
new file mode 100644
index 0000000..1396f34
--- /dev/null
+++ b/dynamic-layers/nuvoton-layer/recipes-bsp/u-boot/u-boot-nuvoton_%.bbappend
@@ -0,0 +1,3 @@
+FILESEXTRAPATHS:prepend:gbmc:npcm8xx := "${THISDIR}/${PN}:"
+
+SRC_URI:append:gbmc:npcm8xx = " file://0001-pinctrl-npcm8xx-clear-all-gpio-events.patch"