)]}'
{
  "commit": "f99a52efcb21c07a68b525cb7919cf2d13041f71",
  "tree": "07a289a0a8e7b541cc5034495051a156cb1cd9a8",
  "parents": [
    "0707383a33e31029bd4ebf9a40c93a9c3642daa9"
  ],
  "author": {
    "name": "William A. Kennington III",
    "email": "wak@google.com",
    "time": "Thu Sep 24 07:52:32 2026 +0000"
  },
  "committer": {
    "name": "William Kennington",
    "email": "wak@google.com",
    "time": "Fri Sep 25 09:46:13 2026 -0700"
  },
  "message": "linux-gbmc: Add RoT mailbox backoff to everspin\n\nWhen writing to the 64KB RAM-backed RoT mailbox region on Google\nHoth/Dauntless SPI NOR parts (at 0x700000 on 32MB hothb2-512 parts, or\nthe top 64KB on 64MB/128MB parts), the RoT intercepts the write and\nholds the flash busy (SR_WIP) for several milliseconds while processing\nthe mailbox command. Tight status register polling in\nspi_nor_wait_till_ready causes excessive SPI bus traffic and CPU usage.\n\nOverride the MTD _write callback in everspin.c so that status polling on\npages within the 64KB mailbox region uses an exponential backoff sleep\n(250us doubling up to 20ms), while non-mailbox flash writes continue\nusing standard spi_nor_wait_till_ready() without backoff delay.\n\nTested: Verified on hardware that hothd mailbox transactions complete\nwith minimal SPI transfers instead of thousands of tight SR polls, while\nnon-mailbox flash operations remain unaffected.\nFusion-Link: fusion2 N/A\n\nGoogle-Bug-Id: 565629335\nChange-Id: I17eb681995d38bbcdf4d6015159cb2d9f5eeb13d\nSigned-off-by: William A. Kennington III \u003cwak@google.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "ae815af535cad6da4301e84a8d2c76e37681003d",
      "old_mode": 33188,
      "old_path": "recipes-kernel/linux/files/linux-gbmc/drivers/mtd/spi-nor/everspin.c",
      "new_id": "58afbbd683be953c132a170f018041484535e1d2",
      "new_mode": 33188,
      "new_path": "recipes-kernel/linux/files/linux-gbmc/drivers/mtd/spi-nor/everspin.c"
    }
  ]
}