)]}' { "log": [ { "commit": "ece349ade2973e220f524ce59e59711cc919263f", "tree": "e7d369204ca1514150960c9a1c266d84c863561b", "parents": [ "18761722e67d6e3770ab296a04fe3d40022e76d2" ], "author": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Mon Jul 06 17:50:43 2026 -0600" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Mon Jul 06 17:50:43 2026 -0600" }, "message": "Prepare v2026.07\n\nSigned-off-by: Tom Rini \u003ctrini@konsulko.com\u003e\n" }, { "commit": "18761722e67d6e3770ab296a04fe3d40022e76d2", "tree": "e544dae54d83d5d3524e527c435be0395efe3a17", "parents": [ "a25c9bd19215ddd95d7494ebf8d842c46fdf3ba8", "91b94aff149d2c6efe3afa81adaf5edcc6119221" ], "author": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Mon Jul 06 08:12:19 2026 -0600" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Mon Jul 06 08:28:51 2026 -0600" }, "message": "Merge patch series \"Remove patman from the U-Boot tree\"\n\nSimon Glass \u003csjg@chromium.org\u003e says:\n\npatman is now maintained as a standalone \u0027patch-manager\u0027 package, so\nremove it from the tree. The command becomes a stub that tells people to\nrun \u0027pip install patch-manager\u0027.\n\nbuildman still imports the shared modules commit and patchstream (along\nwith their dependencies), so this series leaves those in place. It drops\nthe tool\u0027s code, tests, CI hooks and packaging, and removes the in-tree\ndocumentation, moving the b4 contributor guide alongside the patman note\nin the patch-sending docs. It also adds a .patman-defaults file so the external\ntool is set up for U-Boot, next to the existing .b4-config. Where the CI\njobs relied on patman\u0027s requirements for the setuptools that pylibfdt\nneeds, they now install scripts/dtc/pylibfdt/requirements.txt instead.\n\nMore could be done here: commit and patchstream (and their dependencies\nseries, get_maintainer and settings) only remain because buildman still\nimports them. A follow-up could move those into u_boot_pylib (or\nbuildman itself) and drop the rest, leaving tools/patman as just the\nstub.\n\nLink: https://lore.kernel.org/r/20260705193251.2190705-1-sjg@chromium.org\n" }, { "commit": "91b94aff149d2c6efe3afa81adaf5edcc6119221", "tree": "6491652282df172ec313e8d767c0b86b867052a6", "parents": [ "f7a4848a9ca37add093628a3f60fb79201eb5fe6" ], "author": { "name": "Simon Glass", "email": "sjg@chromium.org", "time": "Sun Jul 05 13:32:17 2026 -0600" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Mon Jul 06 08:28:51 2026 -0600" }, "message": "patman: Remove the patch-management code\n\nDelete the command-line tool and its supporting modules, now that this\nfunctionality lives in the standalone patch-manager package.\n\nKeep the modules that buildman still imports (commit and patchstream,\nplus their dependencies series, get_maintainer and settings), along with\nthe stub command. Trim __init__.py to match.\n\nSigned-off-by: Simon Glass \u003csjg@chromium.org\u003e\n" }, { "commit": "f7a4848a9ca37add093628a3f60fb79201eb5fe6", "tree": "f79b77b98b385188e8b563faaa58f0923563e90e", "parents": [ "f2cf4315339271d48b40628c04c25be24c231a4f" ], "author": { "name": "Simon Glass", "email": "sjg@chromium.org", "time": "Sun Jul 05 13:32:16 2026 -0600" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Mon Jul 06 08:28:51 2026 -0600" }, "message": "patman: Remove the test suite\n\nThese tests cover the patch-management functionality, which is being\nremoved from the tree in favour of the standalone patch-manager package.\nDrop the tests and their data files.\n\nSigned-off-by: Simon Glass \u003csjg@chromium.org\u003e\n" }, { "commit": "f2cf4315339271d48b40628c04c25be24c231a4f", "tree": "c32bcbc68765624bb7196276abe00c28c384e30c", "parents": [ "a24a86b547700359e46b4ae87731985661fe3334" ], "author": { "name": "Simon Glass", "email": "sjg@chromium.org", "time": "Sun Jul 05 13:32:15 2026 -0600" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Mon Jul 06 08:28:51 2026 -0600" }, "message": "patman: Replace the tool with a stub for patch-manager\n\npatman is now maintained as a standalone \u0027patch-manager\u0027 package, rather\nthan in the U-Boot tree. Replace the command with a small stub which\ntells people how to install it.\n\nbuildman still uses the shared modules commit and patchstream (and their\ndependencies), so leave those in place; the patches that follow remove\nthe patch-management code itself.\n\nSigned-off-by: Simon Glass \u003csjg@chromium.org\u003e\n" }, { "commit": "a24a86b547700359e46b4ae87731985661fe3334", "tree": "97dbd931b801f944f81eb6a16b9968a22c91ff00", "parents": [ "c8db1555251aada7478f4fbad7e643bed02a8cbe" ], "author": { "name": "Simon Glass", "email": "sjg@chromium.org", "time": "Sun Jul 05 13:32:14 2026 -0600" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Mon Jul 06 08:28:51 2026 -0600" }, "message": "patman: Add a .patman-defaults file for U-Boot\n\npatman is now installed from the separate patch-manager package. It reads\na .patman-defaults file from the tree root as its lowest-priority config,\nso a project can ship defaults that developers still override from their\nown ~/.patman, a local .patman or the command line. This behaviour is new\nin patman version 0.0.20\n\nAdd one for U-Boot, alongside .b4-config, pinning the patchwork server and\nthe get_maintainer.pl invocation so the tool works out of the box without\ndepending on patman\u0027s built-in defaults. A few other settings are listed,\ncommented out, as a starting point.\n\nSigned-off-by: Simon Glass \u003csjg@chromium.org\u003e\nReviewed-by: Tom Rini \u003ctrini@konsulko.com\u003e\n" }, { "commit": "c8db1555251aada7478f4fbad7e643bed02a8cbe", "tree": "abba6af36c4c91ef963a1bdb2f27564bf9f3f2d9", "parents": [ "c2f2085b1540146fd2a229342366622d1970cd90" ], "author": { "name": "Simon Glass", "email": "sjg@chromium.org", "time": "Sun Jul 05 13:32:22 2026 -0600" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Mon Jul 06 08:28:51 2026 -0600" }, "message": "test: Stop running the patman tests\n\nThe patman tests no longer exist in the tree, so drop them from the\ntest/run script (used by \u0027make tcheck\u0027 and friends) and from the\ntools-testing example in the documentation.\n\nSigned-off-by: Simon Glass \u003csjg@chromium.org\u003e\n" }, { "commit": "c2f2085b1540146fd2a229342366622d1970cd90", "tree": "37ad96851f07305e35ee921694f18ddb87d33b71", "parents": [ "5c2d490539e9c15e863d5d8e476467724c60f87b" ], "author": { "name": "Simon Glass", "email": "sjg@chromium.org", "time": "Sun Jul 05 13:32:21 2026 -0600" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Mon Jul 06 08:28:50 2026 -0600" }, "message": "tools: Stop packaging patman as a pip module\n\npatman is no longer shipped from the U-Boot tree, so drop it from the\n\u0027make pip\u0027 target and from make_pip.sh, and remove its packaging files\n(setup.py, pyproject.toml, requirements.txt). Nothing else refers to\nthem by this point in the series, so they can go.\n\nAlso fix binman\u0027s pyproject.toml, which declares package-data for a\n\u0027patman\u0027 package (a copy-paste leftover); use \u0027binman\u0027 instead.\n\nSigned-off-by: Simon Glass \u003csjg@chromium.org\u003e\n" }, { "commit": "5c2d490539e9c15e863d5d8e476467724c60f87b", "tree": "354cc91d2ad0bbc9e83b710d3c416729c6baf821", "parents": [ "bb74c34fd6439463827db07d0198457f1202ada0" ], "author": { "name": "Simon Glass", "email": "sjg@chromium.org", "time": "Sun Jul 05 13:32:20 2026 -0600" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Mon Jul 06 08:28:50 2026 -0600" }, "message": "tools: docker: Drop patman from the CI image\n\nThe CI runner image pre-caches pip packages by downloading each tool\u0027s\nrequirements.txt from master. A later patch removes patman\u0027s\nrequirements.txt from the tree, so stop fetching and installing it.\n\nThe same step already installs setuptools explicitly (patman\u0027s\nrequirements list it too), so this needs nothing further.\n\nThis takes effect the next time someone rebuilds the image; the existing\nimage keeps working in the meantime.\n\nSigned-off-by: Simon Glass \u003csjg@chromium.org\u003e\n" }, { "commit": "bb74c34fd6439463827db07d0198457f1202ada0", "tree": "c0f6d816053d396aa95651cff3a1349608e7dda4", "parents": [ "d4e3ef0b0ae95406b5c235c06ae8d4b80efdb6c5" ], "author": { "name": "Simon Glass", "email": "sjg@chromium.org", "time": "Sun Jul 05 13:32:19 2026 -0600" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Mon Jul 06 08:28:50 2026 -0600" }, "message": "CI: Stop building and testing patman\n\npatman is now just a stub, so drop its requirements file and its\n\u0027patman test\u0027 run from the Azure and GitLab pipelines.\n\nSigned-off-by: Simon Glass \u003csjg@chromium.org\u003e\nReviewed-by: Tom Rini \u003ctrini@konsulko.com\u003e\n" }, { "commit": "d4e3ef0b0ae95406b5c235c06ae8d4b80efdb6c5", "tree": "1f368ac0ff346ecf824a12b87793ec21a995251b", "parents": [ "f6c56009f6600ad87336484d258849d2bf36d010" ], "author": { "name": "Simon Glass", "email": "sjg@chromium.org", "time": "Sun Jul 05 13:32:18 2026 -0600" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Mon Jul 06 08:28:50 2026 -0600" }, "message": "CI: Install pylibfdt\u0027s requirements in the tool jobs\n\nThe GitLab and Azure tool-test and pylint jobs build the pylibfdt\nbindings, which need setuptools. That currently comes only from patman\u0027s\nrequirements.txt, which a later patch drops. Install\nscripts/dtc/pylibfdt/requirements.txt in those jobs, the proper source\nfor that dependency, so setuptools survives patman\u0027s removal.\n\nSigned-off-by: Simon Glass \u003csjg@chromium.org\u003e\nReviewed-by: Tom Rini \u003ctrini@konsulko.com\u003e\n" }, { "commit": "f6c56009f6600ad87336484d258849d2bf36d010", "tree": "87e323e2703a19722d2242810fb828431a5d6079", "parents": [ "08183ba1af1953c1a4dcdea94d1f6d8f4b5254b3" ], "author": { "name": "Simon Glass", "email": "sjg@chromium.org", "time": "Sun Jul 05 13:32:13 2026 -0600" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Mon Jul 06 08:28:50 2026 -0600" }, "message": "doc: Remove the patman documentation\n\nThe full patman manual now lives with the standalone patch-manager\npackage, making the 1000-line copy in the tree redundant.\n\nRemove the in-tree manual, its README and the doc/develop/patman.rst\ntoctree page.\n\nThe sending-patches guide already introduces patman, so point it at the\npatch-manager package instead of the now-dead \u0027:doc:\u0027 cross-reference\nand, with the manual gone, add a couple of lines on how the tool works.\nPoint the SPI howto at that guide too, rather than repeating the install\ndetails.\n\nSigned-off-by: Simon Glass \u003csjg@chromium.org\u003e\nReviewed-by: Tom Rini \u003ctrini@konsulko.com\u003e\nReviewed-by: Mattijs Korpershoek \u003cmkorpershoek@kernel.org\u003e\n" }, { "commit": "08183ba1af1953c1a4dcdea94d1f6d8f4b5254b3", "tree": "ad00348dc00971b9b4ecea87dee3568234f1af32", "parents": [ "780084d7c07f511da4a39b43277c573156ed42e0" ], "author": { "name": "Simon Glass", "email": "sjg@chromium.org", "time": "Sun Jul 05 13:32:12 2026 -0600" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Mon Jul 06 08:28:50 2026 -0600" }, "message": "doc: Move the b4 guide into sending_patches\n\nThe b4 contributor guide sits in the coding-style document, which is an\nodd place for it. Move it into sending_patches.rst, next to the patman\nnote, so both patch-sending tools are described together.\n\nThe b4_contrib label moves with it, so the reference from process.rst\nstill resolves.\n\nSigned-off-by: Simon Glass \u003csjg@chromium.org\u003e\nReviewed-by: Mattijs Korpershoek \u003cmkorpershoek@kernel.org\u003e\nReviewed-by: Tom Rini \u003ctrini@konsulko.com\u003e\n" }, { "commit": "a25c9bd19215ddd95d7494ebf8d842c46fdf3ba8", "tree": "7538965d08232f616a1f021314ce403735abbb82", "parents": [ "780084d7c07f511da4a39b43277c573156ed42e0", "3e0208cc64966b2a5049b3b3c6d64c05a018698f" ], "author": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Mon Jul 06 08:10:22 2026 -0600" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Mon Jul 06 08:10:22 2026 -0600" }, "message": "Merge tag \u0027mmc-for-2026.07\u0027 of https://source.denx.de/u-boot/custodians/u-boot-mmc\n\nCI: https://source.denx.de/u-boot/custodians/u-boot-mmc/-/pipelines/30621\n\n- Fix redundant 1.8V voltage switch on cold boot with UHS card\n- Revert \"mmc: sdhci-cadence: trigger tuning for SD HS mode on SD6HC (v6) PHY\"\n" }, { "commit": "3e0208cc64966b2a5049b3b3c6d64c05a018698f", "tree": "7538965d08232f616a1f021314ce403735abbb82", "parents": [ "aa2561443c88c00abf7a6f1f77f4976392409771" ], "author": { "name": "Tanmay Kathpalia", "email": "tanmay.kathpalia@altera.com", "time": "Sun Jun 28 23:16:15 2026 -0700" }, "committer": { "name": "Peng Fan", "email": "peng.fan@nxp.com", "time": "Mon Jul 06 14:06:27 2026 +0800" }, "message": "Revert \"mmc: sdhci-cadence: trigger tuning for SD HS mode on SD6HC (v6) PHY\"\n\nThis reverts commit b42c67188c14 (\"mmc: sdhci-cadence: trigger tuning\nfor SD HS mode on SD6HC (v6) PHY\").\n\nThe reverted patch introduced several issues:\n\n1. Non-standard tuning trigger: The SD Physical Layer Specification\n only mandates execute_tuning for SDR50 and SDR104 UHS-I modes.\n Triggering tuning for SD High Speed mode is outside the spec and\n is handled via a non-standard set_ios_post callback rather than\n through the established SDHCI framework tuning path.\n\n2. Non-standard device tree property: The patch introduced a new\n \"cdns,sd-hs-tuning\" DT property to opt into SD HS tuning. This\n is not aligned with existing DT bindings and bypasses the standard\n MMC capability negotiation mechanism.\n\n3. Incorrect tunable mode allowlist: The sdhci_cdns6_mode_is_tuned()\n function includes SD_HS, UHS_SDR50, and MMC_HS_400_ES as tunable\n modes. According to the Cadence SD6HC IP User Guide (section 7.5.2,\n Figure 18), tuning is only required for UHS-I SDR104 (SD) and\n HS200 (eMMC). SD High Speed, UHS-I SDR50, and DDR50 only require\n a PHY settings update from the pre-calculation script, not the\n tuning procedure. HS400 transitions through HS200 and reuses its\n tuned DLL value with a partial settings update. HS400ES only\n requires a plain settings update from the calculation script with\n no dependency on HS200 tuning.\n\n4. Tuned state management outside the framework: The patch manually\n tracks tuned DLL state (tuned_mode, tuned_dll_slave_ctrl) and\n restores it across PHY reconfigurations. This duplicates\n responsibility that belongs in the core MMC tuning framework and\n adds unnecessary complexity to the driver.\n\nReverting to realign the driver with the IP documentation and the SD\nPhysical Layer Specification.\n\nSigned-off-by: Tanmay Kathpalia \u003ctanmay.kathpalia@altera.com\u003e\nSigned-off-by: Peng Fan \u003cpeng.fan@nxp.com\u003e\n" }, { "commit": "aa2561443c88c00abf7a6f1f77f4976392409771", "tree": "899edcbbf61294244d3375c9749fd999025b1986", "parents": [ "780084d7c07f511da4a39b43277c573156ed42e0" ], "author": { "name": "Tanmay Kathpalia", "email": "tanmay.kathpalia@altera.com", "time": "Thu May 14 11:54:11 2026 -0700" }, "committer": { "name": "Peng Fan", "email": "peng.fan@nxp.com", "time": "Mon Jul 06 14:06:08 2026 +0800" }, "message": "mmc: sd: fix redundant 1.8V voltage switch on cold boot with UHS card\n\nWhen a UHS card successfully negotiates 1.8V signaling during normal\ninitialization, the host voltage switch is performed as part of the\nACMD41 handshake. Without this fix, the warm-reboot recovery path\nwould fire again immediately after, switching the host voltage a\nsecond time unnecessarily.\n\nAdd a check so the recovery path is only entered when the voltage\nswitch was not already performed during the current initialization\nsession.\n\nFixes: 906ee6785b1c (\"mmc: sd: Handle UHS-I voltage signaling without power cycle\")\nSigned-off-by: Tanmay Kathpalia \u003ctanmay.kathpalia@altera.com\u003e\nSigned-off-by: Peng Fan \u003cpeng.fan@nxp.com\u003e\n" }, { "commit": "780084d7c07f511da4a39b43277c573156ed42e0", "tree": "b80dfe90eb16518306fe571af7057d220734df14", "parents": [ "08028efaaff1aacaa69ada124aae03dbfd16b4b7" ], "author": { "name": "Ilias Apalodimas", "email": "ilias.apalodimas@linaro.org", "time": "Tue Jun 30 17:42:42 2026 +0300" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Fri Jul 03 14:42:50 2026 -0600" }, "message": "MAINTAINERS: Add entry for ARM\n\nSince I\u0027ve added various features in the arm architecture\nsupport and review most of the patches nowadays, add myself\nas a co-maintainer\n\nSigned-off-by: Ilias Apalodimas \u003cilias.apalodimas@linaro.org\u003e\nAcked-by: Neil Armstrong \u003cneil.armstrong@linaro.org\u003e\nReviewed-by: Peter Robinson \u003cpbrobinson@gmail.com\u003e\nReviewed-by: Tom Rini \u003ctrini@konsulko.com\u003e\n" }, { "commit": "08028efaaff1aacaa69ada124aae03dbfd16b4b7", "tree": "6403200c3967d35564b59bfbca3fabc43a124996", "parents": [ "a215eb7dd84e438ed66518714394dec1c4f7ce30" ], "author": { "name": "Neil Armstrong", "email": "neil.armstrong@linaro.org", "time": "Thu Jun 25 17:36:15 2026 +0200" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Fri Jul 03 14:41:14 2026 -0600" }, "message": "treewide: change email links from mailman to patch.msgid.link with message-id\n\nIn preparation of the migration of the mailman mailing-list currently\nhosted on the denx.de infrastructure, migrate the links in the code,\ncomments and documentation to https://patch.msgid.link to be future proof\nand always link to the expected content data and uses the message-id in\nthe URL which will help find the appropriate e-mail in the future.\n\nSigned-off-by: Neil Armstrong \u003cneil.armstrong@linaro.org\u003e\nReviewed-by: Simon Glass \u003csjg@chromium.org\u003e\nReviewed-by: Tom Rini \u003ctrini@konsulko.com\u003e\n" }, { "commit": "a215eb7dd84e438ed66518714394dec1c4f7ce30", "tree": "360888251f2761946af8986d6980c7b34baa8907", "parents": [ "2e184a1f24cb363ea2a4388e8c3e76d65c8bd12b" ], "author": { "name": "Andrew Goodbody", "email": "andrew.goodbody@linaro.org", "time": "Mon Jun 29 18:06:49 2026 +0100" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Fri Jul 03 14:40:49 2026 -0600" }, "message": "Kconfig: Fix grammatical error in help text\n\nFix the incorrect use of \u0027your\u0027 instead of \u0027you are\u0027 and reflow the text\naround it.\n\nFixes: af9e6ad4ab29 (\"board_f: Add new function to allow runtime DTB selection\")\nSigned-off-by: Andrew Goodbody \u003candrew.goodbody@linaro.org\u003e\n" }, { "commit": "2e184a1f24cb363ea2a4388e8c3e76d65c8bd12b", "tree": "07dbef427a5f0a76c4c1b16f6634ff68bcc56b37", "parents": [ "6da1278ee9c9054074950eb352a5bd5b11f2ff7f" ], "author": { "name": "Michal Simek", "email": "michal.simek@amd.com", "time": "Mon Jun 29 17:44:01 2026 +0200" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Fri Jul 03 14:39:45 2026 -0600" }, "message": ".mailmap: Run mailmapper and sync name locations\n\nThe patch is output from\nscripts/mailmapper \u003e tmp; mv tmp .mailmap\nwith moving \u003cswarren@wwwdotorg.org\u003e and \u003cswarren@wwwdotorg.org\u003e to the same\nblock with \"This contributor prefers not to receive mails\" description.\n\nSigned-off-by: Michal Simek \u003cmichal.simek@amd.com\u003e\n" }, { "commit": "6da1278ee9c9054074950eb352a5bd5b11f2ff7f", "tree": "e066d4604924843ed260d7873d4d0b61be56acbc", "parents": [ "a66b6e6b6414cf019fecce5a2ac6010a49341fa0" ], "author": { "name": "Michal Simek", "email": "michal.simek@amd.com", "time": "Mon Jun 29 17:44:00 2026 +0200" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Fri Jul 03 14:37:20 2026 -0600" }, "message": ".mailmap: update e-mail address for Abbarapu Venkatesh Yadav\n\nName and email address has changed but format wasn\u0027t correct. Keep origin\nline which is doing conversion from xilinx.com to amd.com and then have\nconversion from AMD to Qualcomm. Also move name to proper location.\n\nFixes: f21920f7e795 (\".mailmap: update e-mail address for Abbarapu Venkatesh Yadav\")\nSigned-off-by: Michal Simek \u003cmichal.simek@amd.com\u003e\n" }, { "commit": "a66b6e6b6414cf019fecce5a2ac6010a49341fa0", "tree": "eb2bb4e9020a1ead96120df9f93cd11d0041c75d", "parents": [ "c480bbd92b3273ecff5396da9221e7bcb08774ba" ], "author": { "name": "João Marcos Costa", "email": "joaomarcos.costa@bootlin.com", "time": "Thu Jun 25 14:03:44 2026 +0200" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Fri Jul 03 14:37:07 2026 -0600" }, "message": ".mailmap: map old addresses to their up-to-date counterparts\n\nThis essentially maps @free-electrons.com to @bootlin.com addresses.\n\nSigned-off-by: João Marcos Costa \u003cjoaomarcos.costa@bootlin.com\u003e\nReviewed-by: Quentin Schulz \u003cquentin.schulz@cherry.de\u003e\nReviewed-by: Thomas Petazzoni \u003cthomas.petazzoni@bootlin.com\u003e\n" }, { "commit": "c480bbd92b3273ecff5396da9221e7bcb08774ba", "tree": "e93449cf48dc80949df0bf2953da347af217ec00", "parents": [ "f605dcee103c897b6f1a8873549a36949bd4e2a1" ], "author": { "name": "Quentin Schulz", "email": "quentin.schulz@cherry.de", "time": "Fri Jul 03 18:43:32 2026 +0200" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Fri Jul 03 13:45:58 2026 -0600" }, "message": "drivers: sysreset: revert support for args in request\n\nThis reverts:\n- commit e49c84f7bb7b (\"doc: usage: cmd: reset: specify when the -edl\n option is available\")\n- commit 1076feb8a3f9 (\"cmd: boot: fix edl being shown when not\n supported\")\n- commit 63c806ba0e12 (\"qcom_defconfig: enable psci based sysreset\")\n- commit ef06c5d76ff4 (\"cmd: boot: Add \u0027-edl\u0027 option to reset command\n documentation\")\n- commit 32825eaddc37 (\"sysreset: Implement PSCI based reset to EDL mode\n for QCOM SoCs\")\n- commit fcb48b89813b (\"drivers: sysreset: Add sysreset op that can take\n arguments\")\n\nThere was a conflict reverting commit 63c806ba0e12 (\"qcom_defconfig:\nenable psci based sysreset\") due to commit 02ef1859b44f (\"configs:\nResync with savedefconfig\"), but the conflict resolution was trivial.\n\nThe args support for the sysreset uclass contains a logic bug. The first\nsysreset device implementing the request_arg callback will consume the\nargs, not support the specified arg and thus return -EPROTONOSUPPORT\nwhich will stop the iteration over all sysreset devices.\n\nThis is an issue if one has multiple sysreset devices and each with\nsupport for different (valid) args. If a sysreset device implements a\n-dummy argument and another -foo and a user calls reset -dummy from the\nU-Boot CLI, it\u0027ll depend on which sysreset device will be attempted\nfirst. If it is the one implementing -foo, it\u0027ll return it doesn\u0027t\nsupport the argument with -EPROTONOSUPPORT in which case the device\nimplementing -dummy will never be attempted and instead we\u0027ll do a cold\nreset which is very likely not what\u0027s expected from the user.\n\nCasey suggested[1] we revert this and start from scratch again with a\ndifferent implementation instead.\n\n[1] https://lore.kernel.org/u-boot/77ff0f56-5c3b-42e7-bdd1-bf90296da900@linaro.org/\n\nAcked-by: Casey Connolly \u003ccasey.connolly@linaro.org\u003e\nSigned-off-by: Quentin Schulz \u003cquentin.schulz@cherry.de\u003e\n" }, { "commit": "f605dcee103c897b6f1a8873549a36949bd4e2a1", "tree": "31b82b93f0a4331cca8598163276b5f2cb3db123", "parents": [ "a3f393c02cf10f44310c6ddf3dedf354c2e877a0", "e4f83e403ad4f7b6c08ee83378e4887aaa153b1a" ], "author": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Tue Jun 30 09:24:24 2026 -0600" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Tue Jun 30 09:24:24 2026 -0600" }, "message": "Merge tag \u0027qcom-fixes-2026.07\u0027 of https://source.denx.de/u-boot/custodians/u-boot-snapdragon\n\nCI: https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/pipelines/30574\n\nA last minute fix for the release, the UFS controller on the new Milos\nSoC (used in the Fairphone Gen. 6) needs a stub driver for it\u0027s ref\nclock (similar to SM8650 before) and a handful of other clocks to get\nthe UFS controller probed.\n\nThis change shouldn\u0027t impact any other platforms.\n" }, { "commit": "e4f83e403ad4f7b6c08ee83378e4887aaa153b1a", "tree": "31b82b93f0a4331cca8598163276b5f2cb3db123", "parents": [ "5c7ff1b5407199d94ac6ecb5c939ad07cb83e846" ], "author": { "name": "Luca Weiss", "email": "luca.weiss@fairphone.com", "time": "Thu Jun 25 15:14:39 2026 +0200" }, "committer": { "name": "Casey Connolly", "email": "casey.connolly@linaro.org", "time": "Tue Jun 30 13:04:59 2026 +0200" }, "message": "clk/qcom: milos: Add TCSRCC clocks\n\nWith a recent change to the UFS driver, now all clocks need to be\navailable. Add all the clocks from the TCSRCC block on Milos.\n\nSigned-off-by: Luca Weiss \u003cluca.weiss@fairphone.com\u003e\nReviewed-by: Casey Connolly \u003ccasey.connolly@linaro.org\u003e\nLink: https://patch.msgid.link/20260625-milos-ufs-fix-v1-2-b0923dabc35f@fairphone.com\nSigned-off-by: Casey Connolly \u003ccasey.connolly@linaro.org\u003e\n" }, { "commit": "5c7ff1b5407199d94ac6ecb5c939ad07cb83e846", "tree": "252018f7fbd8a6a8e022e31ff74d6cf590fc32b0", "parents": [ "a3f393c02cf10f44310c6ddf3dedf354c2e877a0" ], "author": { "name": "Luca Weiss", "email": "luca.weiss@fairphone.com", "time": "Thu Jun 25 15:14:38 2026 +0200" }, "committer": { "name": "Casey Connolly", "email": "casey.connolly@linaro.org", "time": "Tue Jun 30 13:04:59 2026 +0200" }, "message": "clk/qcom: milos: Add remaining UFS clocks\n\nWith a recent change to the UFS driver, now all clocks need to be\navailable. Add them.\n\nSigned-off-by: Luca Weiss \u003cluca.weiss@fairphone.com\u003e\nReviewed-by: Casey Connolly \u003ccasey.connolly@linaro.org\u003e\nLink: https://patch.msgid.link/20260625-milos-ufs-fix-v1-1-b0923dabc35f@fairphone.com\nSigned-off-by: Casey Connolly \u003ccasey.connolly@linaro.org\u003e\n" }, { "commit": "a3f393c02cf10f44310c6ddf3dedf354c2e877a0", "tree": "9b033e9e2e2433d212a3d8a18e054c2ca93078e4", "parents": [ "6902fb4c17faa375003124c451c2550deab5463d", "9b41032699cf8f7c25c883f7c12edba350fed1d8" ], "author": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Sat Jun 27 14:09:17 2026 -0600" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Sat Jun 27 14:09:17 2026 -0600" }, "message": "Merge tag \u0027u-boot-imx-master-20260627\u0027 of https://gitlab.denx.de/u-boot/custodians/u-boot-imx\n\nCI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/30543\n\n- Fix MAC address representation on i.MX9\n- Fix iMX8MQ PLL\n- Fix SPL trampoline buffer for 1GB DDR on i.MX9\n" }, { "commit": "9b41032699cf8f7c25c883f7c12edba350fed1d8", "tree": "9b033e9e2e2433d212a3d8a18e054c2ca93078e4", "parents": [ "8c051851a5770a3e09e2e7815d963b4a6078407e" ], "author": { "name": "Ye Li", "email": "ye.li@nxp.com", "time": "Fri Jun 26 18:44:49 2026 +0800" }, "committer": { "name": "Fabio Estevam", "email": "festevam@gmail.com", "time": "Sat Jun 27 14:53:01 2026 -0300" }, "message": "clk: imx: imx8mq: Fix iMX8MQ PLL issue\n\nThe fractional PLL used on iMX8MQ is not pll14xx, it is different\nPLL and not exist in u-boot. Add this fractional PLL driver and\nupdate iMX8MQ clock driver to adapt this fraction PLL.\n\nFixes: 11c8ab01f3ed (\"clk: imx8mq: Add a clock driver for the imx8mq\")\nSigned-off-by: Ye Li \u003cye.li@nxp.com\u003e\nReviewed-by: Peng Fan \u003cpeng.fan@nxp.com\u003e\n" }, { "commit": "8c051851a5770a3e09e2e7815d963b4a6078407e", "tree": "374f1aed260f2b435db001ead27624153bcc812c", "parents": [ "3232cd38b4f6700b8512d1115da0135cae466fbc" ], "author": { "name": "Alice Guo", "email": "alice.guo@nxp.com", "time": "Thu Jun 18 09:17:49 2026 +0800" }, "committer": { "name": "Fabio Estevam", "email": "festevam@gmail.com", "time": "Fri Jun 26 16:50:55 2026 -0300" }, "message": "imx9: scmi: use 48-bit MAC add instead of incrementing mac[5]\n\nReplace mac[5] +\u003d offset with a proper 48-bit MAC address add to avoid\noverflow issues when mac[5] was close to 255.\n\nExample:\ni.MX95 MAC2: 00:11:22:33:44:FE + 6\nOld: 00:11:22:33:44:04 (overflow, wraps to 0)\nNew: 00:11:22:33:45:04 (correct carry from mac[5] to mac[4])\n\nSigned-off-by: Alice Guo \u003calice.guo@nxp.com\u003e\nSigned-off-by: Ye Li \u003cye.li@nxp.com\u003e\nReviewed-by: Peng Fan \u003cpeng.fan@nxp.com\u003e\n" }, { "commit": "3232cd38b4f6700b8512d1115da0135cae466fbc", "tree": "f9feacca369049faf7fc74ccf8da59486b7f109c", "parents": [ "5402b5980ee882bcee6cdaca7580e5b36ef99f42" ], "author": { "name": "Peng Fan", "email": "peng.fan@nxp.com", "time": "Thu Jun 18 09:17:48 2026 +0800" }, "committer": { "name": "Fabio Estevam", "email": "festevam@gmail.com", "time": "Fri Jun 26 16:50:55 2026 -0300" }, "message": "imx9: scmi: Correct shutdown checking\n\nThe shutdown checking should use shutdown flags, not bootflags.\n\nSigned-off-by: Ye Li \u003cye.li@nxp.com\u003e\nSigned-off-by: Peng Fan \u003cpeng.fan@nxp.com\u003e\n" }, { "commit": "5402b5980ee882bcee6cdaca7580e5b36ef99f42", "tree": "e3abd09c896ba02d629a12ce084859ee1f27f18a", "parents": [ "6902fb4c17faa375003124c451c2550deab5463d" ], "author": { "name": "Ye Li", "email": "ye.li@nxp.com", "time": "Thu Jun 18 09:17:47 2026 +0800" }, "committer": { "name": "Fabio Estevam", "email": "festevam@gmail.com", "time": "Fri Jun 26 16:50:55 2026 -0300" }, "message": "imx9: scmi: Fix SPL trampoline buffer for 1GB DDR\n\nAfter supporting get DRAM size from SM, the trampoline buffer address\nstill depends on PHYS_SDRAM_SIZE. If the real DDR size is less than\nPHYS_SDRAM_SIZE, the trampoline buffer address is invalid and SPL will\ncrash. So use board_phys_sdram_size to get real DDR size to calculate\ncorrect address.\n\nFixes: e1cc7117b630 (\"imx9: scmi: Get DDR size through SM SCMI API\")\nSigned-off-by: Ye Li \u003cye.li@nxp.com\u003e\nReviewed-by: Peng Fan \u003cpeng.fan@nxp.com\u003e\nTested-by: Emanuele Ghidoli \u003cemanuele.ghidoli@toradex.com\u003e\n" }, { "commit": "6902fb4c17faa375003124c451c2550deab5463d", "tree": "37acfe85c74790ebe86ac02b15e45d762013d3c1", "parents": [ "77a48fa272161df9b778ffc09af814eec11cddd2", "f519a74a32b076e548f2637e9a00b8d3110d8bfe" ], "author": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Thu Jun 25 12:32:18 2026 -0600" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Thu Jun 25 12:32:18 2026 -0600" }, "message": "Merge branch \u0027master\u0027 of git://source.denx.de/u-boot-usb\n\n- usb: onboard-hub: Add support for Corechips SL6341 USB 2.0/3.0 hub controller\n" }, { "commit": "f519a74a32b076e548f2637e9a00b8d3110d8bfe", "tree": "fe66ade4f396c3982b553836bb982da00ef7b84f", "parents": [ "fcda974e36033ad5331a9b4a4a551af4e141ad7d" ], "author": { "name": "Alexey Charkov", "email": "alchark@flipper.net", "time": "Tue May 12 17:55:28 2026 +0400" }, "committer": { "name": "Marek Vasut", "email": "marek.vasut+usb@mailbox.org", "time": "Thu Jun 25 00:06:47 2026 +0200" }, "message": "usb: onboard-hub: Add support for Corechips SL6341 USB 2.0/3.0 hub controller\n\nCorechips SL6341 is a 4-port USB 2.0 and 3.0 hub controller. It always\nrequires external 1V1 power and can optionally use external 3V3 power\n(or alternatively it has a 5V-\u003e3V3 LDO built in to derive 3V3 power from\nVBUS). It also exposes a reset pin.\n\nDevice tree bindings are merged for upstream release with Linux 7.1 as\ncommit bfcb86e58f3a (\"dt-bindings: usb: Add Corechips SL6341 USB2.0/3.0\nhub controller\") [1]\n\nLink: https://github.com/torvalds/linux/commit/bfcb86e58f3a58d05b95970d81b94cb011982780 [1]\nSigned-off-by: Alexey Charkov \u003calchark@flipper.net\u003e\nReviewed-by: Marek Vasut \u003cmarek.vasut+usb@mailbox.org\u003e\nReviewed-by: Quentin Schulz \u003cquentin.schulz@cherry.de\u003e\n" }, { "commit": "77a48fa272161df9b778ffc09af814eec11cddd2", "tree": "69ac4345f7f9696f0c7f79fdaddf81e3ef4577eb", "parents": [ "fcda974e36033ad5331a9b4a4a551af4e141ad7d", "b4fa246a1565aa63375de06b732c6d1eb1f82d27" ], "author": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Wed Jun 24 10:02:34 2026 -0600" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Wed Jun 24 10:02:34 2026 -0600" }, "message": "Merge tag \u0027mediatek-for-master-2026-06-24\u0027 of https://source.denx.de/u-boot/custodians/u-boot-mediatek\n\n- Cherry-pick upstream devicetree fix for duplicate regulator names.\n- Fix regressions due to recent mach-wide cleanups accidentally changing\n gd-\u003ebd-\u003ebi_dram[0].size.\n" }, { "commit": "b4fa246a1565aa63375de06b732c6d1eb1f82d27", "tree": "69ac4345f7f9696f0c7f79fdaddf81e3ef4577eb", "parents": [ "ec457f7cfde59a2122297a7a217c88f02acc63a5" ], "author": { "name": "David Lechner", "email": "dlechner@baylibre.com", "time": "Mon Jun 15 14:23:38 2026 -0500" }, "committer": { "name": "David Lechner", "email": "dlechner@baylibre.com", "time": "Wed Jun 24 10:06:16 2026 -0500" }, "message": "arm: mediatek: mt8512: fix gd-\u003ebd-\u003ebi_dram[0].size\n\nUse board_get_usable_ram_top() instead of get_effective_memsize() to\nlimit gd-\u003eram_top.\n\nBoth board_get_usable_ram_top() and get_effective_memsize() are used to\nset gd-\u003eram_top in setup_dest_addr(). However, get_effective_memsize()\nalso sets gd-\u003ebd-\u003ebi_dram[0].size in dram_init_banksize(), which is\nundesirable.\n\nPrior to commit b9e6281632a8 (\"arm: mediatek: mt8512:\ndrop dram_init_banksize()\"), gd-\u003ebd-\u003ebi_dram[0].size was overridden in\na board-specific dram_init_banksize() implementation.\n\nWe can just use board_get_usable_ram_top() now to set gd-\u003eram_top to the\ncorrect value instead. Overriding gd-\u003ebd-\u003ebi_dram[0].size was a bit\nconfusing since it isn\u0027t easily apparent which order the functions that\nset it are called.\n\nFixes: b9e6281632a8 (\"arm: mediatek: mt8512: drop dram_init_banksize()\")\nLink: https://patch.msgid.link/20260615-mtk-fix-ram-size-v2-8-f72cfc52ce58@baylibre.com\nSigned-off-by: David Lechner \u003cdlechner@baylibre.com\u003e\n" }, { "commit": "ec457f7cfde59a2122297a7a217c88f02acc63a5", "tree": "bdc615a5b86378741e1e7d8b67dd144a43e53456", "parents": [ "58c7145d687a6442c077b0ed0a8c57012de347af" ], "author": { "name": "David Lechner", "email": "dlechner@baylibre.com", "time": "Mon Jun 15 14:23:37 2026 -0500" }, "committer": { "name": "David Lechner", "email": "dlechner@baylibre.com", "time": "Wed Jun 24 10:06:16 2026 -0500" }, "message": "arm: mediatek: mt8195: fix gd-\u003ebd-\u003ebi_dram[0].size\n\nUse board_get_usable_ram_top() instead of get_effective_memsize() to\nset gd-\u003eram_top to something \u003c\u003d 4GiB.\n\nBoth board_get_usable_ram_top() and get_effective_memsize() are used to\nset gd-\u003eram_top in setup_dest_addr(). However, get_effective_memsize()\nalso sets gd-\u003ebd-\u003ebi_dram[0].size in dram_init_banksize(), which is\nundesirable.\n\nPrior to commit d83bd9729d75 (\"arm: mediatek: mt8195:\ndrop dram_init_banksize()\"), gd-\u003ebd-\u003ebi_dram[0].size was overridden in\na board-specific dram_init_banksize() implementation. When that was\nremoved get_effective_memsize() set gd-\u003ebd-\u003ebi_dram[0].size to the wrong\nvalue because of get_effective_memsize() being overridden in commit\naf4cba9a05aa (\"arm: mediatek: mt8195: fix gd-\u003eram_top limit\")\n\nWe can just use board_get_usable_ram_top() now to set gd-\u003eram_top to the\ncorrect value instead. This is possible now, thanks to\nLMB_LIMIT_DMA_BELOW_RAM_TOP being set by default for 64-bit Mediatek\nARM SoCs.\n\nFixes: d83bd9729d75 (\"arm: mediatek: mt8195: drop dram_init_banksize()\")\nLink: https://patch.msgid.link/20260615-mtk-fix-ram-size-v2-7-f72cfc52ce58@baylibre.com\nSigned-off-by: David Lechner \u003cdlechner@baylibre.com\u003e\n" }, { "commit": "58c7145d687a6442c077b0ed0a8c57012de347af", "tree": "a5f6b7ccfdb1e228dedb16ef5b3f4ce853a053a7", "parents": [ "6f274732f7960319ea0337e34210d440753ff11e" ], "author": { "name": "David Lechner", "email": "dlechner@baylibre.com", "time": "Mon Jun 15 14:23:36 2026 -0500" }, "committer": { "name": "David Lechner", "email": "dlechner@baylibre.com", "time": "Wed Jun 24 10:06:16 2026 -0500" }, "message": "arm: mediatek: mt8189: fix gd-\u003ebd-\u003ebi_dram[0].size\n\nUse board_get_usable_ram_top() instead of get_effective_memsize() to\nset gd-\u003eram_top to something \u003c\u003d 4GiB.\n\nBoth board_get_usable_ram_top() and get_effective_memsize() are used to\nset gd-\u003eram_top in setup_dest_addr(). However, get_effective_memsize()\nalso sets gd-\u003ebd-\u003ebi_dram[0].size in dram_init_banksize(), which is\nundesirable.\n\nWe can just use board_get_usable_ram_top() now to set gd-\u003eram_top to the\ncorrect value instead. This is possible now, thanks to\nLMB_LIMIT_DMA_BELOW_RAM_TOP being set by default for 64-bit Mediatek\nARM SoCs.\n\nFixes: a7c682565b4b (\"arm: mediatek: add support of MT8189 SoC family\")\nLink: https://patch.msgid.link/20260615-mtk-fix-ram-size-v2-6-f72cfc52ce58@baylibre.com\nSigned-off-by: David Lechner \u003cdlechner@baylibre.com\u003e\n" }, { "commit": "6f274732f7960319ea0337e34210d440753ff11e", "tree": "a0a87b5fe1d1bf0d5a07c36f33ae7a6a6dee806c", "parents": [ "3b7adad0b5223422d9993e08faa9c879c023742d" ], "author": { "name": "David Lechner", "email": "dlechner@baylibre.com", "time": "Mon Jun 15 14:23:35 2026 -0500" }, "committer": { "name": "David Lechner", "email": "dlechner@baylibre.com", "time": "Wed Jun 24 10:06:16 2026 -0500" }, "message": "arm: mediatek: mt8188: fix gd-\u003ebd-\u003ebi_dram[0].size\n\nUse board_get_usable_ram_top() instead of get_effective_memsize() to\nset gd-\u003eram_top to something \u003c\u003d 4GiB.\n\nBoth board_get_usable_ram_top() and get_effective_memsize() are used to\nset gd-\u003eram_top in setup_dest_addr(). However, get_effective_memsize()\nalso sets gd-\u003ebd-\u003ebi_dram[0].size in dram_init_banksize(), which is\nundesirable.\n\nPrior to commit b3467e51e92b (\"arm: mediatek: mt8188:\ndrop dram_init_banksize()\"), gd-\u003ebd-\u003ebi_dram[0].size was overridden in\na board-specific dram_init_banksize() implementation. When that was\nremoved get_effective_memsize() set gd-\u003ebd-\u003ebi_dram[0].size to the wrong\nvalue because of get_effective_memsize() being overridden in commit\n7518e10cd235 (\"arm: mediatek: mt8188: fix gd-\u003eram_top limit\").\n\nWe can just use board_get_usable_ram_top() now to set gd-\u003eram_top to the\ncorrect value instead. This is possible now, thanks to\nLMB_LIMIT_DMA_BELOW_RAM_TOP being set by default for 64-bit Mediatek\nARM SoCs.\n\nFixes: b3467e51e92b (\"arm: mediatek: mt8188: drop dram_init_banksize()\")\nLink: https://patch.msgid.link/20260615-mtk-fix-ram-size-v2-5-f72cfc52ce58@baylibre.com\nSigned-off-by: David Lechner \u003cdlechner@baylibre.com\u003e\n" }, { "commit": "3b7adad0b5223422d9993e08faa9c879c023742d", "tree": "40553700bafcdd1045c13b7d382cdd31d771648c", "parents": [ "c074950b489957931296bc1efdb5e19f6f64e9a5" ], "author": { "name": "David Lechner", "email": "dlechner@baylibre.com", "time": "Mon Jun 15 14:23:34 2026 -0500" }, "committer": { "name": "David Lechner", "email": "dlechner@baylibre.com", "time": "Wed Jun 24 10:06:16 2026 -0500" }, "message": "arm: mediatek: mt7988: fix gd-\u003ebd-\u003ebi_dram[0].size\n\nUse board_get_usable_ram_top() instead of get_effective_memsize() to\nset gd-\u003eram_top to something \u003c\u003d 4GiB.\n\nBoth board_get_usable_ram_top() and get_effective_memsize() are used to\nset gd-\u003eram_top in setup_dest_addr(). However, get_effective_memsize()\nalso sets gd-\u003ebd-\u003ebi_dram[0].size in dram_init_banksize(), which is\nundesirable.\n\nPrior to commit bddd6bbef3dc (\"arm: mediatek: mt7988:\ndrop dram_init_banksize()\"), gd-\u003ebd-\u003ebi_dram[0].size was overridden in\na board-specific dram_init_banksize() implementation. When that was\nremoved get_effective_memsize() set gd-\u003ebd-\u003ebi_dram[0].size to the wrong\nvalue because of CFG_MAX_MEM_MAPPED.\n\nRather than continue to use an old-style CFG_ option and the potentially\nconfusing overriding of gd-\u003ebd-\u003ebi_dram[0].size (it is difficult to see\nwhich order the functions that set it are called), we can just use\nboard_get_usable_ram_top() to set gd-\u003eram_top to the correct value\ninstead. This is possible now, thanks to LMB_LIMIT_DMA_BELOW_RAM_TOP\nbeing set by default for 64-bit Mediatek ARM SoCs.\n\nThe CFG_MAX_MEM_MAPPED option is removed since it is no longer needed.\nThe config header and Kconfig option are also removed since that was\nthe last CFG_ option.\n\nReported-by: Rudy Andram \u003crmandrad@gmail.com\u003e\nCloses: https://lore.kernel.org/u-boot/20260602162233.2418471-1-rmandrad@gmail.com/\nFixes: bddd6bbef3dc (\"arm: mediatek: mt7988: drop dram_init_banksize()\")\nLink: https://patch.msgid.link/20260615-mtk-fix-ram-size-v2-4-f72cfc52ce58@baylibre.com\nSigned-off-by: David Lechner \u003cdlechner@baylibre.com\u003e\n" }, { "commit": "c074950b489957931296bc1efdb5e19f6f64e9a5", "tree": "9030e51433ed841635b70e11e36a777be0261274", "parents": [ "2d9a9f1cad906bbc13e8c131ed6932d0da4e28ee" ], "author": { "name": "David Lechner", "email": "dlechner@baylibre.com", "time": "Mon Jun 15 14:23:33 2026 -0500" }, "committer": { "name": "David Lechner", "email": "dlechner@baylibre.com", "time": "Wed Jun 24 10:06:16 2026 -0500" }, "message": "arm: mediatek: mt7987: fix gd-\u003ebd-\u003ebi_dram[0].size\n\nUse board_get_usable_ram_top() instead of get_effective_memsize() to\nset gd-\u003eram_top to something \u003c\u003d 4GiB.\n\nBoth board_get_usable_ram_top() and get_effective_memsize() are used to\nset gd-\u003eram_top in setup_dest_addr(). However, get_effective_memsize()\nalso sets gd-\u003ebd-\u003ebi_dram[0].size in dram_init_banksize(), which is\nundesirable.\n\nPrior to commit 56183fb025c2 (\"arm: mediatek: mt7987: drop\ndram_init_banksize()\"), gd-\u003ebd-\u003ebi_dram[0].size was overridden in\na board-specific dram_init_banksize() implementation. When that was\nremoved get_effective_memsize() set gd-\u003ebd-\u003ebi_dram[0].size to the wrong\nvalue because of CFG_MAX_MEM_MAPPED.\n\nRather than continue to use an old-style CFG_ option and the potentially\nconfusing overriding of gd-\u003ebd-\u003ebi_dram[0].size (it is difficult to see\nwhich order the functions that set it are called), we can just use\nboard_get_usable_ram_top() to set gd-\u003eram_top to the correct value\ninstead. This is possible now, thanks to LMB_LIMIT_DMA_BELOW_RAM_TOP\nbeing set by default for 64-bit Mediatek ARM SoCs.\n\nOn mt7987, there is already an implementation of\nboard_get_usable_ram_top() for other reasons, so it is modified to\nalso limit ram_top to 4GiB (mt7987 is currently the only thing that\nsets CONFIG_MTK_TZ_MOVABLE\u003dy so it is safe to change this here without\nunintentional side-effects).\n\nThe CFG_MAX_MEM_MAPPED option is removed since it is no longer needed.\nThe config header and Kconfig option are also removed since that was\nthe last CFG_ option.\n\nFixes: 56183fb025c2 (\"arm: mediatek: mt7987: drop dram_init_banksize()\")\nLink: https://patch.msgid.link/20260615-mtk-fix-ram-size-v2-3-f72cfc52ce58@baylibre.com\nSigned-off-by: David Lechner \u003cdlechner@baylibre.com\u003e\n" }, { "commit": "2d9a9f1cad906bbc13e8c131ed6932d0da4e28ee", "tree": "fa9a8b8d6aaf6b1ea1932c070df9d1b09c3f9b10", "parents": [ "ae73cc6df7246b80ebc3c602da952e13fa72f2f7" ], "author": { "name": "David Lechner", "email": "dlechner@baylibre.com", "time": "Mon Jun 15 14:23:32 2026 -0500" }, "committer": { "name": "David Lechner", "email": "dlechner@baylibre.com", "time": "Wed Jun 24 10:06:16 2026 -0500" }, "message": "net: mtk_eth: select LMB_LIMIT_DMA_BELOW_RAM_TOP\n\nDefault to CONFIG_LMB_LIMIT_DMA_BELOW_RAM_TOP\u003dy when MEDIATEK_ETH is\nenabled. The MediaTek Ethernet controller can only access the first 4GB\nof RAM when DMA is used.\n\nLink: https://patch.msgid.link/20260615-mtk-fix-ram-size-v2-2-f72cfc52ce58@baylibre.com\nSigned-off-by: David Lechner \u003cdlechner@baylibre.com\u003e\n" }, { "commit": "ae73cc6df7246b80ebc3c602da952e13fa72f2f7", "tree": "0cba5355995e2e4192e171942344c0cd63cb9aa8", "parents": [ "7aedd1f7fb5ead34df91979bdf9459dac6613a0c" ], "author": { "name": "David Lechner", "email": "dlechner@baylibre.com", "time": "Mon Jun 15 14:23:31 2026 -0500" }, "committer": { "name": "David Lechner", "email": "dlechner@baylibre.com", "time": "Wed Jun 24 10:06:16 2026 -0500" }, "message": "mmc: mtk-sd: select LMB_LIMIT_DMA_BELOW_RAM_TOP\n\nDefault to CONFIG_LMB_LIMIT_DMA_BELOW_RAM_TOP\u003dy when CONFIG_MTK_SD is\nenabled. The MediaTek SD controller can only access the first 4GB of RAM\nwhen DMA is used. \"imply\" is used rather than \"select\" in case someone\nwant\u0027s to turn off the option when DMA is not used.\n\nLink: https://patch.msgid.link/20260615-mtk-fix-ram-size-v2-1-f72cfc52ce58@baylibre.com\nSigned-off-by: David Lechner \u003cdlechner@baylibre.com\u003e\n" }, { "commit": "7aedd1f7fb5ead34df91979bdf9459dac6613a0c", "tree": "c46465fd6a53681797a0170c49f9dd3d01f5c400", "parents": [ "fcda974e36033ad5331a9b4a4a551af4e141ad7d" ], "author": { "name": "David Lechner", "email": "dlechner@baylibre.com", "time": "Thu Jun 11 19:12:20 2026 -0500" }, "committer": { "name": "David Lechner", "email": "dlechner@baylibre.com", "time": "Wed Jun 24 09:51:00 2026 -0500" }, "message": "arm64: dts: mediatek: mt6359: give regulators unique names\n\nChange the regulator-name properties to be unique for all regulators.\nU-Boot cannot handle duplicate names.\n\nSigned-off-by: David Lechner \u003cdlechner@baylibre.com\u003e\nReviewed-by: AngeloGioacchino Del Regno \u003cangelogioacchino.delregno@collabora.com\u003e\nSigned-off-by: AngeloGioacchino Del Regno \u003cangelogioacchino.delregno@collabora.com\u003e\n\n[ upstream commit: d91639d0ab3223b61c00442021dc639c9ddc2b76 ]\n\n(cherry picked from commit 22ce1d7d45a696128b8ad2cb9fbc4f2073bcb4f6)\n\nReviewed-by: Julien Stephan \u003cjstephan@baylibre.com\u003e\nLink: https://patch.msgid.link/20260611-mtk-pick-dt-mt6359-unique-names-v1-1-601546be1210@baylibre.com\nSigned-off-by: David Lechner \u003cdlechner@baylibre.com\u003e\n" }, { "commit": "fcda974e36033ad5331a9b4a4a551af4e141ad7d", "tree": "1ce549574303bb4a129d9d068143f768133dff4a", "parents": [ "4edbb6fb600a0f657e74a9bc47e0d314e059cef8" ], "author": { "name": "Quentin Strydom", "email": "qstrydom0@gmail.com", "time": "Sat Jun 20 16:07:24 2026 +0100" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Tue Jun 23 10:41:25 2026 -0600" }, "message": "arm: aspeed: Fix AST2600 SPL external DTB alignment\n\nFor AST2600 SPL with CONFIG_SPL_SEPARATE_BSS\u003dy and\nCONFIG_OF_SEPARATE\u003dy, fdt_find_separate() expects the appended control\nDTB at _image_binary_end.\n\nThe AST2600 SPL linker script aligned _image_binary_end via the\n.binman_sym_table section. In builds where that section has no emitted\ncontents, objcopy -O binary does not include the alignment bytes in\nspl/u-boot-spl-nodtb.bin. This causes the nodtb binary to end before\n_image_binary_end, so the appended DTB is placed too early.\n\nOn evb-ast2600 this produced:\n\n sizeof(spl/u-boot-spl-nodtb.bin) \u003d 0xc92c\n _image_binary_end \u003d 0xc930\n\nSPL then looked four bytes past the FDT header and failed with:\n\n Missing DTB\n No serial driver found\n\nMove the 8-byte alignment into the preceding emitted __u_boot_list\nsection so the objcopy output and _image_binary_end agree.\n\nSigned-off-by: Quentin Strydom \u003cqstrydom0@gmail.com\u003e\n" }, { "commit": "4edbb6fb600a0f657e74a9bc47e0d314e059cef8", "tree": "a87e57ed546c7838f7be897824b12dbfb9f1efdc", "parents": [ "f072620dc9ffda00b010783da27c41231c3a439b", "91d5e0ee3e857c76bb05f0c69c21f3d4a150a2e6" ], "author": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Tue Jun 23 10:36:58 2026 -0600" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Tue Jun 23 10:36:58 2026 -0600" }, "message": "Merge tag \u0027net-20260623\u0027 of https://source.denx.de/u-boot/custodians/u-boot-net\n\nPull request net-20260623.\n\nnet:\n- airoha_eth: fix mt7531 mdio related initialization bug\n\nnet-legacy:\n- cdp: reject CDP TLVs with a length below the 4-byte header\n- Clear IP defragmentation state after returning a complete packet\n\nnet-lwip:\n- Halt ethernet after network commands\n" }, { "commit": "91d5e0ee3e857c76bb05f0c69c21f3d4a150a2e6", "tree": "a87e57ed546c7838f7be897824b12dbfb9f1efdc", "parents": [ "9f7906a58cf194fc43484f5be4b65e368fa59040" ], "author": { "name": "Piyush Paliwal", "email": "piyushthepal@gmail.com", "time": "Fri Jun 12 13:17:30 2026 +0530" }, "committer": { "name": "Jerome Forissier", "email": "jerome.forissier@arm.com", "time": "Tue Jun 23 13:13:16 2026 +0200" }, "message": "net: cdp: reject CDP TLVs with a length below the 4-byte header\n\ncdp_receive() reads a 16-bit TLV length (tlen) from the packet and only\nchecks that it does not exceed the remaining buffer (tlen \u003e len). It then\nunconditionally does \"tlen -\u003d 4\" to skip the TLV header. As tlen is a\nu16, a crafted TLV with a length of 0..3 underflows tlen to ~65532-65535.\n\nFor a CDP_APPLIANCE_VLAN_TLV the underflowed length then drives the inner\n\"while (tlen \u003e 0)\" loop, which walks ~64KB past the receive buffer reading\n*ss each step -\u003e out-of-bounds read (crash / info-influence). A length of\n0 additionally fails to advance pkt/len, hanging the parse loop.\n\nReject any TLV whose declared length is smaller than its own 4-byte\nheader. This is the same class of bug as the recent bootp/dhcpv6/sntp/nfs\nfixes (unchecked length field), in a sibling LAN parser that was missed.\n\nVerified with a standalone AddressSanitizer harness using the verbatim\ncdp_receive()/cdp_compute_csum() routines: a 16-byte CDP frame with an\nappliance-VLAN TLV of length 3 triggers a heap-buffer-overflow READ that\nthe check eliminates.\n\nFixes: f575ae1f7d39 (\"net: Move CDP out of net.c\")\nCc: stable@vger.kernel.org\nSigned-off-by: Piyush Paliwal \u003cpiyushthepal@gmail.com\u003e\nReviewed-by: Jerome Forissier \u003cjerome.forissier@arm.com\u003e\n" }, { "commit": "9f7906a58cf194fc43484f5be4b65e368fa59040", "tree": "7ba5fcdc3fc8c6ff43c3268fe87f50ae7f714a5f", "parents": [ "91911aa0c76e641e673999111fc0aec1fe75b6d2" ], "author": { "name": "David Lechner", "email": "dlechner@baylibre.com", "time": "Thu Jun 11 18:36:10 2026 -0500" }, "committer": { "name": "Jerome Forissier", "email": "jerome.forissier@arm.com", "time": "Tue Jun 23 13:13:16 2026 +0200" }, "message": "net: lwip: introduce net_lwip_eth_stop() function\n\nAdd a introduce net_lwip_eth_stop() function and use that to stop the\nnetwork interface after each command that uses the network.\n\nThis makes the behavior the same as the legacy net code and avoids\npotential issues with the network interface being left in an active\nstate after a command finishes.\n\nThe start/stop is reference-counted since there is at least one command\n(dhcp) that calls another command (tftp) to avoid starting and stopping\nthe network interface multiple times in a single command.\n\nSigned-off-by: David Lechner \u003cdlechner@baylibre.com\u003e\nReviewed-by: Jerome Forissier \u003cjerome.forissier@arm.com\u003e\n" }, { "commit": "91911aa0c76e641e673999111fc0aec1fe75b6d2", "tree": "8dfb7e97678c6c8c788cfd303ff9a33643ca1f1e", "parents": [ "747720eb73642fcab9693833f8943f3f37bdb881" ], "author": { "name": "David Lechner", "email": "dlechner@baylibre.com", "time": "Thu Jun 11 18:36:09 2026 -0500" }, "committer": { "name": "Jerome Forissier", "email": "jerome.forissier@arm.com", "time": "Tue Jun 23 13:13:16 2026 +0200" }, "message": "net: lwip: wget: return errno codes from wget_do_request()\n\nChange the return values of the lwip implementation of wget_do_request()\nto be errno codes instead of command return codes.\n\nwget_do_request() is not a command, so it does not make sense to return\ncommand return codes from it. Also, the legacy network implementation of\nwget_do_request() already returns errno codes so it is logical for the\nlwip implementation to do the same.\n\nThis fixes a bug in try_load_from_uri_path() in efi_manager.c where it\nchecks that the return value of wget_do_request() is \u003c 0. Before this\nchange, CMD_RET_FAILURE would not be considered an error since it has a\nvalue of 1.\n\nThe value of ENODEV is used in places where there could actually be a\nnumber of different causes of failure and it isn\u0027t possible to\ndiscriminate (i.e. failing function returns NULL for all errors). Since\nall callers of wget_do_request() don\u0027t propagate the error code, it\ndoesn\u0027t matter so much that this is not ideal, at least at this point in\ntime.\n\nFixes: 3c656c928bd7 (\"net: lwip: add wget command\")\nReviewed-by: Jerome Forissier \u003cjerome.forissier@arm.com\u003e\nSigned-off-by: David Lechner \u003cdlechner@baylibre.com\u003e\n" }, { "commit": "747720eb73642fcab9693833f8943f3f37bdb881", "tree": "2b9dd1f95def0e660ea600969d4796d718c14038", "parents": [ "8382c2ad5284fdfffb6848fb429c40fdf169bf3a" ], "author": { "name": "David Lechner", "email": "dlechner@baylibre.com", "time": "Thu Jun 11 18:36:08 2026 -0500" }, "committer": { "name": "Jerome Forissier", "email": "jerome.forissier@arm.com", "time": "Tue Jun 23 13:13:16 2026 +0200" }, "message": "net: lwip: wget: fix error handling in wget_do_request()\n\nSplit wget_do_request() into two functions to make error handling less\nerror-prone.\n\nAfter a successful call to net_lwip_new_netif(), net_lwip_remove_netif()\nmust always be called to prevent leaks. This was missed in the CACERT\nsection of the code where we returned on error without cleaning up.\n\nInstead of adding more calls to net_lwip_remove_netif(), refactor the\ncode into two functions. The outer function handles managing the netif\nlifecycle. The inner function no longer has to worry about cleaning up\nbefore returning on error.\n\nTo keep things simple, the `path` local variable is removed during the\nrefactoring. Instead, ctx.path is used directly everywhere.\n\nFixes: 3c656c928bd7 (\"net: lwip: add wget command\")\nReviewed-by: Jerome Forissier \u003cjerome.forissier@arm.com\u003e\nAcked-by: Ilias Apalodimas \u003cilias.apalodimas@linaro.org\u003e\nSigned-off-by: David Lechner \u003cdlechner@baylibre.com\u003e\n" }, { "commit": "8382c2ad5284fdfffb6848fb429c40fdf169bf3a", "tree": "b3a9d2c25f21926dea96b215696b820f714a5da0", "parents": [ "b1aec609bb5e0d08c25c888c91935287ab4ee5fa" ], "author": { "name": "Mateusz Furdyna", "email": "mateusz.furdyna@nokia.com", "time": "Wed Jun 10 16:25:34 2026 +0200" }, "committer": { "name": "Jerome Forissier", "email": "jerome.forissier@arm.com", "time": "Tue Jun 23 13:13:16 2026 +0200" }, "message": "test: net: add IP defragmentation duplicate-fragment regression test\n\nAdd a unit test for the IP datagram reassembler (CONFIG_IP_DEFRAG) that\ncovers the duplicate-last-fragment scenario.\n\nWithout the fix the last fragment will re-trigger datagram delivery,\nincreasing udp_rx_count to 2 and effectively failing the test; with it\napplied the test passes with udp_rx_count \u003d\u003d 1.\n\nSigned-off-by: Mateusz Furdyna \u003cmateusz.furdyna@nokia.com\u003e\nReviewed-by: Simon Glass \u003csjg@chromium.org\u003e\n" }, { "commit": "b1aec609bb5e0d08c25c888c91935287ab4ee5fa", "tree": "e7fa4f32fd9af2461d7c6e5d4a3f3ec4ec021ab1", "parents": [ "5aa2066aca2ad95c5ed204c50dfd69379c9a8d32" ], "author": { "name": "Mateusz Furdyna", "email": "mateusz.furdyna@nokia.com", "time": "Wed Jun 10 16:25:33 2026 +0200" }, "committer": { "name": "Jerome Forissier", "email": "jerome.forissier@arm.com", "time": "Tue Jun 23 13:13:16 2026 +0200" }, "message": "net: clear IP defragmentation state after returning a complete packet\n\nDuring the IP defragmentation process, after the reassembly is finished\nwith the last packet arriving with MF\u003d0, the reassembly state wrt.\nstatic counters is not cleared. In case this last arriving packet with\nMF\u003d0 gets duplicated, payload bytes are mistakenly treated as hole data.\n\nA malicious actor who can deliver fragmented IP traffic to a U-Boot\ninstance with CONFIG_IP_DEFRAG\u003dy can corrupt memory via out-of-bound\nwrites and redirect control flow into attacker-supplied payload bytes\nthat already sit in `pkt_buff[]`.\n\nPublicly available AI models are able to generate a reproducer based\non the provided information.\n\nFix: once the assembled packet has been handed back to the caller, mark\nthe reassembly state empty so that any further fragment (duplicate,\nreplay, or a brand-new datagram that happens to reuse the `ip_id`) goes\nthrough the normal re-init path and rebuilds a clean hole list instead\nof dereferencing payload bytes as struct hole.\n\nFixes: 5cfaa4e54d0e (\"net: defragment IP packets\")\nReported-by: Mariusz Madej \u003cmariusz.madej@nokia.com\u003e\nReviewed-by: Simon Glass \u003csjg@chromium.org\u003e\nAcked-by: Alessandro Rubini \u003crubini@gnudd.com\u003e\nSigned-off-by: Mateusz Furdyna \u003cmateusz.furdyna@nokia.com\u003e\n" }, { "commit": "5aa2066aca2ad95c5ed204c50dfd69379c9a8d32", "tree": "1e1922944c6689b17e7d52d724f974bc183a4d5e", "parents": [ "f072620dc9ffda00b010783da27c41231c3a439b" ], "author": { "name": "Mikhail Kshevetskiy", "email": "mikhail.kshevetskiy@iopsys.eu", "time": "Thu Jun 04 04:08:37 2026 +0300" }, "committer": { "name": "Jerome Forissier", "email": "jerome.forissier@arm.com", "time": "Tue Jun 23 13:13:16 2026 +0200" }, "message": "net: airoha_eth: fix mt7531 mdio related initialization bug\n\nPrivate data isn\u0027t ready during bind time. The call of dev_get_priv()\nfunction will return NULL. Thus we can\u0027t save mdio device pointer and\nuse it later during probe.\n\nTo solve an issue, we will move mt7531 mdio device binding to the probing\nfunction of \u0027airoha-eth\u0027 driver.\n\nAll GDM ports (except of GDM1) are connected directly to their PHYs, so\ncorresponding mdio bus will be automatically probed during PHY setup.\n\nGDM1 ports differ from other GDM ports. It connected to the airoha switch\ndevice. The mt7531 mdio bus is used to manage link state of airoha switch\ndevice ports (LAN ports 1-4 corresponds to PHYs 0x09-0x0C). Therefore,\nmanual probing of mt7531 mdio bus is required to be able set/query states\nof corresponding LAN ports.\n\nFixes: 96d9e7c46425 (\"net: airoha: use mt7531 mdio for GDM1\")\nSigned-off-by: Mikhail Kshevetskiy \u003cmikhail.kshevetskiy@iopsys.eu\u003e\n" }, { "commit": "f072620dc9ffda00b010783da27c41231c3a439b", "tree": "905d96f9cb0aac38755cae114d9361a93245b025", "parents": [ "cfaf1354601418f535fd8dcef3f1d7dcf951c5e3" ], "author": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Mon Jun 22 16:22:08 2026 -0600" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Mon Jun 22 16:22:08 2026 -0600" }, "message": "Prepare v2026.07-rc5\n\nSigned-off-by: Tom Rini \u003ctrini@konsulko.com\u003e\n" }, { "commit": "cfaf1354601418f535fd8dcef3f1d7dcf951c5e3", "tree": "00f2356c8cb8563ef205906ee34e7b7ae1520178", "parents": [ "d57ea0d9edf5e5babffd280f7352f23a33a00948", "661413904212a8ac96f13278a627ab3a38e54780" ], "author": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Mon Jun 22 08:19:12 2026 -0600" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Mon Jun 22 08:19:12 2026 -0600" }, "message": "Merge branch \u0027master\u0027 of https://source.denx.de/u-boot/custodians/u-boot-sh\n\n- serial: sh: Fix dev_read_addr error check\n" }, { "commit": "661413904212a8ac96f13278a627ab3a38e54780", "tree": "00f2356c8cb8563ef205906ee34e7b7ae1520178", "parents": [ "d57ea0d9edf5e5babffd280f7352f23a33a00948" ], "author": { "name": "Francois Berder", "email": "fberder@outlook.fr", "time": "Thu May 21 19:52:39 2026 +0200" }, "committer": { "name": "Marek Vasut", "email": "marek.vasut+renesas@mailbox.org", "time": "Mon Jun 22 06:34:09 2026 +0200" }, "message": "serial: sh: Fix dev_read_addr error check\n\ndev_read_addr returns FDT_ADDR_T_NONE (-1) in case of error\nand not 0.\n\nSigned-off-by: Francois Berder \u003cfberder@outlook.fr\u003e\nReviewed-by: Simon Glass \u003csjg@chromium.org\u003e\nReviewed-by: Marek Vasut \u003cmarek.vasut+renesas@mailbox.org\u003e\nTested-by: Marek Vasut \u003cmarek.vasut+renesas@mailbox.org\u003e # R-Car H3/M3-W/M3-N Salvator-X(S), H3/M3-W ULCB, V4H Sparrow Hawk, X5H Ironhide RSIP and CA720AE\nSigned-off-by: Marek Vasut \u003cmarek.vasut+renesas@mailbox.org\u003e # Update subject tags\n" }, { "commit": "d57ea0d9edf5e5babffd280f7352f23a33a00948", "tree": "8615e41f166b56427a935f499266c425867a0b27", "parents": [ "922cf29dd8045f7348ce0f20145f46e8235faf21", "ad90d1ec8b43aa3d7ec5790db5c5740472e47c96" ], "author": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Sun Jun 21 09:27:12 2026 -0600" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Sun Jun 21 09:27:12 2026 -0600" }, "message": "Merge tag \u0027efi-2026-07-rc6\u0027 of https://source.denx.de/u-boot/custodians/u-boot-efi\n\nPull request efi-2026-07-rc6\n\nCI: https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/30505\n\nDocumentation:\n\n* bootdev: fix typos\n* board: renesas: Document Renesas RZ/N1D and RZ/N1S as arm\n* board: renesas: Document Renesas Geist board support\n* board: renesas: Document Renesas Gray Hawk board support\n* board: renesas: Document Renesas Ironhide board support\n* android: fastboot: Document halt behaviour\n\nUEFI:\n\n* fix memory leak in efi_var_collect()\n* set revision field in block IO protocol\n* fix guid comparison in efi_selftest_loaded_image.c\n* fix use-after-free in efi_selftest_memory.c\n" }, { "commit": "ad90d1ec8b43aa3d7ec5790db5c5740472e47c96", "tree": "8615e41f166b56427a935f499266c425867a0b27", "parents": [ "60ff3d950996c2ea0bb744fd9c922a96abc65774" ], "author": { "name": "Mattijs Korpershoek", "email": "mkorpershoek@kernel.org", "time": "Mon Jun 15 14:29:28 2026 +0200" }, "committer": { "name": "Heinrich Schuchardt", "email": "heinrich.schuchardt@canonical.com", "time": "Sun Jun 21 10:56:37 2026 +0200" }, "message": "doc: android: fastboot: Document halt behaviour\n\nIt\u0027s possible to interrupt the fastboot command from the U-Boot shell\nusing the Ctrl-c keybinding.\n\nDocument this.\n\nSigned-off-by: Mattijs Korpershoek \u003cmkorpershoek@kernel.org\u003e\nReviewed-by: Sam Day \u003cme@samcday.com\u003e\n" }, { "commit": "60ff3d950996c2ea0bb744fd9c922a96abc65774", "tree": "a5020bf2ca9a13da732df422a2c244a394d21ada", "parents": [ "41c6b83c777788692640fa0f85a2381d8959f301" ], "author": { "name": "Vincent Stehlé", "email": "vincent.stehle@arm.com", "time": "Thu Jun 11 08:59:50 2026 +0200" }, "committer": { "name": "Heinrich Schuchardt", "email": "heinrich.schuchardt@canonical.com", "time": "Sun Jun 21 10:53:01 2026 +0200" }, "message": "efi_selftest: fix use-after-free\n\nWhen the `memory\u0027 efi selftest verifies the Devicetree memory reservation,\nit accesses the memory_map buffer after it has been freed with free_pool().\nMove the verification earlier to fix this.\n\nFixes: 34c96659ed57 (\"efi_selftest: check fdt is marked as runtime data\")\nSigned-off-by: Vincent Stehlé \u003cvincent.stehle@arm.com\u003e\nCc: Heinrich Schuchardt \u003cxypron.glpk@gmx.de\u003e\nCc: Ilias Apalodimas \u003cilias.apalodimas@linaro.org\u003e\nCc: Tom Rini \u003ctrini@konsulko.com\u003e\nReviewed-by: Ilias Apalodimas \u003cilias.apalodimas@linaro.org\u003e\nReviewed-by: Heinrich Schuchardt \u003cxypron.glpk@gmx.de\u003e\n" }, { "commit": "41c6b83c777788692640fa0f85a2381d8959f301", "tree": "1412ba73e4aa71926718f22067d1c5a6b3b345ce", "parents": [ "1f5c8eac2f299bd3a2fc748b068acbb4b90d592d" ], "author": { "name": "Vincent Stehlé", "email": "vincent.stehle@arm.com", "time": "Tue Jun 09 10:07:04 2026 +0200" }, "committer": { "name": "Heinrich Schuchardt", "email": "heinrich.schuchardt@canonical.com", "time": "Sun Jun 21 10:51:48 2026 +0200" }, "message": "lib/efi_loader: fix block io revision\n\nThe Revision field of the EFI_BLOCK_IO_PROTOCOL structure must be set to\none of the two valid values [1], but this is not initialized in the\nefi_loader; fix it.\n\nLink: https://uefi.org/specs/UEFI/2.11/13_Protocols_Media_Access.html#efi-block-io-protocol [1]\nSigned-off-by: Vincent Stehlé \u003cvincent.stehle@arm.com\u003e\nCc: Heinrich Schuchardt \u003cxypron.glpk@gmx.de\u003e\nCc: Ilias Apalodimas \u003cilias.apalodimas@linaro.org\u003e\nCc: Tom Rini \u003ctrini@konsulko.com\u003e\nReviewed-by: Heinrich Schuchardt \u003cheinrich.schuchardt@canonical.com\u003e\n" }, { "commit": "1f5c8eac2f299bd3a2fc748b068acbb4b90d592d", "tree": "967e33122e7e7ba0d9e8926f642e2166a29788ea", "parents": [ "eb6f420836bb30e8c54c140f1bea3e2c88f5b201" ], "author": { "name": "Ilias Apalodimas", "email": "ilias.apalodimas@linaro.org", "time": "Fri Jun 19 11:38:29 2026 +0300" }, "committer": { "name": "Heinrich Schuchardt", "email": "heinrich.schuchardt@canonical.com", "time": "Sun Jun 21 10:25:08 2026 +0200" }, "message": "efi_loader: fix memory leak in efi_var_collect\n\nBarebox has now ported some of the UEFI code. In the process\nthey found some bugs.\n\nIn this case when the variable buffer is too small, efi_var_collect()\nreturns EFI_BUFFER_TOO_SMALL but doesn\u0027t free the allocated \u0027buf\u0027.\n\nFixes: 5f7dcf079de8c (\"efi_loader: UEFI variable persistence\")\nSigned-off-by: Ilias Apalodimas \u003cilias.apalodimas@linaro.org\u003e\nReviewed-by: Heinrich Schuchardt \u003cheinrich.schuchardt@canonical.com\u003e\n" }, { "commit": "eb6f420836bb30e8c54c140f1bea3e2c88f5b201", "tree": "7c940e24048273769583492ecafb80f14a738145", "parents": [ "5150a86187657807a3de38c138ca281e6c1a6259" ], "author": { "name": "Denis Mukhin", "email": "dmukhin@ford.com", "time": "Sat Jun 20 22:14:43 2026 -0700" }, "committer": { "name": "Heinrich Schuchardt", "email": "heinrich.schuchardt@canonical.com", "time": "Sun Jun 21 09:43:33 2026 +0200" }, "message": "bootdev: fix typos\n\nSigned-off-by: Denis Mukhin \u003cdmukhin@ford.com\u003e\nReviewed-by: Heinrich Schuchardt \u003cxypron.glpk@gmx.de\u003e\nReviewed-by: Simon Glass \u003csjg@chromium.org\u003e\n" }, { "commit": "5150a86187657807a3de38c138ca281e6c1a6259", "tree": "aa7180cc64527b5b6da374d0c0840d7f0ba002d0", "parents": [ "861be585cc1f922da68d3836a42e23e5ff49c3b6" ], "author": { "name": "Vincent Stehlé", "email": "vincent.stehle@arm.com", "time": "Mon Jun 15 12:56:15 2026 +0200" }, "committer": { "name": "Heinrich Schuchardt", "email": "heinrich.schuchardt@canonical.com", "time": "Sun Jun 21 09:41:59 2026 +0200" }, "message": "efi_selftest: fix guid comparison\n\nThe `loaded image\u0027 efi selftest is comparing protocol GUIDs with the wrong\npolarity.\nThis can be verified on the sandbox, where two protocols GUIDs are\nretrieved by the test from the image handle in the following order:\n\n1. Loaded Image Device Path Protocol GUID\n2. Loaded Image Protocol GUID\n\nThe test matches on the first GUID, while it is in fact looking for the\nsecond one; fix the comparison polarity.\n\nFixes: efe79a7c0de0 (\"efi_selftest: test for loaded image protocol\")\nSigned-off-by: Vincent Stehlé \u003cvincent.stehle@arm.com\u003e\nCc: Heinrich Schuchardt \u003cxypron.glpk@gmx.de\u003e\nCc: Ilias Apalodimas \u003cilias.apalodimas@linaro.org\u003e\nCc: Tom Rini \u003ctrini@konsulko.com\u003e\nCc: Alexander Graf \u003cagraf@csgraf.de\u003e\nReviewed-by: Heinrich Schuchardt \u003cxypron.glpk@gmx.de\u003e\n" }, { "commit": "861be585cc1f922da68d3836a42e23e5ff49c3b6", "tree": "7f663d480d85d75eb4a46ca80025f631bd1a62ef", "parents": [ "89b45e46ca20704e3bd9f4bd26f29a21cf8e72ac" ], "author": { "name": "Marek Vasut", "email": "marek.vasut+renesas@mailbox.org", "time": "Mon Jun 15 23:47:17 2026 +0200" }, "committer": { "name": "Heinrich Schuchardt", "email": "heinrich.schuchardt@canonical.com", "time": "Sun Jun 21 09:20:49 2026 +0200" }, "message": "doc: board: renesas: Document Renesas Ironhide board support\n\nDocument support for Renesas Ironhide development board\nbased on Renesas R-Car X5H (R8A78000) SoC.\n\nFixes: cf71963778ee (\"arm64: dts: renesas: Add Renesas R-Car X5H R8A78000 Ironhide board code\")\nFixes: 9d47a5a4d560 (\"arm: renesas: Add Renesas R-Car R8A78000 X5H Cortex-M33 RSIP port\")\nSigned-off-by: Marek Vasut \u003cmarek.vasut+renesas@mailbox.org\u003e\n" }, { "commit": "89b45e46ca20704e3bd9f4bd26f29a21cf8e72ac", "tree": "4d22fb26ed8040f76e0785e58fa3abc2cf156da1", "parents": [ "3b2190935b397360f3eea1902c796af3f935126a" ], "author": { "name": "Marek Vasut", "email": "marek.vasut+renesas@mailbox.org", "time": "Mon Jun 15 23:47:16 2026 +0200" }, "committer": { "name": "Heinrich Schuchardt", "email": "heinrich.schuchardt@canonical.com", "time": "Sun Jun 21 09:20:49 2026 +0200" }, "message": "doc: board: renesas: Document Renesas Gray Hawk board support\n\nDocument support for Renesas Gray Hawk Single development board\nbased on Renesas R-Car V4M (R8A779H0) SoC.\n\nFixes: 53066deccbed (\"ARM: renesas: Add Renesas R8A779H0 V4M Gray Hawk board code\")\nSigned-off-by: Marek Vasut \u003cmarek.vasut+renesas@mailbox.org\u003e\n" }, { "commit": "3b2190935b397360f3eea1902c796af3f935126a", "tree": "b2f086a1d4ed08e65fff2b08aeef61e1548c55ce", "parents": [ "a1d74f409fd56c0c8be091f764f317414df40aaf" ], "author": { "name": "Marek Vasut", "email": "marek.vasut+renesas@mailbox.org", "time": "Mon Jun 15 23:47:15 2026 +0200" }, "committer": { "name": "Heinrich Schuchardt", "email": "heinrich.schuchardt@canonical.com", "time": "Sun Jun 21 09:20:49 2026 +0200" }, "message": "doc: board: renesas: Document Renesas Geist board support\n\nDocument support for Renesas Geist development board\nbased on Renesas R-Car M3Le (R8A779MD) SoC.\n\nFixes: c8523795d796 (\"arm64: dts: renesas: r8a779md: Add support for R-Car M3Le R8A779MD Geist\")\nSigned-off-by: Marek Vasut \u003cmarek.vasut+renesas@mailbox.org\u003e\n" }, { "commit": "a1d74f409fd56c0c8be091f764f317414df40aaf", "tree": "b5d54d4836c91ad7c44ec177c652864a49cc6b36", "parents": [ "922cf29dd8045f7348ce0f20145f46e8235faf21" ], "author": { "name": "Marek Vasut", "email": "marek.vasut+renesas@mailbox.org", "time": "Tue Jun 16 05:36:05 2026 +0200" }, "committer": { "name": "Heinrich Schuchardt", "email": "heinrich.schuchardt@canonical.com", "time": "Sun Jun 21 09:19:35 2026 +0200" }, "message": "doc: board: renesas: Document Renesas RZ/N1D and RZ/N1S as arm\n\nThe RZ/N1D and RZ/N1S contain Cortex-A7 core, which is 32bit ARM core.\nDocument the SoC as 32bit ARM instead of aarch64.\n\nFixes: a5b9f959439b (\"doc: renesas: add Renesas board docs\")\nSigned-off-by: Marek Vasut \u003cmarek.vasut+renesas@mailbox.org\u003e\nReviewed-by: Heinrich Schuchardt \u003cheinrich.schuchardt@canonical.com\u003e\n" }, { "commit": "922cf29dd8045f7348ce0f20145f46e8235faf21", "tree": "abc959df357277b3f4e8bc91510bebe4b9442a87", "parents": [ "fae363f2cff9ffc258afee3801184879899c5767", "78d5f8cb50090a2888df284564f43f4ebfbf663c" ], "author": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Thu Jun 18 11:41:22 2026 -0600" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Thu Jun 18 11:41:22 2026 -0600" }, "message": "Merge branch \u0027master\u0027 of git://source.denx.de/u-boot-usb\n\n- usb: tcpm: fix inverted poll condition in tcpm_pd_transmit()\n" }, { "commit": "78d5f8cb50090a2888df284564f43f4ebfbf663c", "tree": "eb59ecc16afd5ff012834145145477ad667ca197", "parents": [ "a7830e87555abfb81cc69275cecb2bc0fbde5b28" ], "author": { "name": "Peng Fan", "email": "peng.fan@nxp.com", "time": "Thu Jun 18 14:48:48 2026 +0800" }, "committer": { "name": "Marek Vasut", "email": "marek.vasut+usb@mailbox.org", "time": "Thu Jun 18 16:48:16 2026 +0200" }, "message": "usb: tcpm: fix inverted poll condition in tcpm_pd_transmit()\n\nThe read_poll_timeout() macro breaks out of its loop when the condition\nevaluates to true. The current code uses \"!tx_complete\" as the\ncondition, which means it exits immediately when tx_complete is false\n(i.e., transmission has NOT completed yet), rather than waiting for\ncompletion.\n\nFix the condition to \"tx_complete\" so that the poll loop waits until\nthe TCPC signals transmission success/failure/discard before\nproceeding.\n\nWithout this fix, tcpm_pd_transmit() returns before the TCPC has\nfinished transmitting, causing the PD state machine to proceed with\nstale tx_status values.\n\nFixes: 1db4c0ac77e3 (\"usb: tcpm: add core framework\")\nReviewed-by: Neil Armstrong \u003cneil.armstrong@linaro.org\u003e\nSigned-off-by: Peng Fan \u003cpeng.fan@nxp.com\u003e\n" }, { "commit": "fae363f2cff9ffc258afee3801184879899c5767", "tree": "49dfe3fb759bd08aceb528feb15316c958590eb1", "parents": [ "a7830e87555abfb81cc69275cecb2bc0fbde5b28" ], "author": { "name": "Wadim Egorov", "email": "w.egorov@phytec.de", "time": "Wed Jun 03 08:19:46 2026 +0200" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Wed Jun 17 13:55:15 2026 -0600" }, "message": "configs: phycore_am62x_a53_defconfig: Enable fastboot\n\nEnable USB fastboot support for downloading and flashing images via\nthe fastboot protocol.\n\nSigned-off-by: Wadim Egorov \u003cw.egorov@phytec.de\u003e\n" }, { "commit": "a7830e87555abfb81cc69275cecb2bc0fbde5b28", "tree": "4aca050fdb223653fa0a283cfe27f0c9c289af86", "parents": [ "932e3f6c6a503cc9dda0233e9dc491fd0449a833", "28f675023da174b1b4817266cac7bcf3ffb6d908" ], "author": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Tue Jun 16 17:01:20 2026 -0600" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Tue Jun 16 17:39:13 2026 -0600" }, "message": "Merge branch \u0027master\u0027 of https://source.denx.de/u-boot/custodians/u-boot-sh\n\nThis is a DRAM controller driver for the R-Car X5H and its enablement.\nThis makes the U-Boot on RSIP usable beyond U-Boot shell running on\nCortex-M33, as the U-Boot on RSIP can now load not only SCP firmware\ninto the SCP core STCM, but also TFA BL31, OPTEE-OS and U-Boot into DRAM\nand start them on the Cortex-A720AE core. This is self-contained and\naffects only the R-Car X5H and a bit of R-Car V4H, besides it went\nthrough rounds of testing until now, therefore it is safe to include it\nthis late in the release cycle. I know this will make rc5 massive, sorry\nabout that.\n" }, { "commit": "932e3f6c6a503cc9dda0233e9dc491fd0449a833", "tree": "9ef8560d4de745495419cae5ccbd02ab2af358e3", "parents": [ "79f3e2f8be956575afb339a26325fcd4b15ff1e6", "033eb908d0a8ed938bc652f34a2d702a29a8726f" ], "author": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Tue Jun 16 08:57:04 2026 -0600" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Tue Jun 16 08:57:04 2026 -0600" }, "message": "Merge tag \u0027u-boot-dfu-20260616\u0027 of https://source.denx.de/u-boot/custodians/u-boot-dfu\n\nu-boot-dfu-20260616\n\nCI: https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/30480\n\nAndroid:\n* Fix A/B slot selection when marked successful and tries \u003d 0\n\nFastboot:\n* Handle partial blk_dwrite() as errors instead of success\n\nUsb Gadget:\n* Atmel: Use calloc() to initialize endpoint list\n" }, { "commit": "79f3e2f8be956575afb339a26325fcd4b15ff1e6", "tree": "ad471fd0bc2b41b167b8bdcda5ee6be2cb134319", "parents": [ "8b154abd31e499d7e90d125d36d997c75daa6b05" ], "author": { "name": "Rasmus Villemoes", "email": "rv@rasmusvillemoes.dk", "time": "Thu Jun 11 16:08:57 2026 +0200" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Tue Jun 16 08:53:12 2026 -0600" }, "message": "Makefile: let \u0027make clean\u0027 remove files created by DEVICE_TREE_DEBUG\n\nOriginally, \u0027make DEVICE_TREE_DEBUG\u003d1\u0027 only generated extra output on\nthe console. But since 6cdd7597a2f (\"kbuild: Produce diff between base\nDT and U-Boot augmented DT if DEVICE_TREE_DEBUG\u003d1\"), that has also\nleft behind lots of files that clutter the repo and are hard to get\nrid of manually.\n\nMake sure that a \u0027make clean\u0027 will remove those files, and add them to\n.gitignore.\n\nSigned-off-by: Rasmus Villemoes \u003crv@rasmusvillemoes.dk\u003e\nReviewed-by: Marek Vasut \u003cmarek.vasut+renesas@mailbox.org\u003e\n" }, { "commit": "28f675023da174b1b4817266cac7bcf3ffb6d908", "tree": "8ec1d35b4bf61f5a53344430f590a8bed0c575cd", "parents": [ "a06d8334e5f4cd31392e13a168b20a95139b2f18" ], "author": { "name": "Marek Vasut", "email": "marek.vasut+renesas@mailbox.org", "time": "Wed Jun 10 20:20:59 2026 +0200" }, "committer": { "name": "Marek Vasut", "email": "marek.vasut+renesas@mailbox.org", "time": "Tue Jun 16 05:38:25 2026 +0200" }, "message": "arm: dts: renesas: Enable DBSC5 on R-Car R8A78000 X5H Cortex-M33 RSIP port\n\nBind the DBSC5 DRAM controller driver on boot in board_early_init_r(),\nwhich brings up the DBSC5 DRAM controller and its PHY and which enables\naccess to DRAM present on this system.\n\nAdd default boot command which loads additional bootloader components\nfrom HF and UFS storage into SRAM and DRAM, and starts those components\non SCP and AP core 0. The system is then capable of reaching U-Boot on\nthe AP core 0. Specifically, the following components are loaded:\n- SCP firmware, 384 kiB from HF offset 0x4c0000 to SCP STCM\n- TFA BL31, 256 kiB from UFS0 offset 0x5000 * 4 kiB sectors to DRAM 0x8c200000\n- TEE, 2 MiB from UFS0 offset 0x5200 * 4 kiB sectors to DRAM 0x8c400000\n- U-Boot, 1 MiB from UFS0 offset 0x7200 * 4 kiB sectors to DRAM 0x8c300000\n- IPL parameters table is generated at DRAM address 0x8c100000\n\nEnable pstore command support to allow dumping kernel console from\npstore/ramoops, which is convenient for debugging. Use as follows:\n\u003d\u003e pstore set 0x80000000 0x10000 0x400 0x8000 0 0 0\n\u003d\u003e pstore display console\n\nSigned-off-by: Marek Vasut \u003cmarek.vasut+renesas@mailbox.org\u003e\n" }, { "commit": "a06d8334e5f4cd31392e13a168b20a95139b2f18", "tree": "28bbdb28807595e36bcdc8f106a1d19959ccb425", "parents": [ "93e5ca926101b3ffabfbff25057a38fd17ff9ea0" ], "author": { "name": "Marek Vasut", "email": "marek.vasut+renesas@mailbox.org", "time": "Wed Jun 10 20:20:58 2026 +0200" }, "committer": { "name": "Marek Vasut", "email": "marek.vasut+renesas@mailbox.org", "time": "Tue Jun 16 05:38:25 2026 +0200" }, "message": "ram: renesas: dbsc5: Add Renesas R-Car Gen5 DBSC5 driver\n\nAdd Renesas R-Car Gen5 DBSC5 DRAM controller driver. This driver is currently\ncapable of bringing LPDDR5X DRAM on Renesas R-Car X5H Ironhide board. Further\nboards can be supported by supplying board specific DRAM configuration data\nvia dbsc5_get_board_data().\n\nThe driver reuses parts of previous DBSC5 driver, but due to hardware changes,\ncan not be fully integrated into existing DBSC and DRAM driver, therefore the\ncurrentl DBSC and DRAM drivers are moved into R8A779G0 V4H specific files, and\nthe R8A78000 X5H files are added in parallel.\n\nThe Gen5 DBSC driver is meant to be used in RSIP context, while the Gen4 DBSC\ndriver is meant to be used in SPL, therefore the Kconfig conditionals have been\nadjusted to match.\n\nSigned-off-by: Marek Vasut \u003cmarek.vasut+renesas@mailbox.org\u003e\n" }, { "commit": "93e5ca926101b3ffabfbff25057a38fd17ff9ea0", "tree": "5c1aecc8766757d61f6bd1ff9e6563808e893a59", "parents": [ "badd97fe24dfb73b2728c26b433cabe315a27971" ], "author": { "name": "Marek Vasut", "email": "marek.vasut+renesas@mailbox.org", "time": "Wed Jun 10 20:20:57 2026 +0200" }, "committer": { "name": "Marek Vasut", "email": "marek.vasut+renesas@mailbox.org", "time": "Tue Jun 16 05:38:25 2026 +0200" }, "message": "ram: renesas: rtvram: Add support for Renesas R-Car Gen5\n\nAdd support for Renesas R-Car Gen5 R8A78000 SoC into RT-VRAM\ninitialization driver. The changes are only a slight adjustment\nto the register programming, therefore reuse the existing RT-VRAM\ndriver and parametrize those changes using driver data.\n\nSigned-off-by: Marek Vasut \u003cmarek.vasut+renesas@mailbox.org\u003e\n" }, { "commit": "8b154abd31e499d7e90d125d36d997c75daa6b05", "tree": "2516fe9b6f8cb8c971cbb270432be65e44535457", "parents": [ "badd97fe24dfb73b2728c26b433cabe315a27971" ], "author": { "name": "Heiko Stuebner", "email": "heiko@sntech.de", "time": "Sat Jun 13 19:24:44 2026 +0200" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Mon Jun 15 13:32:29 2026 -0600" }, "message": "lmb: Add the Rockchip architecture as requiring DMA below 4G\n\nLoading EFI parts like a Debian-Installer on Rockchip SoCs creates\ninteresting results, in that on some boards the Grub bootloader can\u0027t\nfind any partitions on a USB-Stick, or loading a kernel from Grub spews\n EHCI fail timeout STS_IAA set\nmessages before failing and on others the loading something like efivars\nfrom an eMMC creates read errors and making the MMC vanish from U-Boot.\n\nThis only affected boards with at least 4GB of RAM.\n\nThese boards have at least 256MB of memory placed above the actual 4GB\naddress space (due to the iomem being in between) and while kernel,\ninitramfs, dt are generally loaded to predefined addresses, additional\nEFI parts (efivars, etc) are likely just loaded \"somewhere\" and it seems\nthis always landed in that higher up memory part.\n\nAlso in the Linux-kernel peripherals like EMMC, USB, etc already run\nwith a 32bit dma-mask set.\n\nSo far, I\u0027ve seen this on RK3568 and RK3588, but as the same peripherals\nare used on most Rockchip SoCs, it makes sense to limit this on all.\n\nSo add ARCH_ROCKCHIP to the default-y list of LMB_LIMIT_DMA_BELOW_RAM_TOP.\n\nSigned-off-by: Heiko Stuebner \u003cheiko@sntech.de\u003e\nReviewed-by: Jonas Karlman \u003cjonas@kwiboo.se\u003e\nReviewed-by: Peter Robinson \u003cpbrobinson@gmail.com\u003e\n" }, { "commit": "badd97fe24dfb73b2728c26b433cabe315a27971", "tree": "aabb4d09fb385f7c0746971a3392175b94a6ee0b", "parents": [ "1e80ee41441c612f05787a93bbef4e6e422e29d1", "3ac35afdd2cc73db0ac3911937ce75b58a6f90b8" ], "author": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Mon Jun 15 12:50:04 2026 -0600" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Mon Jun 15 12:50:04 2026 -0600" }, "message": "Merge patch series \"Repair boards broken by the 6.1 kbuild bump\"\n\nSimon Glass \u003csjg@chromium.org\u003e says:\n\nCommit bd3f9ee679b4 added FORCE to several if_changed rules whose\nrecipes expand $^, so FORCE leaks in as a stray argument and the\ncommand fails. Use $\u003c to restore the Edison and i.MX23/28 images.\n\nLink: https://lore.kernel.org/r/20260613130519.1516808-1-sjg@chromium.org\n" }, { "commit": "3ac35afdd2cc73db0ac3911937ce75b58a6f90b8", "tree": "19b194dfe43940fb770a416abf0d96b4232b2058", "parents": [ "895d3c67cd58fee6815d0e2799ea7d22474accb9" ], "author": { "name": "Simon Glass", "email": "sjg@chromium.org", "time": "Sat Jun 13 07:05:13 2026 -0600" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Mon Jun 15 12:49:56 2026 -0600" }, "message": "arm: mxs: Avoid passing FORCE to commands\n\nCommit bd3f9ee679b4 (\"kbuild: Bump the build system to 6.1\") adds FORCE\nas a prerequisite to the if_changed rules here, but the commands use $^\nso FORCE leaks in as a stray operand. The dd in cmd_mkalign_mxs fails\n(silently, since its stderr is discarded) and the binary is never\naligned, stat in cmd_mkivt_mxs emits an error and cst receives a bogus\nargument.\n\nUse $\u003c and $(real-prereqs) instead, which exclude FORCE.\n\nFixes: bd3f9ee679b4 (\"kbuild: Bump the build system to 6.1\")\nSigned-off-by: Simon Glass \u003csjg@chromium.org\u003e\n" }, { "commit": "895d3c67cd58fee6815d0e2799ea7d22474accb9", "tree": "e9f123293871b36b95de9d0920bb8f163ee849d5", "parents": [ "5ca1a73c7d3064582498a8aa96c29e714402a6d3" ], "author": { "name": "Simon Glass", "email": "sjg@chromium.org", "time": "Sat Jun 13 07:05:12 2026 -0600" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Mon Jun 15 12:49:56 2026 -0600" }, "message": "x86: edison: Avoid passing FORCE to the align command\n\nCommit bd3f9ee679b4 (\"kbuild: Bump the build system to 6.1\") adds FORCE\nas a prerequisite to the u-boot-align.bin rule, but cmd_mkalign_eds\nexpands $^, so FORCE leaks in as a stray operand. The dd then fails\n(silently, since its stderr is discarded) and the following mv never\nruns, so u-boot.bin never gains its 4096-byte zero prefix. The mask ROM\nenters U-Boot 0x1000 (4KB) into the image and the board never starts,\nsitting in BootROM download mode (DnX).\n\nUse $\u003c instead of $^, which excludes FORCE and restores the prefix.\n\nFixes: bd3f9ee679b4 (\"kbuild: Bump the build system to 6.1\")\nSigned-off-by: Simon Glass \u003csjg@chromium.org\u003e\nReviewed-by: Andy Shevchenko \u003candriy.shevchenko@linux.intel.com\u003e\n" }, { "commit": "033eb908d0a8ed938bc652f34a2d702a29a8726f", "tree": "8b98c308dc9cc90689234c1ae788e3608a904591", "parents": [ "e41e97e6e6061fec5a2fb069eaad662cf6359a93" ], "author": { "name": "Zixun LI", "email": "admin@hifiphile.com", "time": "Sat Jun 06 10:27:09 2026 +0200" }, "committer": { "name": "Mattijs Korpershoek", "email": "mkorpershoek@kernel.org", "time": "Mon Jun 15 09:15:25 2026 +0200" }, "message": "usb: gadget: atmel: use calloc() to allocate endpoint list\n\nmalloc() doesn\u0027t zero out memory, leaving ep-\u003eep.enabled uninitiated,\nwhich could make this flag falsely true.\n\nIn next usb_ep_enable() call since this flag is true, ep-\u003eops-\u003eenable()\nwill be skipped. Then usb_ep_queue() will fail on uninitialized endpoint.\n\nFixes: 59310d1ecb9f (\"usb: gadget: introduce \u0027enabled\u0027 flag in struct usb_ep\")\nSigned-off-by: Zixun LI \u003cadmin@hifiphile.com\u003e\nReviewed-by: Marek Vasut \u003cmarek.vasut+usb@mailbox.org\u003e\nReviewed-by: Mattijs Korpershoek \u003cmkorpershoek@kernel.org\u003e\nLink: https://patch.msgid.link/20260606-udc_malloc-v2-1-1155326b182b@hifiphile.com\nSigned-off-by: Mattijs Korpershoek \u003cmkorpershoek@kernel.org\u003e\n" }, { "commit": "e41e97e6e6061fec5a2fb069eaad662cf6359a93", "tree": "e0ddcfb493a11c6c733a7b828b2f92f93a6ddb07", "parents": [ "1bd1d033377796418008e9a2351f18dbdf88940c" ], "author": { "name": "Colin Pinnell McAllister", "email": "colinmca242@gmail.com", "time": "Mon May 25 00:31:58 2026 +0000" }, "committer": { "name": "Mattijs Korpershoek", "email": "mkorpershoek@kernel.org", "time": "Mon Jun 15 09:15:05 2026 +0200" }, "message": "android_ab: fix slot selection\n\nThe boot selection rules state that a slot is bootable if it is not\ncorrupted and either has tries remaining or has already booted\nsuccessfully. However, slots that have tries_remaining \u003d\u003d 0 and\nsuccessful_boot \u003d\u003d 1 will be disregarded when picking the slot to\nattempt.\n\nUpdates the selection logic so slots marked successful remain eligible\neven when their tries counter is zero. Debug message now also includes\nthe successful_boot value.\n\nSigned-off-by: Colin Pinnell McAllister \u003ccolinmca242@gmail.com\u003e\nReviewed-by: Mattijs Korpershoek \u003cmkorpershoek@kernel.org\u003e\nLink: https://patch.msgid.link/20260525003158.11319-1-colinmca242@gmail.com\nSigned-off-by: Mattijs Korpershoek \u003cmkorpershoek@kernel.org\u003e\n" }, { "commit": "1bd1d033377796418008e9a2351f18dbdf88940c", "tree": "1dc743f2af9733189677e60ca513ce55e9282dd4", "parents": [ "1e80ee41441c612f05787a93bbef4e6e422e29d1" ], "author": { "name": "Francois Berder", "email": "fberder@outlook.fr", "time": "Sun May 24 21:25:47 2026 +0200" }, "committer": { "name": "Mattijs Korpershoek", "email": "mkorpershoek@kernel.org", "time": "Mon Jun 15 09:14:53 2026 +0200" }, "message": "fastboot: Fix blk_dwrite error checking\n\nblk_dwrite() returns the number of blocks written.\nThe code was only checking if the return value was different\nthan 0. Hence, partial writes were considered successful.\nFix blk_dwrite error handling by checking that all blocks\nare written.\n\nSigned-off-by: Francois Berder \u003cfberder@outlook.fr\u003e\nReviewed-by: Mattijs Korpershoek \u003cmkorpershoek@kernel.org\u003e\nLink: https://patch.msgid.link/BESP194MB2805BBD03E7C92727F116585DA0D2@BESP194MB2805.EURP194.PROD.OUTLOOK.COM\nSigned-off-by: Mattijs Korpershoek \u003cmkorpershoek@kernel.org\u003e\n" }, { "commit": "1e80ee41441c612f05787a93bbef4e6e422e29d1", "tree": "390e9cd03dff4770795d5a99d309a7ba4c93a146", "parents": [ "5ca1a73c7d3064582498a8aa96c29e714402a6d3", "cc5d760ace890b57d78b23aafb47ba220e63ae4f" ], "author": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Sun Jun 14 15:35:00 2026 -0600" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Sun Jun 14 15:35:00 2026 -0600" }, "message": "Merge branch \u0027master\u0027 of https://source.denx.de/u-boot/custodians/u-boot-sh\n\nTwo fixes for R-Car Gen5 RSIP, one to surely build u-boot-elf.shdr and\none to make u-boot-elf.shdr compatible with tooling.\n\nTwo fixes for R-Car Gen4, which could hang in SPL without them.\n" }, { "commit": "cc5d760ace890b57d78b23aafb47ba220e63ae4f", "tree": "390e9cd03dff4770795d5a99d309a7ba4c93a146", "parents": [ "a298f3066ef292466f58c4f1d545830e184cd051" ], "author": { "name": "Marek Vasut", "email": "marek.vasut+renesas@mailbox.org", "time": "Sun Jun 14 03:52:21 2026 +0200" }, "committer": { "name": "Marek Vasut", "email": "marek.vasut+renesas@mailbox.org", "time": "Sun Jun 14 04:01:39 2026 +0200" }, "message": "arm64: renesas: Initialize GIC600 fully on R-Car S4/V4H/V4M\n\nARM GIC-600 IP complies with ARM GICv3 architecture, but among others,\nimplements a power control register in the Redistributor frame. This\nregister must be programmed to mark the frame as powered on, before\naccessing other registers in the frame.\n\nBefore the switch to generic lowlevel_init function, this did not pose\na problem as the previous custom lowlevel_init did not access the GICR\nregisters. The generic function does and that does lead to a hang early\nin SPL. Enable the GIC600 initialization variant to mitigate the hang.\n\nFixes: 37997a214ed1 (\"arm: renesas: Use stock lowlevel_init function and remove s_init\")\nSigned-off-by: Marek Vasut \u003cmarek.vasut+renesas@mailbox.org\u003e\n" }, { "commit": "a298f3066ef292466f58c4f1d545830e184cd051", "tree": "ad591813d54a28eed4f5836e38ff0038269621f5", "parents": [ "79d6bd525ce03fba9fe958eb11734c1ebb16838a" ], "author": { "name": "Marek Vasut", "email": "marek.vasut+renesas@mailbox.org", "time": "Sun Jun 14 03:52:08 2026 +0200" }, "committer": { "name": "Marek Vasut", "email": "marek.vasut+renesas@mailbox.org", "time": "Sun Jun 14 04:01:39 2026 +0200" }, "message": "arm64: renesas: Fold mach_cpu_init into board_init_f on R-Car S4/V4H/V4M SPL\n\nThe mach_cpu_init() function is not invoked in SPL. Instead of\nhaving two functions, fold mach_cpu_init() into board_init_f(),\nwhich is called very early in the boot process and assures that\nthe CPG and APMU setup will be invoked before DM is brought up.\n\nFixes: 37997a214ed1 (\"arm: renesas: Use stock lowlevel_init function and remove s_init\")\nSigned-off-by: Marek Vasut \u003cmarek.vasut+renesas@mailbox.org\u003e\n" }, { "commit": "79d6bd525ce03fba9fe958eb11734c1ebb16838a", "tree": "b68892afe4ca3ac0bbf9babc89930fac8a2f53fc", "parents": [ "d043e977104650ce8f00eeaf57a7484e4684900d" ], "author": { "name": "Marek Vasut", "email": "marek.vasut+renesas@mailbox.org", "time": "Thu Jun 11 20:05:58 2026 +0200" }, "committer": { "name": "Marek Vasut", "email": "marek.vasut+renesas@mailbox.org", "time": "Sat Jun 13 00:00:54 2026 +0200" }, "message": "arm: renesas: Make R-Car Gen5 u-boot-elf.shdr compatible with SDK flash_writer\n\nThe SDK 4.32 flash_writer tool, built from the SDK IPL source, requires\nSREC S7 \"Start address (termination)\" record [1] at the end of the SREC\nfile that is sent to it during installation of content into storage,\notherwise the tool waits for the S7 record indefinitelly and the payload\ndoes not get installed into storage.\n\nSpecifically, the tool considers SREC S3 and S7 records as mandatory,\nS0, S5, S6 as ignored, and any other records as unsupported.\n\nConfigure srec_cat such that it explicitly generates the trailing S7\nrecord, and also that it never generates the ignored S5 Count record.\nThis fixes installation of u-boot-elf.shdr using the flash_writer tool,\nwhich can not finish successfully without the trailing S7 record.\n\n[1] https://en.wikipedia.org/wiki/Motorola_S-record#Record_types\n\nFixes: 3b2ce3743c1a (\"arm: renesas: Generate u-boot-elf.shdr for R-Car Gen5 RSIP\")\nSigned-off-by: Marek Vasut \u003cmarek.vasut+renesas@mailbox.org\u003e\n" }, { "commit": "d043e977104650ce8f00eeaf57a7484e4684900d", "tree": "ac07d0dec7798b0e167fb7c1457fc90fc8cf6735", "parents": [ "5ca1a73c7d3064582498a8aa96c29e714402a6d3" ], "author": { "name": "Marek Vasut", "email": "marek.vasut+renesas@mailbox.org", "time": "Thu Jun 11 20:04:26 2026 +0200" }, "committer": { "name": "Marek Vasut", "email": "marek.vasut+renesas@mailbox.org", "time": "Sat Jun 13 00:00:54 2026 +0200" }, "message": "arm: renesas: Build u-boot-elf.shdr for R-Car X5H Cortex-M33 RSIP port\n\nCurrently, the default build target for all R-Car Gen3/4/5 is the\nu-boot-elf.srec, which depends on u-boot.bin and other vital build\nartifacts, which get built as prerequisites. The R-Car Gen5 RSIP\nport benefits from u-boot-elf.shdr being built as well, because the\nu-boot-elf.shdr contains header used by the BootROM to load and\nstart U-Boot on the RSIP core. Because u-boot-elf.shdr depends on\nu-boot-elf.srec, switch the default build target for R-Car Gen5\nRSIP port to u-boot-elf.shdr. This way, both u-boot-elf.shdr and\nu-boot-elf.srec are built for R-Car Gen5 RSIP port.\n\nFixes: 9d47a5a4d560 (\"arm: renesas: Add Renesas R-Car R8A78000 X5H Cortex-M33 RSIP port\")\nSigned-off-by: Marek Vasut \u003cmarek.vasut+renesas@mailbox.org\u003e\n" }, { "commit": "5ca1a73c7d3064582498a8aa96c29e714402a6d3", "tree": "653763f1693e67e34f10e99d89f06f832a18510e", "parents": [ "3cdce049f90d77c3f9221f1eb73922384c8972c3", "4228d584ce6f7c54edf765b9231806314dae48ad" ], "author": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Fri Jun 12 08:45:32 2026 -0600" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Fri Jun 12 08:45:32 2026 -0600" }, "message": "Merge patch series \"configs: imx95: enable PCI_INIT_R for Toradex modules\"\n\nFranz Schnyder \u003cfra.schnyder@gmail.com\u003e says:\n\nCurrently, on the Toradex SMARC iMX95 and the Verdin iMX95 the ENETC\ndevice is not enumerated before network initialization because\npci_init() is not called. As a result, no Ethernet device is registered.\n\nEnable CONFIG_PCI_INIT_R so the PCI buses are enumerated early enough\nfor the Ethernet Controller to be detected and used.\n\nLink: https://lore.kernel.org/r/20260612-fix-smarc-verdin-imx95-eth-v1-0-851197b36dcc@toradex.com\n" }, { "commit": "4228d584ce6f7c54edf765b9231806314dae48ad", "tree": "653763f1693e67e34f10e99d89f06f832a18510e", "parents": [ "da8d438ae7aa9189b25abe49741aa64b244fe128" ], "author": { "name": "Franz Schnyder", "email": "franz.schnyder@toradex.com", "time": "Fri Jun 12 10:59:01 2026 +0200" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Fri Jun 12 08:45:28 2026 -0600" }, "message": "configs: verdin-imx95: enable PCI_INIT_R\n\nCurrently, the ENETC device on iMX95 is not enumerated before network\ninitialization because pci_init() is not called. As a result, no\nEthernet device is registered.\n\nEnable CONFIG_PCI_INIT_R so the PCI buses are enumerated early enough\nfor the Ethernet Controller to be detected and used.\n\nFixes: 60d8255d8dc0 (\"board: toradex: add Toradex Verdin iMX95\")\nSigned-off-by: Franz Schnyder \u003cfranz.schnyder@toradex.com\u003e\nReviewed-by: Francesco Dolcini \u003cfrancesco.dolcini@toradex.com\u003e\n" }, { "commit": "da8d438ae7aa9189b25abe49741aa64b244fe128", "tree": "3e4cebc27c6d1afa25b63d6ac10324489dc6c3e5", "parents": [ "3cdce049f90d77c3f9221f1eb73922384c8972c3" ], "author": { "name": "Franz Schnyder", "email": "franz.schnyder@toradex.com", "time": "Fri Jun 12 10:59:00 2026 +0200" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Fri Jun 12 08:45:28 2026 -0600" }, "message": "configs: toradex-smarc-imx95: enable PCI_INIT_R\n\nCurrently, the ENETC device on iMX95 is not enumerated before network\ninitialization because pci_init() is not called. As a result, no\nEthernet device is registered.\n\nEnable CONFIG_PCI_INIT_R so the PCI buses are enumerated early enough\nfor the Ethernet Controller to be detected and used.\n\nFixes: ff0540fcfe49 (\"board: toradex: add Toradex SMARC iMX95\")\nSigned-off-by: Franz Schnyder \u003cfranz.schnyder@toradex.com\u003e\nReviewed-by: Francesco Dolcini \u003cfrancesco.dolcini@toradex.com\u003e\n" }, { "commit": "3cdce049f90d77c3f9221f1eb73922384c8972c3", "tree": "c34ab693c99be19ae86c46551265da1d80ba455b", "parents": [ "a30fd0895d1c7cabedac6de79c46a32c9543bd8e", "22fa81fd8cce908ecc7e93b55ec4e8df8507779b" ], "author": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Wed Jun 10 13:12:13 2026 -0600" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Wed Jun 10 13:12:35 2026 -0600" }, "message": "Merge tag \u0027u-boot-rockchip-20260610\u0027 of https://source.denx.de/u-boot/custodians/u-boot-rockchip\n\nCI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/30398\n\nPlease pull the updates for rockchip platform:\n- New Board support: rk3588 FriendlyElec NanoPi R76S\n- UFS boot from SPL for rk3576 (NanoPi M5, ROCK 4D)\n- Clock support for RK3576 GMAC 25MHz output and RK3528/RK3576 USB3 OTG\n- Switch rk3128/rk3229 boards to upstream devicetree\n- MAINTAINERS update for upstream devicetree references\n- rk3588-rock-5b: Remove USB-C controller from u-boot.dtsi\n" }, { "commit": "a30fd0895d1c7cabedac6de79c46a32c9543bd8e", "tree": "9df721af34a1758005f4de2d965144d9089c8637", "parents": [ "1ab49f6a91ea88889c4283348f18680d6f87131f", "757a95c7faae4bdc10dc463c1bb3cf3fee1418a0" ], "author": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Wed Jun 10 13:11:35 2026 -0600" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Wed Jun 10 13:11:35 2026 -0600" }, "message": "Merge branch \u0027qcom-main\u0027 of https://source.denx.de/u-boot/custodians/u-boot-snapdragon\n\nCI: https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/pipelines/30394\n\n- Define memory map for lemans-evk (pending SMEM)\n- Fix CONFIG_SYS_INIT_SP_BSS_OFFSET in db410c chainloaded fragment\n- Fix the \"dump bootargs\" command in the qcom-phone boot menu\n- Fix a bug in the rpmh-regulator driver where the regulator mode may\n not be set during enable.\n- Enable watchdog autostart for Dragonwing boards\n- Fix serial console init on ipq5424-rdp466\n" }, { "commit": "757a95c7faae4bdc10dc463c1bb3cf3fee1418a0", "tree": "31425aaf1c8241fc0fc082929b4917b334149711", "parents": [ "c2019e01d069c398921abdf8f159136f7e550078" ], "author": { "name": "Gurumoorthy Santhakumar", "email": "gurumoorthy.santhakumar@oss.qualcomm.com", "time": "Wed Jun 03 17:08:53 2026 +0530" }, "committer": { "name": "Casey Connolly", "email": "casey.connolly@linaro.org", "time": "Wed Jun 10 13:36:18 2026 +0200" }, "message": "arm: dts: ipq5424-rdp466: add chosen node for serial console\n\nAdd a /chosen node with stdout-path pointing to serial0 (uart1) to\nenable the DT-driven console discovery path in\nserial_find_console_or_panic().\n\nWithout this node, the live DT path in serial_find_console_or_panic()\nis skipped and the fallback path is used. Adding the /chosen node makes\nthe console selection explicit and deterministic, ensuring the correct\nserial device is always selected as the console.\n\nSigned-off-by: Gurumoorthy Santhakumar \u003cgurumoorthy.santhakumar@oss.qualcomm.com\u003e\nLink: https://patch.msgid.link/20260603113853.3396271-1-gurumoorthy.santhakumar@oss.qualcomm.com\nSigned-off-by: Casey Connolly \u003ccasey.connolly@linaro.org\u003e\n" }, { "commit": "c2019e01d069c398921abdf8f159136f7e550078", "tree": "21a549a6e41e0d5444f5f86ce1d83720f308add8", "parents": [ "a50e32bae6abc8d86d4fa6fff9a1c8f5c88baa4f" ], "author": { "name": "Aswin Murugan", "email": "aswin.murugan@oss.qualcomm.com", "time": "Fri Apr 24 16:12:37 2026 +0530" }, "committer": { "name": "Casey Connolly", "email": "casey.connolly@linaro.org", "time": "Wed Jun 10 13:36:18 2026 +0200" }, "message": "dts: lemans-evk-u-boot: add override dtsi\n\nAdd initial support for the lemans EVK platform based on lemans SoC.\nDefine memory layout statically.\n\nSigned-off-by: Aswin Murugan \u003caswin.murugan@oss.qualcomm.com\u003e\nSigned-off-by: Sumit Garg \u003csumit.garg@oss.qualcomm.com\u003e\nLink: https://patch.msgid.link/20260424104237.968195-1-sumit.garg@kernel.org\nSigned-off-by: Casey Connolly \u003ccasey.connolly@linaro.org\u003e\n" }, { "commit": "a50e32bae6abc8d86d4fa6fff9a1c8f5c88baa4f", "tree": "ef8bf8d5c26a612f4bb648fefa1a5a16bd070023", "parents": [ "146963054be8ae66dc5de88979a04e067c19117e" ], "author": { "name": "Balaji Selvanathan", "email": "balaji.selvanathan@oss.qualcomm.com", "time": "Tue May 26 12:26:36 2026 +0530" }, "committer": { "name": "Casey Connolly", "email": "casey.connolly@linaro.org", "time": "Wed Jun 10 13:36:18 2026 +0200" }, "message": "configs: qcs615/qcs9100: Enable watchdog autostart\n\nEnable watchdog autostart for QCS615 and QCS9100 platforms to ensure\nthe watchdog timer is automatically started during U-Boot\ninitialization.\n\nSigned-off-by: Balaji Selvanathan \u003cbalaji.selvanathan@oss.qualcomm.com\u003e\nLink: https://patch.msgid.link/20260526-wdt-v1-1-8236040fe56a@oss.qualcomm.com\nSigned-off-by: Casey Connolly \u003ccasey.connolly@linaro.org\u003e\n" }, { "commit": "146963054be8ae66dc5de88979a04e067c19117e", "tree": "aa8b02bbd9d4bfbfa26ff7028c37dab49d901a27", "parents": [ "688890d15cc7021a72ca9939e9eecaee6adea385" ], "author": { "name": "Sam Day", "email": "me@samcday.com", "time": "Sun May 31 01:18:34 2026 +0000" }, "committer": { "name": "Casey Connolly", "email": "casey.connolly@linaro.org", "time": "Wed Jun 10 13:36:18 2026 +0200" }, "message": "board: dragonboard410c: fix chainloaded.config\n\nSince c8a74db0c, SYS_INIT_SP_BSS_OFFSET only supports hex encoding.\n\nSigned-off-by: Sam Day \u003cme@samcday.com\u003e\nLink: https://patch.msgid.link/20260531-db410c-chainloaded-fix-v1-1-94176aa147d1@samcday.com\nSigned-off-by: Casey Connolly \u003ccasey.connolly@linaro.org\u003e\n" }, { "commit": "688890d15cc7021a72ca9939e9eecaee6adea385", "tree": "8740a8a43097b8105972f5a23f567f84477ab212", "parents": [ "8a4c199aa4b9192f8a545793005b575292b5c5e7" ], "author": { "name": "Sam Day", "email": "me@samcday.com", "time": "Sun May 31 06:40:59 2026 +0000" }, "committer": { "name": "Casey Connolly", "email": "casey.connolly@linaro.org", "time": "Wed Jun 10 13:36:18 2026 +0200" }, "message": "board: qualcomm: phone: fix \u0027Dump bootargs\u0027\n\nThis menu option wasn\u0027t dumping /chosen, because no FDT addr had been\nset yet.\n\nSigned-off-by: Sam Day \u003cme@samcday.com\u003e\nLink: https://patch.msgid.link/20260531-qcom-phoneconfig-fix-v1-1-110a1c542dc3@samcday.com\nSigned-off-by: Casey Connolly \u003ccasey.connolly@linaro.org\u003e\n" }, { "commit": "8a4c199aa4b9192f8a545793005b575292b5c5e7", "tree": "77ad2d68d643d9c2ec13ffd0bff76d3fcc85e5e0", "parents": [ "5e6f370c1e3dc5a97ed865a0c3e648f5100c349c" ], "author": { "name": "Petr Hodina", "email": "petr.hodina@protonmail.com", "time": "Fri Jun 05 17:09:07 2026 +0200" }, "committer": { "name": "Casey Connolly", "email": "casey.connolly@linaro.org", "time": "Wed Jun 10 13:36:18 2026 +0200" }, "message": "gpio: qcom_spmi_gpio: move PM8998 GPIO from legacy pmic driver\n\nMove the \"qcom,pm8998-gpio\" compatible from the legacy driver\nqcom_pmic_gpio.c to qcom_spmi_gpio.c. Enables on PM8998-based boards\n(sdm845: SHIFT 6mq, Pixel 3, OnePlus 6, Poco F1, Sony Xperia Akatsuki)\nthe Volume UP gpio-key.\n\nSigned-off-by: Petr Hodina \u003cpetr.hodina@protonmail.com\u003e\nReviewed-by: Casey Connolly \u003ccasey.connolly@linaro.org\u003e\nLink: https://patch.msgid.link/20260605-qcom-gpio-v2-1-c34093041c66@protonmail.com\nSigned-off-by: Casey Connolly \u003ccasey.connolly@linaro.org\u003e\n" }, { "commit": "1ab49f6a91ea88889c4283348f18680d6f87131f", "tree": "1d09be92a83257637ccbc8fbc1a4a8cc69ed0cec", "parents": [ "3f79f777617bf6a3d6dafa2c46ff71ce2cb8adda" ], "author": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Tue Jun 09 13:13:11 2026 -0600" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Tue Jun 09 13:16:20 2026 -0600" }, "message": "CI: Sage: Pin to labgrid 25.0.1\n\nWith the recent release of labgrid 26.0, we need to pin to 25.0.1 for\nthe Sage lab until everything can be upgraded.\n\nSigned-off-by: Tom Rini \u003ctrini@konsulko.com\u003e\n" }, { "commit": "3f79f777617bf6a3d6dafa2c46ff71ce2cb8adda", "tree": "b2c41e0efebe79df971607d0afece95896a29a97", "parents": [ "cf81e36fa0c85117dbfc9a8b606671eb4b25b9db", "5a1818d54c8abfe8f4f72a3fa370b299b2bfe125" ], "author": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Tue Jun 09 10:27:02 2026 -0600" }, "committer": { "name": "Tom Rini", "email": "trini@konsulko.com", "time": "Tue Jun 09 10:27:02 2026 -0600" }, "message": "Merge tag \u0027efi-2026-07-rc5\u0027 of https://source.denx.de/u-boot/custodians/u-boot-efi\n\nPull request efi-2026-07-rc5\n\nCI: https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/30365\n\nDocumentation:\n\n* Update urllib3 version for building\n* usb: typos \u0027requird\u0027, \u0027current\u0027\n\nUEFI\n\n* Improve PE-COFF relocation data validation\n\nDevicetree-to-C generator:\n\n* dtoc: test: add missing escape in help text\n" } ], "next": "cf81e36fa0c85117dbfc9a8b606671eb4b25b9db" }