| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/peci/peci-aspeed.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Aspeed PECI Bus |
| |
| maintainers: |
| - Iwona Winiarska <iwona.winiarska@intel.com> |
| - Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> |
| |
| allOf: |
| - $ref: peci-controller.yaml# |
| |
| properties: |
| compatible: |
| enum: |
| - aspeed,ast2400-peci |
| - aspeed,ast2500-peci |
| - aspeed,ast2600-peci |
| |
| reg: |
| maxItems: 1 |
| |
| interrupts: |
| maxItems: 1 |
| |
| clocks: |
| description: |
| Clock source for PECI controller. Should reference the external |
| oscillator clock. |
| maxItems: 1 |
| |
| resets: |
| maxItems: 1 |
| |
| cmd-timeout-ms: |
| minimum: 1 |
| maximum: 1000 |
| default: 1000 |
| |
| clock-frequency: |
| description: |
| The desired operation frequency of PECI controller in Hz. |
| minimum: 2000 |
| maximum: 2000000 |
| default: 1000000 |
| |
| required: |
| - compatible |
| - reg |
| - interrupts |
| - clocks |
| - resets |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/interrupt-controller/arm-gic.h> |
| #include <dt-bindings/clock/ast2600-clock.h> |
| peci-controller@1e78b000 { |
| compatible = "aspeed,ast2600-peci"; |
| reg = <0x1e78b000 0x100>; |
| interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&syscon ASPEED_CLK_GATE_REF0CLK>; |
| resets = <&syscon ASPEED_RESET_PECI>; |
| cmd-timeout-ms = <1000>; |
| clock-frequency = <1000000>; |
| }; |
| ... |
