arch/arm64/boot/dts/rockchip/rk3566t.dtsi

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)

#include "rk3566-base.dtsi"

/ {
	cpu0_opp_table: opp-table-0 {
		compatible = "operating-points-v2";
		opp-shared;

		opp-408000000 {
			opp-hz = /bits/ 64 <408000000>;
			opp-microvolt = <850000 850000 1150000>;
			clock-latency-ns = <40000>;
		};

		opp-600000000 {
			opp-hz = /bits/ 64 <600000000>;
			opp-microvolt = <850000 850000 1150000>;
			clock-latency-ns = <40000>;
		};

		opp-816000000 {
			opp-hz = /bits/ 64 <816000000>;
			opp-microvolt = <850000 850000 1150000>;
			clock-latency-ns = <40000>;
			opp-suspend;
		};

		opp-1104000000 {
			opp-hz = /bits/ 64 <1104000000>;
			opp-microvolt = <900000 900000 1150000>;
			clock-latency-ns = <40000>;
		};

		opp-1416000000 {
			opp-hz = /bits/ 64 <1416000000>;
			opp-microvolt = <1025000 1025000 1150000>;
			clock-latency-ns = <40000>;
		};
	};

	gpu_opp_table: opp-table-1 {
		compatible = "operating-points-v2";

		opp-200000000 {
			opp-hz = /bits/ 64 <200000000>;
			opp-microvolt = <850000 850000 1000000>;
		};

		opp-300000000 {
			opp-hz = /bits/ 64 <300000000>;
			opp-microvolt = <850000 850000 1000000>;
		};

		opp-400000000 {
			opp-hz = /bits/ 64 <400000000>;
			opp-microvolt = <850000 850000 1000000>;
		};

		opp-600000000 {
			opp-hz = /bits/ 64 <600000000>;
			opp-microvolt = <900000 900000 1000000>;
		};

		opp-700000000 {
			opp-hz = /bits/ 64 <700000000>;
			opp-microvolt = <950000 950000 1000000>;
		};
	};
};

&cpu0 {
	operating-points-v2 = <&cpu0_opp_table>;
};

&cpu1 {
	operating-points-v2 = <&cpu0_opp_table>;
};

&cpu2 {
	operating-points-v2 = <&cpu0_opp_table>;
};

&cpu3 {
	operating-points-v2 = <&cpu0_opp_table>;
};

&gpu {
	operating-points-v2 = <&gpu_opp_table>;
};