Documentation/devicetree/bindings/interrupt-controller/altr,msi-controller.yaml

# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
# Copyright (C) 2015, 2024, Intel Corporation
%YAML 1.2
---
$id: http://devicetree.org/schemas/interrupt-controller/altr,msi-controller.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Altera PCIe MSI controller

maintainers:
  - Matthew Gerlach <matthew.gerlach@linux.intel.com>

properties:
  compatible:
    enum:
      - altr,msi-1.0

  reg:
    items:
      - description: CSR registers
      - description: Vectors slave port region

  reg-names:
    items:
      - const: csr
      - const: vector_slave

  interrupts:
    maxItems: 1

  msi-controller: true

  num-vectors:
    description: number of vectors
    $ref: /schemas/types.yaml#/definitions/uint32
    minimum: 1
    maximum: 32

required:
  - compatible
  - reg
  - reg-names
  - interrupts
  - msi-controller
  - num-vectors

allOf:
  - $ref: /schemas/interrupt-controller/msi-controller.yaml#

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/interrupt-controller/irq.h>
    msi@ff200000 {
        compatible = "altr,msi-1.0";
        reg = <0xff200000 0x00000010>,
              <0xff200010 0x00000080>;
        reg-names = "csr", "vector_slave";
        interrupt-parent = <&hps_0_arm_gic_0>;
        interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
        msi-controller;
        num-vectors = <32>;
    };