|  | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | 
|  | %YAML 1.2 | 
|  | --- | 
|  | $id: http://devicetree.org/schemas/pci/cdns-pcie-host.yaml# | 
|  | $schema: http://devicetree.org/meta-schemas/core.yaml# | 
|  |  | 
|  | title: Cadence PCIe Host | 
|  |  | 
|  | maintainers: | 
|  | - Tom Joseph <tjoseph@cadence.com> | 
|  |  | 
|  | allOf: | 
|  | - $ref: /schemas/pci/pci-host-bridge.yaml# | 
|  | - $ref: cdns-pcie.yaml# | 
|  |  | 
|  | properties: | 
|  | cdns,max-outbound-regions: | 
|  | description: maximum number of outbound regions | 
|  | $ref: /schemas/types.yaml#/definitions/uint32 | 
|  | minimum: 1 | 
|  | maximum: 32 | 
|  | default: 32 | 
|  | deprecated: true | 
|  |  | 
|  | cdns,no-bar-match-nbits: | 
|  | description: | 
|  | Set into the no BAR match register to configure the number of least | 
|  | significant bits kept during inbound (PCIe -> AXI) address translations | 
|  | $ref: /schemas/types.yaml#/definitions/uint32 | 
|  | minimum: 0 | 
|  | maximum: 64 | 
|  | default: 32 | 
|  | deprecated: true | 
|  |  | 
|  | msi-parent: true | 
|  |  | 
|  | additionalProperties: true |