arch/arm64/boot/dts/apple/s5l8965x-opp.dtsi

// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
 * Operating points for Apple S5L8965X "A7" Rev A SoC, Up to 1392 MHz
 *
 * target-type: J71, J72, J73
 *
 * Copyright (c) 2024, Nick Chan <towinchenmi@gmail.com>
 */

/ {
	cyclone_opp: opp-table {
		compatible = "operating-points-v2";

		opp01 {
			opp-hz = /bits/ 64 <300000000>;
			opp-level = <1>;
			clock-latency-ns = <10000>;
		};
		opp02 {
			opp-hz = /bits/ 64 <600000000>;
			opp-level = <2>;
			clock-latency-ns = <49000>;
		};
		opp03 {
			opp-hz = /bits/ 64 <840000000>;
			opp-level = <3>;
			clock-latency-ns = <30000>;
		};
		opp04 {
			opp-hz = /bits/ 64 <1128000000>;
			opp-level = <4>;
			clock-latency-ns = <39500>;
		};
		opp05 {
			opp-hz = /bits/ 64 <1296000000>;
			opp-level = <5>;
			clock-latency-ns = <45500>;
		};
		opp06 {
			opp-hz = /bits/ 64 <1392000000>;
			opp-level = <6>;
			clock-latency-ns = <46500>;
		};
	};
};