| // SPDX-License-Identifier: GPL-2.0+ OR MIT |
| /* |
| * PMGR Power domains for the Apple T8012 "T2" SoC |
| * |
| * Copyright (c) 2024 Nick Chan <towinchenmi@gmail.com> |
| */ |
| |
| &pmgr { |
| ps_cpu0: power-controller@80000 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80000 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "cpu0"; |
| apple,always-on; /* Core device */ |
| }; |
| |
| ps_cpu1: power-controller@80008 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80008 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "cpu1"; |
| apple,always-on; /* Core device */ |
| }; |
| |
| ps_cpm: power-controller@80040 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80040 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "cpm"; |
| apple,always-on; /* Core device */ |
| }; |
| |
| ps_sio_busif: power-controller@80158 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80158 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "sio_busif"; |
| }; |
| |
| ps_sio_p: power-controller@80160 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80160 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "sio_p"; |
| power-domains = <&ps_sio_busif>; |
| }; |
| |
| ps_iomux: power-controller@80150 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80150 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "iomux"; |
| }; |
| |
| ps_sbr: power-controller@80100 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80100 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "sbr"; |
| apple,always-on; /* Apple fabric, critical block */ |
| }; |
| |
| ps_aic: power-controller@80108 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80108 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "aic"; |
| apple,always-on; /* Core device */ |
| }; |
| |
| ps_gpio: power-controller@80110 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80110 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "gpio"; |
| }; |
| |
| ps_pcie_down_ref: power-controller@80138 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80138 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "pcie_down_ref"; |
| }; |
| |
| ps_pcie_stg0_ref: power-controller@80140 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80140 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "pcie_stg0_ref"; |
| }; |
| |
| ps_pcie_stg1_ref: power-controller@80148 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80148 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "pcie_stg1_ref"; |
| }; |
| |
| ps_mca0: power-controller@80170 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80170 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "mca0"; |
| power-domains = <&ps_sio_p>; |
| }; |
| |
| ps_mca1: power-controller@80178 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80178 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "mca1"; |
| power-domains = <&ps_sio_p>; |
| }; |
| |
| ps_mca2: power-controller@80180 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80180 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "mca2"; |
| power-domains = <&ps_sio_p>; |
| }; |
| |
| ps_mca3: power-controller@80188 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80188 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "mca3"; |
| power-domains = <&ps_sio_p>; |
| }; |
| |
| ps_mca4: power-controller@80190 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80190 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "mca4"; |
| power-domains = <&ps_sio_p>; |
| }; |
| |
| ps_mca5: power-controller@80198 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80198 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "mca5"; |
| power-domains = <&ps_sio_p>; |
| }; |
| |
| ps_i2c0: power-controller@801a8 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x801a8 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "i2c0"; |
| power-domains = <&ps_sio_p>; |
| }; |
| |
| ps_i2c1: power-controller@801b0 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x801b0 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "i2c1"; |
| power-domains = <&ps_sio_p>; |
| }; |
| |
| ps_i2c2: power-controller@801b8 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x801b8 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "i2c2"; |
| power-domains = <&ps_sio_p>; |
| }; |
| |
| ps_i2c3: power-controller@801c0 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x801c0 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "i2c3"; |
| power-domains = <&ps_sio_p>; |
| }; |
| |
| ps_spi0: power-controller@801e0 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x801e0 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "spi0"; |
| power-domains = <&ps_sio_p>; |
| }; |
| |
| ps_spi1: power-controller@801e8 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x801e8 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "spi1"; |
| power-domains = <&ps_sio_p>; |
| }; |
| |
| ps_spi2: power-controller@801f0 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x801f0 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "spi2"; |
| power-domains = <&ps_sio_p>; |
| }; |
| |
| ps_spi3: power-controller@801f8 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x801f8 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "spi3"; |
| power-domains = <&ps_sio_p>; |
| }; |
| |
| ps_pwm0: power-controller@801a0 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x801a0 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "pwm0"; |
| power-domains = <&ps_sio_p>; |
| }; |
| |
| ps_sio: power-controller@80168 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80168 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "sio"; |
| power-domains = <&ps_sio_p>; |
| apple,always-on; /* Core device */ |
| }; |
| |
| ps_isp_sens0: power-controller@80120 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80120 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "isp_sens0"; |
| }; |
| |
| ps_isp_sens1: power-controller@80128 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80128 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "isp_sens1"; |
| }; |
| |
| ps_isp_sens2: power-controller@80130 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80130 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "isp_sens2"; |
| }; |
| |
| ps_pms: power-controller@80118 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80118 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "pms"; |
| apple,always-on; /* Core device */ |
| }; |
| |
| ps_i2c4: power-controller@801c8 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x801c8 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "i2c4"; |
| power-domains = <&ps_sio_p>; |
| }; |
| |
| ps_i2c5: power-controller@801d0 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x801d0 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "i2c5"; |
| power-domains = <&ps_sio_p>; |
| }; |
| |
| ps_i2c6: power-controller@801d8 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x801d8 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "i2c6"; |
| power-domains = <&ps_sio_p>; |
| }; |
| |
| ps_usb: power-controller@80268 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80268 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "usb"; |
| }; |
| |
| ps_usbctrl: power-controller@80270 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80270 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "usbctrl"; |
| power-domains = <&ps_usb>; |
| }; |
| |
| ps_usb2host0: power-controller@80278 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80278 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "usb2host0"; |
| power-domains = <&ps_usbctrl>; |
| }; |
| |
| ps_usb2host1: power-controller@80288 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80288 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "usb2host1"; |
| power-domains = <&ps_usbctrl>; |
| }; |
| |
| ps_rtmux: power-controller@802a8 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x802a8 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "rtmux"; |
| }; |
| |
| ps_media: power-controller@802d8 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x802d8 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "media"; |
| }; |
| |
| ps_isp_sys: power-controller@802d0 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x802d0 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "isp_sys"; |
| power-domains = <&ps_rtmux>; |
| }; |
| |
| ps_msr: power-controller@802e8 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x802e8 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "msr"; |
| power-domains = <&ps_media>; |
| }; |
| |
| ps_jpg: power-controller@802e0 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x802e0 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "jpg"; |
| power-domains = <&ps_media>; |
| }; |
| |
| ps_disp0_fe: power-controller@802b0 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x802b0 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "disp0_fe"; |
| power-domains = <&ps_rtmux>; |
| }; |
| |
| ps_disp0_be: power-controller@802b8 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x802b8 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "disp0_be"; |
| power-domains = <&ps_disp0_fe>; |
| }; |
| |
| ps_uart0: power-controller@80200 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80200 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "uart0"; |
| power-domains = <&ps_sio_p>; |
| }; |
| |
| ps_uart1: power-controller@80208 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80208 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "uart1"; |
| power-domains = <&ps_sio_p>; |
| }; |
| |
| ps_uart2: power-controller@80210 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80210 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "uart2"; |
| power-domains = <&ps_sio_p>; |
| }; |
| |
| ps_uart3: power-controller@80218 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80218 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "uart3"; |
| power-domains = <&ps_sio_p>; |
| }; |
| |
| ps_uart4: power-controller@80220 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80220 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "uart4"; |
| power-domains = <&ps_sio_p>; |
| }; |
| |
| ps_dpa: power-controller@80228 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80228 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "dpa"; |
| power-domains = <&ps_sio_p>; |
| }; |
| |
| ps_hfd0: power-controller@80230 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80230 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "hfd0"; |
| power-domains = <&ps_sio_p>; |
| }; |
| |
| ps_mcc: power-controller@80240 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80240 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "mcc"; |
| apple,always-on; /* Memory cache controller */ |
| }; |
| |
| ps_dcs0: power-controller@80248 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80248 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "dcs0"; |
| apple,always-on; /* LPDDR4 interface */ |
| }; |
| |
| ps_dcs1: power-controller@80250 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80250 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "dcs1"; |
| apple,always-on; /* LPDDR4 interface */ |
| }; |
| |
| ps_dcs2: power-controller@80258 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80258 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "dcs2"; |
| /* Not used on some devicecs, to be disabled by loader */ |
| apple,always-on; /* LPDDR4 interface */ |
| }; |
| |
| ps_dcs3: power-controller@80260 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80260 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "dcs3"; |
| /* Not used on some devicecs, to be disabled by loader */ |
| apple,always-on; /* LPDDR4 interface */ |
| }; |
| |
| ps_usb2host0_ohci: power-controller@80280 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80280 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "usb2host0_ohci"; |
| power-domains = <&ps_usb2host0>; |
| }; |
| |
| ps_usbotg: power-controller@80290 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80290 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "usbotg"; |
| power-domains = <&ps_usbctrl>; |
| }; |
| |
| ps_smx: power-controller@80298 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80298 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "smx"; |
| apple,always-on; /* Apple fabric, critical block */ |
| }; |
| |
| ps_sf: power-controller@802a0 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x802a0 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "sf"; |
| apple,always-on; /* Apple fabric, critical block */ |
| }; |
| |
| ps_mipi_dsi: power-controller@802c8 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x802c8 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "mipi_dsi"; |
| power-domains = <&ps_disp0_be>; |
| }; |
| |
| ps_pmp: power-controller@802f0 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x802f0 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "pmp"; |
| }; |
| |
| ps_pms_sram: power-controller@802f8 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x802f8 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "pms_sram"; |
| }; |
| |
| ps_pcie_up_af: power-controller@80320 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80320 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "pcie_up_af"; |
| power-domains = <&ps_iomux>; |
| }; |
| |
| ps_pcie_up: power-controller@80328 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80328 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "pcie_up"; |
| power-domains = <&ps_pcie_up_af>; |
| }; |
| |
| ps_venc_sys: power-controller@80300 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80300 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "venc_sys"; |
| power-domains = <&ps_media>; |
| }; |
| |
| ps_ans2: power-controller@80308 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80308 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "ans2"; |
| power-domains = <&ps_iomux>; |
| }; |
| |
| ps_pcie_down: power-controller@80310 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80310 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "pcie_down"; |
| power-domains = <&ps_iomux>; |
| }; |
| |
| ps_pcie_down_aux: power-controller@80318 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80318 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "pcie_down_aux"; |
| }; |
| |
| ps_pcie_up_aux: power-controller@80330 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80330 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "pcie_up_aux"; |
| power-domains = <&ps_pcie_up>; |
| }; |
| |
| ps_pcie_stg0: power-controller@80338 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80338 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "pcie_stg0"; |
| power-domains = <&ps_ans2>; |
| }; |
| |
| ps_pcie_stg0_aux: power-controller@80340 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80340 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "pcie_stg0_aux"; |
| }; |
| |
| ps_pcie_stg1: power-controller@80348 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80348 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "pcie_stg1"; |
| power-domains = <&ps_ans2>; |
| }; |
| |
| ps_pcie_stg1_aux: power-controller@80350 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80350 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "pcie_stg1_aux"; |
| }; |
| |
| ps_sep: power-controller@80400 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80400 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "sep"; |
| apple,always-on; /* Locked on */ |
| }; |
| |
| ps_isp_rsts0: power-controller@84000 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x84000 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "isp_rsts0"; |
| power-domains = <&ps_isp_sys>; |
| }; |
| |
| ps_isp_rsts1: power-controller@84008 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x84008 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "isp_rsts1"; |
| power-domains = <&ps_isp_sys>; |
| }; |
| |
| ps_isp_vis: power-controller@84010 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x84010 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "isp_vis"; |
| power-domains = <&ps_isp_sys>; |
| }; |
| |
| ps_isp_be: power-controller@84018 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x84018 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "isp_be"; |
| power-domains = <&ps_isp_sys>; |
| }; |
| |
| ps_isp_pearl: power-controller@84020 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x84020 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "isp_pearl"; |
| power-domains = <&ps_isp_sys>; |
| }; |
| |
| ps_venc_pipe4: power-controller@88000 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x88000 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "venc_pipe4"; |
| }; |
| |
| ps_venc_pipe5: power-controller@88008 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x88008 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "venc_pipe5"; |
| }; |
| |
| ps_venc_me0: power-controller@88010 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x88010 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "venc_me0"; |
| }; |
| |
| ps_venc_me1: power-controller@88018 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x88018 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "venc_me1"; |
| }; |
| }; |
| |
| &pmgr_mini { |
| ps_spmi: power-controller@80058 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80058 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "spmi"; |
| apple,always-on; /* Core AON device */ |
| }; |
| |
| ps_nub_aon: power-controller@80060 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80060 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "nub_aon"; |
| apple,always-on; /* Core AON device */ |
| }; |
| |
| ps_smc_fabric: power-controller@80030 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80030 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "smc_fabric"; |
| apple,always-on; /* Core AON device */ |
| }; |
| |
| ps_smc_aon: power-controller@80088 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80088 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "smc_aon"; |
| apple,always-on; /* Core AON device */ |
| }; |
| |
| ps_debug: power-controller@80050 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80050 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "debug"; |
| }; |
| |
| ps_nub_sram: power-controller@801a0 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x801a0 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "nub_sram"; |
| apple,always-on; /* Core AON device */ |
| }; |
| |
| ps_nub_fabric: power-controller@80198 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x80198 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "nub_fabric"; |
| apple,always-on; /* Core AON device */ |
| }; |
| |
| ps_smc_cpu: power-controller@801a8 { |
| compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; |
| reg = <0x801a8 4>; |
| #power-domain-cells = <0>; |
| #reset-cells = <0>; |
| label = "smc_cpu"; |
| power-domains = <&ps_smc_fabric &ps_smc_aon>; |
| }; |
| }; |
