Documentation/devicetree/bindings/iio/dac/adi,axi-dac.yaml

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/dac/adi,axi-dac.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Analog Devices AXI DAC IP core

maintainers:
  - Nuno Sa <nuno.sa@analog.com>

description: |
  Analog Devices Generic AXI DAC IP core for interfacing a DAC device
  with a high speed serial (JESD204B/C) or source synchronous parallel
  interface (LVDS/CMOS).
  Usually, some other interface type (i.e SPI) is used as a control
  interface for the actual DAC, while this IP core will interface
  to the data-lines of the DAC and handle the streaming of data from
  memory via DMA into the DAC.

  https://wiki.analog.com/resources/fpga/docs/axi_dac_ip
  https://analogdevicesinc.github.io/hdl/library/axi_ad3552r/index.html

properties:
  compatible:
    enum:
      - adi,axi-dac-9.1.b
      - adi,axi-ad3552r

  reg:
    maxItems: 1

  dmas:
    maxItems: 1

  dma-names:
    items:
      - const: tx

  clocks:
    minItems: 1
    maxItems: 2

  clock-names:
    items:
      - const: s_axi_aclk
      - const: dac_clk
    minItems: 1

  '#io-backend-cells':
    const: 0

required:
  - compatible
  - dmas
  - reg
  - clocks

allOf:
  - if:
      properties:
        compatible:
          contains:
            const: adi,axi-ad3552r
    then:
      $ref: /schemas/spi/spi-controller.yaml#
      properties:
        clocks:
          minItems: 2
        clock-names:
          minItems: 2
      required:
        - clock-names
    else:
      properties:
        clocks:
          maxItems: 1
        clock-names:
          maxItems: 1

unevaluatedProperties: false

examples:
  - |
    dac@44a00000 {
        compatible = "adi,axi-dac-9.1.b";
        reg = <0x44a00000 0x10000>;
        dmas = <&tx_dma 0>;
        dma-names = "tx";
        #io-backend-cells = <0>;
        clocks = <&clkc 15>;
        clock-names = "s_axi_aclk";
    };

  - |
    #include <dt-bindings/gpio/gpio.h>
    axi_dac: spi@44a70000 {
        compatible = "adi,axi-ad3552r";
        reg = <0x44a70000 0x1000>;
        dmas = <&dac_tx_dma 0>;
        dma-names = "tx";
        #io-backend-cells = <0>;
        clocks = <&clkc 15>, <&ref_clk>;
        clock-names = "s_axi_aclk", "dac_clk";

        #address-cells = <1>;
        #size-cells = <0>;

        dac@0 {
            compatible = "adi,ad3552r";
            reg = <0>;
            reset-gpios = <&gpio0 92 GPIO_ACTIVE_HIGH>;
            io-backends = <&axi_dac>;
            spi-max-frequency = <20000000>;

            #address-cells = <1>;
            #size-cells = <0>;

            channel@0 {
                reg = <0>;
                adi,output-range-microvolt = <(-10000000) (10000000)>;
            };
        };
    };
...