| # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/pwm/sophgo,sg2042-pwm.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Sophgo SG2042 PWM controller |
| |
| maintainers: |
| - Chen Wang <unicorn_wang@outlook.com> |
| |
| description: |
| This controller contains 4 channels which can generate PWM waveforms. |
| |
| allOf: |
| - $ref: pwm.yaml# |
| |
| properties: |
| compatible: |
| enum: |
| - sophgo,sg2042-pwm |
| - sophgo,sg2044-pwm |
| |
| reg: |
| maxItems: 1 |
| |
| clocks: |
| maxItems: 1 |
| |
| clock-names: |
| items: |
| - const: apb |
| |
| resets: |
| maxItems: 1 |
| |
| "#pwm-cells": |
| const: 3 |
| |
| required: |
| - compatible |
| - reg |
| - clocks |
| - clock-names |
| - resets |
| |
| unevaluatedProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/reset/sophgo,sg2042-reset.h> |
| |
| pwm@7f006000 { |
| compatible = "sophgo,sg2042-pwm"; |
| reg = <0x7f006000 0x1000>; |
| #pwm-cells = <3>; |
| clocks = <&clock 67>; |
| clock-names = "apb"; |
| resets = <&rstgen RST_PWM>; |
| }; |
