Documentation/devicetree/bindings/interconnect/qcom,sa8775p-rpmh.yaml

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interconnect/qcom,sa8775p-rpmh.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm RPMh Network-On-Chip Interconnect on SA8775P

maintainers:
  - Bartosz Golaszewski <bartosz.golaszewski@linaro.org>

description: |
  RPMh interconnect providers support system bandwidth requirements through
  RPMh hardware accelerators known as Bus Clock Manager (BCM).

  See also: include/dt-bindings/interconnect/qcom,sa8775p.h

properties:
  compatible:
    enum:
      - qcom,sa8775p-aggre1-noc
      - qcom,sa8775p-aggre2-noc
      - qcom,sa8775p-clk-virt
      - qcom,sa8775p-config-noc
      - qcom,sa8775p-dc-noc
      - qcom,sa8775p-gem-noc
      - qcom,sa8775p-gpdsp-anoc
      - qcom,sa8775p-lpass-ag-noc
      - qcom,sa8775p-mc-virt
      - qcom,sa8775p-mmss-noc
      - qcom,sa8775p-nspa-noc
      - qcom,sa8775p-nspb-noc
      - qcom,sa8775p-pcie-anoc
      - qcom,sa8775p-system-noc

  reg:
    maxItems: 1

  clocks:
    minItems: 2
    maxItems: 5

required:
  - compatible

allOf:
  - $ref: qcom,rpmh-common.yaml#
  - if:
      properties:
        compatible:
          contains:
            enum:
              - qcom,sa8775p-aggre1-noc
    then:
      properties:
        clocks:
          items:
            - description: aggre UFS PHY AXI clock
            - description: aggre QUP PRIM AXI clock
            - description: aggre USB2 PRIM AXI clock
            - description: aggre USB3 PRIM AXI clock
            - description: aggre USB3 SEC AXI clock

  - if:
      properties:
        compatible:
          contains:
            enum:
              - qcom,sa8775p-aggre2-noc
    then:
      properties:
        clocks:
          items:
            - description: aggre UFS CARD AXI clock
            - description: RPMH CC IPA clock

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/clock/qcom,sa8775p-gcc.h>
    clk_virt: interconnect-clk-virt {
        compatible = "qcom,sa8775p-clk-virt";
        #interconnect-cells = <2>;
        qcom,bcm-voters = <&apps_bcm_voter>;
    };

    aggre1_noc: interconnect@16c0000 {
        compatible = "qcom,sa8775p-aggre1-noc";
        reg = <0x016c0000 0x18080>;
        #interconnect-cells = <2>;
        qcom,bcm-voters = <&apps_bcm_voter>;
        clocks = <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
                 <&gcc GCC_AGGRE_NOC_QUPV3_AXI_CLK>,
                 <&gcc GCC_AGGRE_USB2_PRIM_AXI_CLK>,
                 <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>,
                 <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>;
    };