| .. SPDX-License-Identifier: GPL-2.0-only |
| |
| ============= |
| AD4000 driver |
| ============= |
| |
| Device driver for Analog Devices Inc. AD4000 series of ADCs and similar devices. |
| |
| Supported devices |
| ================= |
| |
| * `AD4000 <https://www.analog.com/AD4000>`_ |
| * `AD4001 <https://www.analog.com/AD4001>`_ |
| * `AD4002 <https://www.analog.com/AD4002>`_ |
| * `AD4003 <https://www.analog.com/AD4003>`_ |
| * `AD4004 <https://www.analog.com/AD4004>`_ |
| * `AD4005 <https://www.analog.com/AD4005>`_ |
| * `AD4006 <https://www.analog.com/AD4006>`_ |
| * `AD4007 <https://www.analog.com/AD4007>`_ |
| * `AD4008 <https://www.analog.com/AD4008>`_ |
| * `AD4010 <https://www.analog.com/AD4010>`_ |
| * `AD4011 <https://www.analog.com/AD4011>`_ |
| * `AD4020 <https://www.analog.com/AD4020>`_ |
| * `AD4021 <https://www.analog.com/AD4021>`_ |
| * `AD4022 <https://www.analog.com/AD4022>`_ |
| * `ADAQ4001 <https://www.analog.com/ADAQ4001>`_ |
| * `ADAQ4003 <https://www.analog.com/ADAQ4003>`_ |
| * `AD7685 <https://www.analog.com/AD7685>`_ |
| * `AD7686 <https://www.analog.com/AD7686>`_ |
| * `AD7687 <https://www.analog.com/AD7687>`_ |
| * `AD7688 <https://www.analog.com/AD7688>`_ |
| * `AD7690 <https://www.analog.com/AD7690>`_ |
| * `AD7691 <https://www.analog.com/AD7691>`_ |
| * `AD7693 <https://www.analog.com/AD7693>`_ |
| * `AD7942 <https://www.analog.com/AD7942>`_ |
| * `AD7946 <https://www.analog.com/AD7946>`_ |
| * `AD7980 <https://www.analog.com/AD7980>`_ |
| * `AD7982 <https://www.analog.com/AD7982>`_ |
| * `AD7983 <https://www.analog.com/AD7983>`_ |
| * `AD7984 <https://www.analog.com/AD7984>`_ |
| * `AD7988-1 <https://www.analog.com/AD7988-1>`_ |
| * `AD7988-5 <https://www.analog.com/AD7988-5>`_ |
| |
| Wiring connections |
| ------------------ |
| |
| Devices of the AD4000 series can be connected to the SPI host controller in a |
| few different modes. |
| |
| CS mode, 3-wire turbo mode |
| ^^^^^^^^^^^^^^^^^^^^^^^^^^ |
| |
| Datasheet "3-wire" mode is what most resembles standard SPI connection which, |
| for these devices, comprises of connecting the controller CS line to device CNV |
| pin and other SPI lines as usual. This configuration is (misleadingly) called |
| "CS Mode, 3-Wire Turbo Mode" connection in datasheets. |
| NOTE: The datasheet definition of 3-wire mode for the AD4000 series is NOT the |
| same of standard spi-3wire mode. |
| This is the only connection mode that allows configuration register access but |
| it requires the SPI controller to support the ``SPI_MOSI_IDLE_HIGH`` feature. |
| |
| Omit the ``adi,sdi-pin`` property in device tree to select this mode. |
| |
| :: |
| |
| +-------------+ |
| + ----------------------------------| SDO | |
| | | | |
| | +-------------------| CS | |
| | v | | |
| | +--------------------+ | HOST | |
| | | CNV | | | |
| +--->| SDI AD4000 SDO |-------->| SDI | |
| | SCK | | | |
| +--------------------+ | | |
| ^ | | |
| +--------------------| SCLK | |
| +-------------+ |
| |
| CS mode, 3-wire, without busy indicator |
| ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ |
| |
| Another wiring configuration supported as "3-wire" mode has the SDI pin |
| hard-wired to digital input/output interface supply (VIO). In this setup, the |
| controller is not required to support ``SPI_MOSI_IDLE_HIGH`` but register access |
| is not possible. This connection mode saves one wire and works with any SPI |
| controller. |
| |
| Set the ``adi,sdi-pin`` device tree property to ``"high"`` to select this mode. |
| |
| :: |
| |
| +-------------+ |
| +--------------------| CS | |
| v | | |
| VIO +--------------------+ | HOST | |
| | | CNV | | | |
| +--->| SDI AD4000 SDO |-------->| SDI | |
| | SCK | | | |
| +--------------------+ | | |
| ^ | | |
| +--------------------| SCLK | |
| +-------------+ |
| |
| Alternatively, a GPIO may be connected to the device CNV pin. This is similar to |
| the previous wiring configuration but saves the use of a CS line. |
| |
| :: |
| |
| +-------------+ |
| +--------------------| GPIO | |
| v | | |
| VIO +--------------------+ | HOST | |
| | | CNV | | | |
| +--->| SDI AD4000 SDO |-------->| SDI | |
| | SCK | | | |
| +--------------------+ | | |
| ^ | | |
| +--------------------| SCLK | |
| +-------------+ |
| |
| CS mode, 4-wire without busy indicator |
| ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ |
| |
| In datasheet "4-wire" mode, the controller CS line is connected to the ADC SDI |
| pin and a GPIO is connected to the ADC CNV pin. This connection mode may better |
| suit scenarios where multiple ADCs can share one CNV trigger. |
| |
| Set ``adi,sdi-pin`` to ``"cs"`` to select this mode. |
| |
| |
| :: |
| |
| +-------------+ |
| + ----------------------------------| CS | |
| | | | |
| | +-------------------| GPIO | |
| | v | | |
| | +--------------------+ | HOST | |
| | | CNV | | | |
| +--->| SDI AD4000 SDO |-------->| SDI | |
| | SCK | | | |
| +--------------------+ | | |
| ^ | | |
| +--------------------| SCLK | |
| +-------------+ |
| |
| IIO Device characteristics |
| ========================== |
| |
| The AD4000 series driver supports differential and pseudo-differential ADCs. |
| |
| The span compression feature available in AD4000 series devices can be |
| enabled/disabled by changing the ``_scale_available`` attribute of the voltage |
| channel. Note that span compression configuration requires writing to AD4000 |
| configuration register, which is only possible when the ADC is wired in 3-wire |
| turbo mode, and the SPI controller is ``SPI_MOSI_IDLE_HIGH`` capable. If those |
| conditions are not met, no ``_scale_available`` attribute is provided. |
| |
| Besides that, differential and pseudo-differential voltage channels present |
| slightly different sysfs interfaces. |
| |
| Pseudo-differential ADCs |
| ------------------------ |
| |
| Typical voltage channel attributes of a pseudo-differential AD4000 series device: |
| |
| +-------------------------------------------+------------------------------------------+ |
| | Voltage Channel Attributes | Description | |
| +===========================================+==========================================+ |
| | ``in_voltage0_raw`` | Raw ADC output code. | |
| +-------------------------------------------+------------------------------------------+ |
| | ``in_voltage0_offset`` | Offset to convert raw value to mV. | |
| +-------------------------------------------+------------------------------------------+ |
| | ``in_voltage0_scale`` | Scale factor to convert raw value to mV. | |
| +-------------------------------------------+------------------------------------------+ |
| | ``in_voltage0_scale_available`` | Toggles input span compression | |
| +-------------------------------------------+------------------------------------------+ |
| |
| Differential ADCs |
| ----------------- |
| |
| Typical voltage channel attributes of a differential AD4000 series device: |
| |
| +-------------------------------------------+------------------------------------------+ |
| | Voltage Channel Attributes | Description | |
| +===========================================+==========================================+ |
| | ``in_voltage0-voltage1_raw`` | Raw ADC output code. | |
| +-------------------------------------------+------------------------------------------+ |
| | ``in_voltage0-voltage1_scale`` | Scale factor to convert raw value to mV. | |
| +-------------------------------------------+------------------------------------------+ |
| | ``in_voltage0-voltage1_scale_available`` | Toggles input span compression | |
| +-------------------------------------------+------------------------------------------+ |
| |
| SPI offload support |
| ------------------- |
| |
| To be able to achieve the maximum sample rate, the driver can be used with SPI |
| offload engines such as the one usually present in `AXI SPI Engine`_, to provide |
| SPI offload support. |
| |
| .. _AXI SPI Engine: http://analogdevicesinc.github.io/hdl/projects/pulsar_adc/index.html |
| |
| To keep up with SPI offloading transfer speeds, the ADC must be connected either |
| in 3-wire turbo mode or in 3-wire without busy indicator mode and have SPI |
| controller CS line connected to the CNV pin. |
| |
| When set for SPI offload support, the IIO device will provide different |
| interfaces. |
| |
| * Either ``in_voltage0_sampling_frequency`` or |
| ``in_voltage0-voltage1_sampling_frequency`` file is provided to allow setting |
| the sample rate. |
| * IIO trigger device is not provided (no ``trigger`` directory). |
| * ``timestamp`` channel is not provided. |
| |
| Also, because the ADC output has a one sample latency (delay) when the device is |
| wired in "3-wire" mode and only one transfer per sample is done when using SPI |
| offloading, the first data sample in the buffer is not valid because it contains |
| the output of an earlier conversion result. |