| /* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */ |
| /* |
| * Copyright (c) 2019 Amlogic, Inc. All rights reserved. |
| * Author: Jian Hu <jian.hu@amlogic.com> |
| * |
| * Copyright (c) 2023, SberDevices. All Rights Reserved. |
| * Author: Dmitry Rokosov <ddrokosov@sberdevices.ru> |
| */ |
| |
| #ifndef __A1_PLL_CLKC_H |
| #define __A1_PLL_CLKC_H |
| |
| #define CLKID_FIXED_PLL_DCO 0 |
| #define CLKID_FIXED_PLL 1 |
| #define CLKID_FCLK_DIV2_DIV 2 |
| #define CLKID_FCLK_DIV3_DIV 3 |
| #define CLKID_FCLK_DIV5_DIV 4 |
| #define CLKID_FCLK_DIV7_DIV 5 |
| #define CLKID_FCLK_DIV2 6 |
| #define CLKID_FCLK_DIV3 7 |
| #define CLKID_FCLK_DIV5 8 |
| #define CLKID_FCLK_DIV7 9 |
| #define CLKID_HIFI_PLL 10 |
| #define CLKID_SYS_PLL 11 |
| |
| #endif /* __A1_PLL_CLKC_H */ |
