| # SPDX-License-Identifier: GPL-2.0 | |
| %YAML 1.2 | |
| --- | |
| $id: http://devicetree.org/schemas/net/ethernet-controller.yaml# | |
| $schema: http://devicetree.org/meta-schemas/core.yaml# | |
| title: Ethernet Controller Common Properties | |
| maintainers: | |
| - David S. Miller <davem@davemloft.net> | |
| properties: | |
| $nodename: | |
| pattern: "^ethernet(@.*)?$" | |
| label: | |
| description: Human readable label on a port of a box. | |
| local-mac-address: | |
| description: | |
| Specifies the MAC address that was assigned to the network device. | |
| $ref: /schemas/types.yaml#/definitions/uint8-array | |
| minItems: 6 | |
| maxItems: 6 | |
| mac-address: | |
| description: | |
| Specifies the MAC address that was last used by the boot | |
| program; should be used in cases where the MAC address assigned | |
| to the device by the boot program is different from the | |
| local-mac-address property. | |
| $ref: /schemas/types.yaml#/definitions/uint8-array | |
| minItems: 6 | |
| maxItems: 6 | |
| max-frame-size: | |
| $ref: /schemas/types.yaml#/definitions/uint32 | |
| description: | |
| Maximum transfer unit (IEEE defined MTU), rather than the | |
| maximum frame size (there\'s contradiction in the Devicetree | |
| Specification). | |
| max-speed: | |
| $ref: /schemas/types.yaml#/definitions/uint32 | |
| description: | |
| Specifies maximum speed in Mbit/s supported by the device. | |
| nvmem-cells: | |
| maxItems: 1 | |
| description: | |
| Reference to an nvmem node for the MAC address | |
| nvmem-cell-names: | |
| const: mac-address | |
| phy-connection-type: | |
| description: | |
| Specifies interface type between the Ethernet device and a physical | |
| layer (PHY) device. | |
| enum: | |
| # There is not a standard bus between the MAC and the PHY, | |
| # something proprietary is being used to embed the PHY in the | |
| # MAC. | |
| - internal | |
| - mii | |
| - gmii | |
| - sgmii | |
| - psgmii | |
| - qsgmii | |
| - qusgmii | |
| - tbi | |
| - rev-mii | |
| - rmii | |
| - rev-rmii | |
| - moca | |
| # RX and TX delays are added by the MAC when required | |
| - rgmii | |
| # RGMII with internal RX and TX delays provided by the PHY, | |
| # the MAC should not add the RX or TX delays in this case | |
| - rgmii-id | |
| # RGMII with internal RX delay provided by the PHY, the MAC | |
| # should not add an RX delay in this case | |
| - rgmii-rxid | |
| # RGMII with internal TX delay provided by the PHY, the MAC | |
| # should not add an TX delay in this case | |
| - rgmii-txid | |
| - rtbi | |
| - smii | |
| - xgmii | |
| - trgmii | |
| - 1000base-x | |
| - 2500base-x | |
| - 5gbase-r | |
| - rxaui | |
| - xaui | |
| # 10GBASE-KR, XFI, SFI | |
| - 10gbase-kr | |
| - usxgmii | |
| - 10gbase-r | |
| - 25gbase-r | |
| - 10g-qxgmii | |
| phy-mode: | |
| $ref: "#/properties/phy-connection-type" | |
| pcs-handle: | |
| $ref: /schemas/types.yaml#/definitions/phandle-array | |
| items: | |
| maxItems: 1 | |
| description: | |
| Specifies a reference to a node representing a PCS PHY device on a MDIO | |
| bus to link with an external PHY (phy-handle) if exists. | |
| pcs-handle-names: | |
| description: | |
| The name of each PCS in pcs-handle. | |
| phy-handle: | |
| $ref: /schemas/types.yaml#/definitions/phandle | |
| description: | |
| Specifies a reference to a node representing a PHY device. | |
| phy: | |
| $ref: "#/properties/phy-handle" | |
| deprecated: true | |
| phy-device: | |
| $ref: "#/properties/phy-handle" | |
| deprecated: true | |
| rx-fifo-depth: | |
| $ref: /schemas/types.yaml#/definitions/uint32 | |
| description: | |
| The size of the controller\'s receive fifo in bytes. This is used | |
| for components that can have configurable receive fifo sizes, | |
| and is useful for determining certain configuration settings | |
| such as flow control thresholds. | |
| sfp: | |
| $ref: /schemas/types.yaml#/definitions/phandle | |
| description: | |
| Specifies a reference to a node representing a SFP cage. | |
| tx-fifo-depth: | |
| $ref: /schemas/types.yaml#/definitions/uint32 | |
| description: | |
| The size of the controller\'s transmit fifo in bytes. This | |
| is used for components that can have configurable fifo sizes. | |
| managed: | |
| description: | |
| Specifies the PHY management type. If auto is set and fixed-link | |
| is not specified, it uses MDIO for management. | |
| $ref: /schemas/types.yaml#/definitions/string | |
| default: auto | |
| enum: | |
| - auto | |
| - in-band-status | |
| fixed-link: | |
| oneOf: | |
| - $ref: /schemas/types.yaml#/definitions/uint32-array | |
| deprecated: true | |
| items: | |
| - minimum: 0 | |
| maximum: 31 | |
| description: | |
| Emulated PHY ID, choose any but unique to the all | |
| specified fixed-links | |
| - enum: [0, 1] | |
| description: | |
| Duplex configuration. 0 for half duplex or 1 for | |
| full duplex | |
| - enum: [10, 100, 1000, 2500, 10000] | |
| description: | |
| Link speed in Mbits/sec. | |
| - enum: [0, 1] | |
| description: | |
| Pause configuration. 0 for no pause, 1 for pause | |
| - enum: [0, 1] | |
| description: | |
| Asymmetric pause configuration. 0 for no asymmetric | |
| pause, 1 for asymmetric pause | |
| - type: object | |
| additionalProperties: false | |
| properties: | |
| speed: | |
| description: | |
| Link speed. | |
| $ref: /schemas/types.yaml#/definitions/uint32 | |
| enum: [10, 100, 1000, 2500, 10000] | |
| full-duplex: | |
| $ref: /schemas/types.yaml#/definitions/flag | |
| description: | |
| Indicates that full-duplex is used. When absent, half | |
| duplex is assumed. | |
| pause: | |
| $ref: /schemas/types.yaml#/definitions/flag | |
| description: | |
| Indicates that pause should be enabled. | |
| asym-pause: | |
| $ref: /schemas/types.yaml#/definitions/flag | |
| description: | |
| Indicates that asym_pause should be enabled. | |
| link-gpios: | |
| maxItems: 1 | |
| description: | |
| GPIO to determine if the link is up | |
| required: | |
| - speed | |
| leds: | |
| description: | |
| Describes the LEDs associated by Ethernet Controller. | |
| These LEDs are not integrated in the PHY and PHY doesn't have any | |
| control on them. Ethernet Controller regs are used to control | |
| these defined LEDs. | |
| type: object | |
| properties: | |
| '#address-cells': | |
| const: 1 | |
| '#size-cells': | |
| const: 0 | |
| patternProperties: | |
| '^led@[a-f0-9]+$': | |
| $ref: /schemas/leds/common.yaml# | |
| properties: | |
| reg: | |
| maxItems: 1 | |
| description: | |
| This define the LED index in the PHY or the MAC. It's really | |
| driver dependent and required for ports that define multiple | |
| LED for the same port. | |
| required: | |
| - reg | |
| unevaluatedProperties: false | |
| additionalProperties: false | |
| dependencies: | |
| pcs-handle-names: [pcs-handle] | |
| allOf: | |
| - if: | |
| properties: | |
| phy-mode: | |
| contains: | |
| enum: | |
| - rgmii | |
| - rgmii-rxid | |
| - rgmii-txid | |
| - rgmii-id | |
| then: | |
| properties: | |
| rx-internal-delay-ps: | |
| description: | |
| RGMII Receive Clock Delay defined in pico seconds. This is used for | |
| controllers that have configurable RX internal delays. If this | |
| property is present then the MAC applies the RX delay. | |
| tx-internal-delay-ps: | |
| description: | |
| RGMII Transmit Clock Delay defined in pico seconds. This is used for | |
| controllers that have configurable TX internal delays. If this | |
| property is present then the MAC applies the TX delay. | |
| additionalProperties: true | |
| ... |