drivers/mtd/spi-nor/everspin.c

// We replace the everspin spi nor file as it has a part that we will
// never use with gBMC systems.
#include <linux/mtd/spi-nor.h>
#include <linux/version.h>
#include "core.h"

#if LINUX_VERSION_CODE < KERNEL_VERSION(5,17,0)
#define SNOR_ID(a, b, c) (((a) << 16) | ((b) << 8) | (c))
#define GINFO(name, id, sec) { (name), INFO((id), 0, 64 * 1024, (sec), SECT_4K) }
#elif LINUX_VERSION_CODE < KERNEL_VERSION(6,7,0)
#define SNOR_ID(a, b, c) (((a) << 16) | ((b) << 8) | (c))
#define GINFO(name, id, sec) { (name), INFO((id), 0, 64 * 1024, (sec)) NO_SFDP_FLAGS(SECT_4K) }
#else
#define GINFO(gname, gid, sec) { \
	.id = (gid), \
	.name = (gname), \
	.size = 64 * 1024 * (sec), \
	.no_sfdp_flags = SECT_4K, \
}
#endif

static const struct flash_info google_nor_parts[] = {
	GINFO("hothb2-512", SNOR_ID(0x26, 0x02, 0x17), 512),
	GINFO("hothb2-1024", SNOR_ID(0x26, 0x02, 0x1a), 1024),
	GINFO("dauntlessd2-1024", SNOR_ID(0x26, 0x22, 0x1a), 1024),
	GINFO("dauntlessd2-2048", SNOR_ID(0x26, 0x22, 0x1b), 2048),
};

static void google_nor_default_init(struct spi_nor *nor)
{
	nor->params->quad_enable = spi_nor_sr1_bit6_quad_enable;
#if LINUX_VERSION_CODE < KERNEL_VERSION(6,4,0)
	nor->params->set_4byte_addr_mode = spi_nor_set_4byte_addr_mode;
#else
	nor->params->set_4byte_addr_mode = spi_nor_set_4byte_addr_mode_en4b_ex4b;
#endif
}

static const struct spi_nor_fixups google_nor_fixups = {
	.default_init = google_nor_default_init,
};

const struct spi_nor_manufacturer spi_nor_everspin = {
	.name = "google",
	.parts = google_nor_parts,
	.nparts = ARRAY_SIZE(google_nor_parts),
	.fixups = &google_nor_fixups,
};