| // SPDX-License-Identifier: (GPL-2.0+ OR MIT) | 
 | /* | 
 |  * Device tree for the uDPU board. | 
 |  * Based on Marvell Armada 3720 development board (DB-88F3720-DDR3) | 
 |  * Copyright (C) 2016 Marvell | 
 |  * Copyright (C) 2019 Methode Electronics | 
 |  * Copyright (C) 2019 Telus | 
 |  * | 
 |  * Vladimir Vid <vladimir.vid@sartura.hr> | 
 |  */ | 
 |  | 
 | /dts-v1/; | 
 |  | 
 | #include <dt-bindings/gpio/gpio.h> | 
 | #include "armada-372x.dtsi" | 
 |  | 
 | / { | 
 | 	model = "Methode uDPU Board"; | 
 | 	compatible = "methode,udpu", "marvell,armada3720"; | 
 |  | 
 | 	chosen { | 
 | 		stdout-path = "serial0:115200n8"; | 
 | 	}; | 
 |  | 
 | 	memory@0 { | 
 | 		device_type = "memory"; | 
 | 		reg = <0x00000000 0x00000000 0x00000000 0x20000000>; | 
 | 	}; | 
 |  | 
 | 	leds { | 
 | 		pinctrl-names = "default"; | 
 | 		compatible = "gpio-leds"; | 
 |  | 
 | 		power1 { | 
 | 			label = "udpu:green:power"; | 
 | 			gpios = <&gpionb 11 GPIO_ACTIVE_LOW>; | 
 | 		}; | 
 |  | 
 | 		power2 { | 
 | 			label = "udpu:red:power"; | 
 | 			gpios = <&gpionb 12 GPIO_ACTIVE_LOW>; | 
 | 		}; | 
 |  | 
 | 		network1 { | 
 | 			label = "udpu:green:network"; | 
 | 			gpios = <&gpionb 13 GPIO_ACTIVE_LOW>; | 
 | 		}; | 
 |  | 
 | 		network2 { | 
 | 			label = "udpu:red:network"; | 
 | 			gpios = <&gpionb 14 GPIO_ACTIVE_LOW>; | 
 | 		}; | 
 |  | 
 | 		alarm1 { | 
 | 			label = "udpu:green:alarm"; | 
 | 			gpios = <&gpionb 15 GPIO_ACTIVE_LOW>; | 
 | 		}; | 
 |  | 
 | 		alarm2 { | 
 | 			label = "udpu:red:alarm"; | 
 | 			gpios = <&gpionb 16 GPIO_ACTIVE_LOW>; | 
 | 		}; | 
 | 	}; | 
 |  | 
 | 	sfp_eth0: sfp-eth0 { | 
 | 		compatible = "sff,sfp"; | 
 | 		i2c-bus = <&i2c0>; | 
 | 		los-gpio = <&gpiosb 2 GPIO_ACTIVE_HIGH>; | 
 | 		mod-def0-gpio = <&gpiosb 3 GPIO_ACTIVE_LOW>; | 
 | 		tx-disable-gpio = <&gpiosb 4 GPIO_ACTIVE_HIGH>; | 
 | 		tx-fault-gpio = <&gpiosb 5 GPIO_ACTIVE_HIGH>; | 
 | 	}; | 
 |  | 
 | 	sfp_eth1: sfp-eth1 { | 
 | 		compatible = "sff,sfp"; | 
 | 		i2c-bus = <&i2c1>; | 
 | 		los-gpio = <&gpiosb 7 GPIO_ACTIVE_HIGH>; | 
 | 		mod-def0-gpio = <&gpiosb 8 GPIO_ACTIVE_LOW>; | 
 | 		tx-disable-gpio = <&gpiosb 9 GPIO_ACTIVE_HIGH>; | 
 | 		tx-fault-gpio = <&gpiosb 10 GPIO_ACTIVE_HIGH>; | 
 | 	}; | 
 | }; | 
 |  | 
 | &sdhci0 { | 
 | 	status = "okay"; | 
 | 	bus-width = <8>; | 
 | 	mmc-ddr-1_8v; | 
 | 	mmc-hs400-1_8v; | 
 | 	marvell,pad-type = "fixed-1-8v"; | 
 | 	non-removable; | 
 | 	no-sd; | 
 | 	no-sdio; | 
 | }; | 
 |  | 
 | &spi0 { | 
 | 	status = "okay"; | 
 | 	pinctrl-names = "default"; | 
 | 	pinctrl-0 = <&spi_quad_pins>; | 
 |  | 
 | 	m25p80@0 { | 
 | 		compatible = "jedec,spi-nor"; | 
 | 		reg = <0>; | 
 | 		spi-max-frequency = <54000000>; | 
 |  | 
 | 		partitions { | 
 | 			compatible = "fixed-partitions"; | 
 | 			#address-cells = <1>; | 
 | 			#size-cells = <1>; | 
 | 			/* only bootloader is located on the SPI */ | 
 | 			partition@0 { | 
 | 				label = "uboot"; | 
 | 				reg = <0 0x400000>; | 
 | 			}; | 
 | 		}; | 
 | 	}; | 
 | }; | 
 |  | 
 | &i2c0 { | 
 | 	status = "okay"; | 
 | 	pinctrl-names = "default"; | 
 | 	pinctrl-0 = <&i2c1_pins>; | 
 | }; | 
 |  | 
 | &i2c1 { | 
 | 	status = "okay"; | 
 | 	pinctrl-names = "default"; | 
 | 	pinctrl-0 = <&i2c2_pins>; | 
 |  | 
 | 	lm75@48 { | 
 | 		status = "okay"; | 
 | 		compatible = "lm75"; | 
 | 		reg = <0x48>; | 
 | 	}; | 
 |  | 
 | 	lm75@49 { | 
 | 		status = "okay"; | 
 | 		compatible = "lm75"; | 
 | 		reg = <0x49>; | 
 | 	}; | 
 | }; | 
 |  | 
 | ð0 { | 
 | 	phy-mode = "sgmii"; | 
 | 	status = "okay"; | 
 | 	managed = "in-band-status"; | 
 | 	sfp = <&sfp_eth0>; | 
 | }; | 
 |  | 
 | ð1 { | 
 | 	phy-mode = "sgmii"; | 
 | 	status = "okay"; | 
 | 	managed = "in-band-status"; | 
 | 	sfp = <&sfp_eth1>; | 
 | }; | 
 |  | 
 | &usb3 { | 
 | 	status = "okay"; | 
 | }; | 
 |  | 
 | &uart0 { | 
 | 	status = "okay"; | 
 | }; |