| // SPDX-License-Identifier: (GPL-2.0+ OR MIT) | |
| /* | |
| * DT-overlay to run the PCIe3_4L Dual Mode controller in Root Complex | |
| * mode in the SRNS (Separate Reference Clock No Spread) configuration. | |
| * | |
| * This device tree overlay is only needed (on the RC side) when running | |
| * a setup with two ROCK 5B:s, with one board running in RC mode and the | |
| * other board running in EP mode. | |
| */ | |
| /dts-v1/; | |
| /plugin/; | |
| &pcie30phy { | |
| rockchip,rx-common-refclk-mode = <0 0 0 0>; | |
| }; |