Documentation/devicetree/bindings/mailbox/cix,sky1-mbox.yaml

# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/mailbox/cix,sky1-mbox.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Cixtech mailbox controller

maintainers:
  - Guomin Chen <Guomin.Chen@cixtech.com>

description:
  The Cixtech mailbox controller, used in the Cixtech Sky1 SoC,
  is used for message transmission between multiple processors
  within the SoC, such as the AP, PM, audio DSP, SensorHub MCU,
  and others

  Each Cixtech mailbox controller is unidirectional, so they are
  typically used in pairs-one for receiving and one for transmitting.

  Each Cixtech mailbox supports 11 channels with different transmission modes
    channel 0-7 - Fast channel with 32bit transmit register and IRQ support
    channel 8   - Doorbell mode,using the mailbox as an interrupt-generating
                   mechanism.
    channel 9   - Fifo based channel with 32*32bit depth fifo and IRQ support
    channel 10  - Reg based channel with 32*32bit transmit register and
                   Doorbell+transmit acknowledgment IRQ support

  In the CIX Sky1 SoC use case, there are 4 pairs of mailbox controllers
    AP <--> PM - using Doorbell transfer mode
    AP <--> SE - using REG transfer mode
    AP <--> DSP - using FIFO transfer mode
    AP <--> SensorHub - using FIFO transfer mode

properties:
  compatible:
    const: cix,sky1-mbox

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  "#mbox-cells":
    const: 1

  cix,mbox-dir:
    $ref: /schemas/types.yaml#/definitions/string
    description: Direction of the mailbox relative to the AP
    enum: [tx, rx]

required:
  - compatible
  - reg
  - interrupts
  - "#mbox-cells"
  - cix,mbox-dir

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>

    soc {
        #address-cells = <2>;
        #size-cells = <2>;

        mbox_ap2pm: mailbox@30000000 {
            compatible = "cix,sky1-mbox";
            reg = <0 0x30000000 0 0x10000>;
            interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH 0>;
            #mbox-cells = <1>;
            cix,mbox-dir = "tx";
        };
    };