| #include <dt-bindings/clock/ath79-clk.h> | 
 |  | 
 | / { | 
 | 	compatible = "qca,ar9331"; | 
 |  | 
 | 	#address-cells = <1>; | 
 | 	#size-cells = <1>; | 
 |  | 
 | 	cpus { | 
 | 		#address-cells = <1>; | 
 | 		#size-cells = <0>; | 
 |  | 
 | 		cpu@0 { | 
 | 			device_type = "cpu"; | 
 | 			compatible = "mips,mips24Kc"; | 
 | 			clocks = <&pll ATH79_CLK_CPU>; | 
 | 			reg = <0>; | 
 | 		}; | 
 | 	}; | 
 |  | 
 | 	cpuintc: interrupt-controller { | 
 | 		compatible = "qca,ar7100-cpu-intc"; | 
 |  | 
 | 		interrupt-controller; | 
 | 		#interrupt-cells = <1>; | 
 |  | 
 | 		qca,ddr-wb-channel-interrupts = <2>, <3>; | 
 | 		qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>; | 
 | 	}; | 
 |  | 
 | 	ref: ref { | 
 | 		compatible = "fixed-clock"; | 
 | 		#clock-cells = <0>; | 
 | 	}; | 
 |  | 
 | 	ahb { | 
 | 		compatible = "simple-bus"; | 
 | 		ranges; | 
 |  | 
 | 		#address-cells = <1>; | 
 | 		#size-cells = <1>; | 
 |  | 
 | 		interrupt-parent = <&cpuintc>; | 
 |  | 
 | 		apb { | 
 | 			compatible = "simple-bus"; | 
 | 			ranges; | 
 |  | 
 | 			#address-cells = <1>; | 
 | 			#size-cells = <1>; | 
 |  | 
 | 			interrupt-parent = <&miscintc>; | 
 |  | 
 | 			ddr_ctrl: memory-controller@18000000 { | 
 | 				compatible = "qca,ar7240-ddr-controller"; | 
 | 				reg = <0x18000000 0x100>; | 
 |  | 
 | 				#qca,ddr-wb-channel-cells = <1>; | 
 | 			}; | 
 |  | 
 | 			uart: uart@18020000 { | 
 | 				compatible = "qca,ar9330-uart"; | 
 | 				reg = <0x18020000 0x14>; | 
 |  | 
 | 				interrupts = <3>; | 
 |  | 
 | 				clocks = <&ref>; | 
 | 				clock-names = "uart"; | 
 |  | 
 | 				status = "disabled"; | 
 | 			}; | 
 |  | 
 | 			gpio: gpio@18040000 { | 
 | 				compatible = "qca,ar7100-gpio"; | 
 | 				reg = <0x18040000 0x34>; | 
 | 				interrupts = <2>; | 
 |  | 
 | 				ngpios = <30>; | 
 |  | 
 | 				gpio-controller; | 
 | 				#gpio-cells = <2>; | 
 |  | 
 | 				interrupt-controller; | 
 | 				#interrupt-cells = <2>; | 
 |  | 
 | 				status = "disabled"; | 
 | 			}; | 
 |  | 
 | 			pll: pll-controller@18050000 { | 
 | 				compatible = "qca,ar9330-pll"; | 
 | 				reg = <0x18050000 0x100>; | 
 |  | 
 | 				clocks = <&ref>; | 
 | 				clock-names = "ref"; | 
 |  | 
 | 				#clock-cells = <1>; | 
 | 			}; | 
 |  | 
 | 			miscintc: interrupt-controller@18060010 { | 
 | 				compatible = "qca,ar7240-misc-intc"; | 
 | 				reg = <0x18060010 0x8>; | 
 |  | 
 | 				interrupt-parent = <&cpuintc>; | 
 | 				interrupts = <6>; | 
 |  | 
 | 				interrupt-controller; | 
 | 				#interrupt-cells = <1>; | 
 | 			}; | 
 |  | 
 | 			rst: reset-controller@1806001c { | 
 | 				compatible = "qca,ar7100-reset"; | 
 | 				reg = <0x1806001c 0x4>; | 
 |  | 
 | 				#reset-cells = <1>; | 
 | 			}; | 
 | 		}; | 
 |  | 
 | 		usb: usb@1b000100 { | 
 | 			compatible = "chipidea,usb2"; | 
 | 			reg = <0x1b000000 0x200>; | 
 |  | 
 | 			interrupts = <3>; | 
 | 			resets = <&rst 5>; | 
 |  | 
 | 			phy-names = "usb-phy"; | 
 | 			phys = <&usb_phy>; | 
 |  | 
 | 			status = "disabled"; | 
 | 		}; | 
 |  | 
 | 		spi: spi@1f000000 { | 
 | 			compatible = "qca,ar7100-spi"; | 
 | 			reg = <0x1f000000 0x10>; | 
 |  | 
 | 			clocks = <&pll ATH79_CLK_AHB>; | 
 | 			clock-names = "ahb"; | 
 |  | 
 | 			#address-cells = <1>; | 
 | 			#size-cells = <0>; | 
 |  | 
 | 			status = "disabled"; | 
 | 		}; | 
 | 	}; | 
 |  | 
 | 	usb_phy: usb-phy { | 
 | 		compatible = "qca,ar7100-usb-phy"; | 
 |  | 
 | 		reset-names = "usb-phy", "usb-suspend-override"; | 
 | 		resets = <&rst 4>, <&rst 3>; | 
 |  | 
 | 		#phy-cells = <0>; | 
 |  | 
 | 		status = "disabled"; | 
 | 	}; | 
 | }; |