| # SPDX-License-Identifier: GPL-2.0 | 
 | %YAML 1.2 | 
 | --- | 
 | $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-display-frontend.yaml# | 
 | $schema: http://devicetree.org/meta-schemas/core.yaml# | 
 |  | 
 | title: Allwinner A10 Display Engine Frontend | 
 |  | 
 | maintainers: | 
 |   - Chen-Yu Tsai <wens@csie.org> | 
 |   - Maxime Ripard <mripard@kernel.org> | 
 |  | 
 | description: | | 
 |   The display engine frontend does formats conversion, scaling, | 
 |   deinterlacing and color space conversion. | 
 |  | 
 | properties: | 
 |   compatible: | 
 |     enum: | 
 |       - allwinner,sun4i-a10-display-frontend | 
 |       - allwinner,sun5i-a13-display-frontend | 
 |       - allwinner,sun6i-a31-display-frontend | 
 |       - allwinner,sun7i-a20-display-frontend | 
 |       - allwinner,sun8i-a23-display-frontend | 
 |       - allwinner,sun8i-a33-display-frontend | 
 |       - allwinner,sun9i-a80-display-frontend | 
 |  | 
 |   reg: | 
 |     maxItems: 1 | 
 |  | 
 |   interrupts: | 
 |     maxItems: 1 | 
 |  | 
 |   clocks: | 
 |     items: | 
 |       - description: The frontend interface clock | 
 |       - description: The frontend module clock | 
 |       - description: The frontend DRAM clock | 
 |  | 
 |   clock-names: | 
 |     items: | 
 |       - const: ahb | 
 |       - const: mod | 
 |       - const: ram | 
 |  | 
 |   # FIXME: This should be made required eventually once every SoC will | 
 |   # have the MBUS declared. | 
 |   interconnects: | 
 |     maxItems: 1 | 
 |  | 
 |   # FIXME: This should be made required eventually once every SoC will | 
 |   # have the MBUS declared. | 
 |   interconnect-names: | 
 |     const: dma-mem | 
 |  | 
 |   resets: | 
 |     maxItems: 1 | 
 |  | 
 |   ports: | 
 |     $ref: /schemas/graph.yaml#/properties/ports | 
 |  | 
 |     properties: | 
 |       port@0: | 
 |         $ref: /schemas/graph.yaml#/properties/port | 
 |         description: | | 
 |           Input endpoints of the controller. | 
 |  | 
 |       port@1: | 
 |         $ref: /schemas/graph.yaml#/properties/port | 
 |         description: | | 
 |           Output endpoints of the controller. | 
 |  | 
 |     required: | 
 |       - port@1 | 
 |  | 
 | required: | 
 |   - compatible | 
 |   - reg | 
 |   - interrupts | 
 |   - clocks | 
 |   - clock-names | 
 |   - resets | 
 |   - ports | 
 |  | 
 | additionalProperties: false | 
 |  | 
 | examples: | 
 |   - | | 
 |     #include <dt-bindings/clock/sun4i-a10-ccu.h> | 
 |     #include <dt-bindings/reset/sun4i-a10-ccu.h> | 
 |  | 
 |     fe0: display-frontend@1e00000 { | 
 |         compatible = "allwinner,sun4i-a10-display-frontend"; | 
 |         reg = <0x01e00000 0x20000>; | 
 |         interrupts = <47>; | 
 |         clocks = <&ccu CLK_AHB_DE_FE0>, <&ccu CLK_DE_FE0>, | 
 |                  <&ccu CLK_DRAM_DE_FE0>; | 
 |         clock-names = "ahb", "mod", | 
 |                       "ram"; | 
 |         resets = <&ccu RST_DE_FE0>; | 
 |  | 
 |         ports { | 
 |             #address-cells = <1>; | 
 |             #size-cells = <0>; | 
 |  | 
 |             fe0_out: port@1 { | 
 |                 #address-cells = <1>; | 
 |                 #size-cells = <0>; | 
 |                 reg = <1>; | 
 |  | 
 |                 fe0_out_be0: endpoint@0 { | 
 |                     reg = <0>; | 
 |                     remote-endpoint = <&be0_in_fe0>; | 
 |                 }; | 
 |  | 
 |                 fe0_out_be1: endpoint@1 { | 
 |                     reg = <1>; | 
 |                     remote-endpoint = <&be1_in_fe0>; | 
 |                 }; | 
 |             }; | 
 |         }; | 
 |     }; | 
 |  | 
 |  | 
 | ... |