| // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| /* |
| * Copyright (c) 2024 Amlogic, Inc. All rights reserved. |
| */ |
| |
| #include "amlogic-a4-common.dtsi" |
| #include "amlogic-a4-reset.h" |
| #include <dt-bindings/power/amlogic,a4-pwrc.h> |
| #include <dt-bindings/pinctrl/amlogic,pinctrl.h> |
| / { |
| cpus { |
| #address-cells = <2>; |
| #size-cells = <0>; |
| |
| cpu0: cpu@0 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-a53"; |
| reg = <0x0 0x0>; |
| enable-method = "psci"; |
| }; |
| |
| cpu1: cpu@1 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-a53"; |
| reg = <0x0 0x1>; |
| enable-method = "psci"; |
| }; |
| |
| cpu2: cpu@2 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-a53"; |
| reg = <0x0 0x2>; |
| enable-method = "psci"; |
| }; |
| |
| cpu3: cpu@3 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-a53"; |
| reg = <0x0 0x3>; |
| enable-method = "psci"; |
| }; |
| }; |
| |
| sm: secure-monitor { |
| compatible = "amlogic,meson-gxbb-sm"; |
| |
| pwrc: power-controller { |
| compatible = "amlogic,a4-pwrc"; |
| #power-domain-cells = <1>; |
| }; |
| }; |
| }; |
| |
| &apb { |
| reset: reset-controller@2000 { |
| compatible = "amlogic,a4-reset", |
| "amlogic,meson-s4-reset"; |
| reg = <0x0 0x2000 0x0 0x98>; |
| #reset-cells = <1>; |
| }; |
| |
| periphs_pinctrl: pinctrl@4000 { |
| compatible = "amlogic,pinctrl-a4"; |
| #address-cells = <2>; |
| #size-cells = <2>; |
| ranges = <0x0 0x0 0x0 0x4000 0x0 0x280>; |
| |
| gpiox: gpio@100 { |
| reg = <0 0x100 0 0x40>, <0 0xc 0 0xc>; |
| reg-names = "gpio", "mux"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_X<<8) 18>; |
| }; |
| |
| gpiot: gpio@140 { |
| reg = <0 0x140 0 0x40>, <0 0x2c 0 0xc>; |
| reg-names = "gpio", "mux"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_T<<8) 23>; |
| }; |
| |
| gpiod: gpio@180 { |
| reg = <0 0x180 0 0x40>, <0 0x40 0 0x8>; |
| reg-names = "gpio", "mux"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_D<<8) 16>; |
| }; |
| |
| gpioe: gpio@1c0 { |
| reg = <0 0x1c0 0 0x40>, <0 0x48 0 0x4>; |
| reg-names = "gpio", "mux"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_E<<8) 2>; |
| }; |
| |
| gpiob: gpio@240 { |
| reg = <0 0x240 0 0x40>, <0 0 0 0x8>; |
| reg-names = "gpio", "mux"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_B<<8) 14>; |
| }; |
| |
| func-uart-a { |
| uart_a_default: group-uart-a-pins1 { |
| pinmux = <AML_PINMUX(AMLOGIC_GPIO_X, 11, 1)>, |
| <AML_PINMUX(AMLOGIC_GPIO_X, 12, 1)>, |
| <AML_PINMUX(AMLOGIC_GPIO_X, 13, 1)>, |
| <AML_PINMUX(AMLOGIC_GPIO_X, 14, 1)>; |
| }; |
| |
| group-uart-a-pins2 { |
| pinmux = <AML_PINMUX(AMLOGIC_GPIO_D, 2, 3)>, |
| <AML_PINMUX(AMLOGIC_GPIO_D, 3, 3)>; |
| bias-pull-up; |
| drive-strength-microamp = <4000>; |
| }; |
| }; |
| |
| func-uart-b { |
| uart_b_default: group-uart-b-pins { |
| pinmux = <AML_PINMUX(AMLOGIC_GPIO_E, 0, 3)>, |
| <AML_PINMUX(AMLOGIC_GPIO_E, 1, 3)>; |
| bias-pull-up; |
| drive-strength-microamp = <4000>; |
| }; |
| }; |
| |
| func-uart-d { |
| uart_d_default: group-uart-d-pins1 { |
| pinmux = <AML_PINMUX(AMLOGIC_GPIO_T, 18, 4)>, |
| <AML_PINMUX(AMLOGIC_GPIO_T, 19, 4)>; |
| bias-pull-up; |
| drive-strength-microamp = <4000>; |
| }; |
| |
| group-uart-d-pins2 { |
| pinmux = <AML_PINMUX(AMLOGIC_GPIO_T, 7, 2)>, |
| <AML_PINMUX(AMLOGIC_GPIO_T, 8, 2)>, |
| <AML_PINMUX(AMLOGIC_GPIO_T, 9, 2)>, |
| <AML_PINMUX(AMLOGIC_GPIO_T, 10, 2)>; |
| bias-pull-up; |
| drive-strength-microamp = <4000>; |
| }; |
| }; |
| |
| func-uart-e { |
| uart_e_default: group-uart-e-pins { |
| pinmux = <AML_PINMUX(AMLOGIC_GPIO_T, 14, 3)>, |
| <AML_PINMUX(AMLOGIC_GPIO_T, 15, 3)>, |
| <AML_PINMUX(AMLOGIC_GPIO_T, 16, 3)>, |
| <AML_PINMUX(AMLOGIC_GPIO_T, 17, 3)>; |
| bias-pull-up; |
| drive-strength-microamp = <4000>; |
| }; |
| }; |
| }; |
| |
| gpio_intc: interrupt-controller@4080 { |
| compatible = "amlogic,a4-gpio-intc", |
| "amlogic,meson-gpio-intc"; |
| reg = <0x0 0x4080 0x0 0x20>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| amlogic,channel-interrupts = |
| <10 11 12 13 14 15 16 17 18 19 20 21>; |
| }; |
| |
| ao_pinctrl: pinctrl@8e700 { |
| compatible = "amlogic,pinctrl-a4"; |
| #address-cells = <2>; |
| #size-cells = <2>; |
| ranges = <0x0 0x0 0x0 0x8e700 0x0 0x80>; |
| |
| gpioao: gpio@4 { |
| reg = <0 0x4 0 0x16>, <0 0 0 0x4>; |
| reg-names = "gpio", "mux"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_AO<<8) 7>; |
| }; |
| |
| test_n: gpio@44 { |
| reg = <0 0x44 0 0x20>; |
| reg-names = "gpio"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_TEST_N<<8) 1>; |
| }; |
| }; |
| |
| gpio_ao_intc: interrupt-controller@8e72c { |
| compatible = "amlogic,a4-gpio-ao-intc", |
| "amlogic,meson-gpio-intc"; |
| reg = <0x0 0x8e72c 0x0 0x0c>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| amlogic,channel-interrupts = <140 141>; |
| }; |
| }; |