Documentation/devicetree/bindings/phy/st,stm32mp25-combophy.yaml

# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/st,stm32mp25-combophy.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: STMicroelectronics STM32MP25 USB3/PCIe COMBOPHY

maintainers:
  - Christian Bruel <christian.bruel@foss.st.com>

description:
  Single lane PHY shared (exclusive) between the USB3 and PCIe controllers.
  Supports 5Gbit/s for USB3 and PCIe gen2 or 2.5Gbit/s for PCIe gen1.

properties:
  compatible:
    const: st,stm32mp25-combophy

  reg:
    maxItems: 1

  "#phy-cells":
    const: 1

  clocks:
    minItems: 2
    items:
      - description: apb Bus clock mandatory to access registers.
      - description: ker Internal RCC reference clock for USB3 or PCIe
      - description: pad Optional on board clock input for PCIe only. Typically an
                     external 100Mhz oscillator wired on dedicated CLKIN pad. Used as reference
                     clock input instead of the ker

  clock-names:
    minItems: 2
    items:
      - const: apb
      - const: ker
      - const: pad

  resets:
    maxItems: 1

  reset-names:
    const: phy

  power-domains:
    maxItems: 1

  wakeup-source: true

  interrupts:
    maxItems: 1
    description: interrupt used for wakeup

  access-controllers:
    maxItems: 1
    description: Phandle to the rifsc device to check access right.

  st,ssc-on:
    $ref: /schemas/types.yaml#/definitions/flag
    description:
      A property whose presence indicates that the Spread Spectrum Clocking is active.

  st,rx-equalizer:
    $ref: /schemas/types.yaml#/definitions/uint32
    minimum: 0
    maximum: 7
    default: 2
    description:
      A 3 bit value to tune the RX fixed equalizer setting for optimal eye compliance

  st,output-micro-ohms:
    minimum: 3999000
    maximum: 6090000
    default: 4968000
    description:
      A value property to tune the Single Ended Output Impedance, simulations results
      at 25C for a VDDP=0.8V. The hardware accepts discrete values in this range.

  st,output-vswing-microvolt:
    minimum: 442000
    maximum: 803000
    default: 803000
    description:
      A value property in microvolt to tune the Single Ended Output Voltage Swing to change the
      Vlo, Vhi for a VDDP = 0.8V. The hardware accepts discrete values in this range.

required:
  - compatible
  - reg
  - "#phy-cells"
  - clocks
  - clock-names
  - resets
  - reset-names

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/st,stm32mp25-rcc.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/reset/st,stm32mp25-rcc.h>

    phy@480c0000 {
        compatible = "st,stm32mp25-combophy";
        reg = <0x480c0000 0x1000>;
        #phy-cells = <1>;
        clocks = <&rcc CK_BUS_USB3PCIEPHY>, <&rcc CK_KER_USB3PCIEPHY>;
        clock-names = "apb", "ker";
        resets = <&rcc USB3PCIEPHY_R>;
        reset-names = "phy";
        access-controllers = <&rifsc 67>;
        power-domains = <&CLUSTER_PD>;
        wakeup-source;
        interrupts-extended = <&exti1 45 IRQ_TYPE_EDGE_FALLING>;
    };