| // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| /* |
| * Copyright (C) 2025 PHYTEC Messtechnik GmbH |
| * Author: Christoph Stoidner <c.stoidner@phytec.de> |
| * |
| * Product homepage: |
| * phyBOARD-Segin carrier board is reused for the i.MX91 design. |
| * https://www.phytec.eu/en/produkte/single-board-computer/phyboard-segin-imx6ul/ |
| */ |
| /dts-v1/; |
| |
| #include "imx91-phycore-som.dtsi" |
| |
| /{ |
| model = "PHYTEC phyBOARD-Segin-i.MX91"; |
| compatible = "phytec,imx91-phyboard-segin", "phytec,imx91-phycore-som", |
| "fsl,imx91"; |
| |
| aliases { |
| ethernet1 = &eqos; |
| gpio0 = &gpio1; |
| gpio1 = &gpio2; |
| gpio2 = &gpio3; |
| gpio3 = &gpio4; |
| i2c0 = &lpi2c1; |
| i2c1 = &lpi2c2; |
| mmc0 = &usdhc1; |
| mmc1 = &usdhc2; |
| rtc0 = &i2c_rtc; |
| rtc1 = &bbnsm_rtc; |
| serial0 = &lpuart1; |
| }; |
| |
| chosen { |
| stdout-path = &lpuart1; |
| }; |
| |
| flexcan1_tc: can-phy0 { |
| /* TI SN65HVD234D CAN-CC 1MBit/s */ |
| compatible = "ti,tcan1043"; |
| #phy-cells = <0>; |
| max-bitrate = <1000000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_flexcan1_tc>; |
| enable-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| reg_sound_1v8: regulator-sound-1v8 { |
| compatible = "regulator-fixed"; |
| regulator-max-microvolt = <1800000>; |
| regulator-min-microvolt = <1800000>; |
| regulator-name = "VCC1V8_AUDIO"; |
| }; |
| |
| reg_sound_3v3: regulator-sound-3v3 { |
| compatible = "regulator-fixed"; |
| regulator-max-microvolt = <3300000>; |
| regulator-min-microvolt = <3300000>; |
| regulator-name = "VCC3V3_ANALOG"; |
| }; |
| |
| reg_usb_otg1_vbus: regulator-usb-otg1-vbus { |
| compatible = "regulator-fixed"; |
| regulator-name = "USB_OTG1_VBUS"; |
| regulator-max-microvolt = <5000000>; |
| regulator-min-microvolt = <5000000>; |
| regulator-always-on; |
| }; |
| |
| reg_usb_otg2_vbus: regulator-usb-otg2-vbus { |
| compatible = "regulator-fixed"; |
| regulator-name = "USB_OTG2_VBUS"; |
| regulator-max-microvolt = <5000000>; |
| regulator-min-microvolt = <5000000>; |
| regulator-always-on; |
| }; |
| |
| reg_usdhc2_vmmc: regulator-usdhc2 { |
| compatible = "regulator-fixed"; |
| enable-active-high; |
| gpio = <&gpio3 7 GPIO_ACTIVE_HIGH>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; |
| regulator-max-microvolt = <3300000>; |
| regulator-min-microvolt = <3300000>; |
| regulator-name = "VCC_SD"; |
| }; |
| |
| sound: sound { |
| compatible = "simple-audio-card"; |
| simple-audio-card,name = "phyBOARD-Segin-TLV320AIC3007"; |
| simple-audio-card,format = "i2s"; |
| simple-audio-card,bitclock-master = <&dailink_master>; |
| simple-audio-card,frame-master = <&dailink_master>; |
| simple-audio-card,widgets = |
| "Line", "Line In", |
| "Line", "Line Out", |
| "Speaker", "Speaker"; |
| simple-audio-card,routing = |
| "Line Out", "LLOUT", |
| "Line Out", "RLOUT", |
| "Speaker", "SPOP", |
| "Speaker", "SPOM", |
| "LINE1L", "Line In", |
| "LINE1R", "Line In"; |
| |
| simple-audio-card,cpu { |
| sound-dai = <&sai1>; |
| }; |
| |
| dailink_master: simple-audio-card,codec { |
| sound-dai = <&audio_codec>; |
| clocks = <&clk IMX93_CLK_SAI1>; |
| }; |
| }; |
| }; |
| |
| /* Ethernet */ |
| &eqos { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_eqos>; |
| phy-mode = "rmii"; |
| phy-handle = <ðphy2>; |
| assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>, |
| <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>; |
| assigned-clock-rates = <100000000>, <50000000>; |
| status = "okay"; |
| }; |
| |
| &mdio { |
| ethphy2: ethernet-phy@2 { |
| compatible = "ethernet-phy-id0022.1561"; |
| reg = <2>; |
| clocks = <&clk IMX91_CLK_ENET2_REGULAR>; |
| clock-names = "rmii-ref"; |
| micrel,led-mode = <1>; |
| }; |
| }; |
| |
| &gpio1 { |
| gpio-line-names = "", "USER_LED", "I2C1_SCL", "I2C1_SDA"; |
| }; |
| |
| &gpio3 { |
| gpio-line-names = "SD1_nCD", "", "", "", "", |
| "", "", "SD1_nRESET"; |
| }; |
| |
| &gpio4 { |
| gpio-line-names = "", "", "", "", "", |
| "", "", "", "", "", |
| "", "", "", "", "", |
| "", "CAN_EN", "", "", "", |
| "", "", "", "RESET_PHY", "", |
| "", "RTC_nINT", "PMIC_IRQ_B"; |
| }; |
| |
| /* CAN */ |
| &flexcan1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_flexcan1>; |
| phys = <&flexcan1_tc>; |
| status = "okay"; |
| }; |
| |
| /* I2C2 */ |
| &lpi2c2 { |
| clock-frequency = <400000>; |
| pinctrl-names = "default", "gpio"; |
| pinctrl-0 = <&pinctrl_lpi2c2>; |
| pinctrl-1 = <&pinctrl_lpi2c2_gpio>; |
| scl-gpios = <&gpio1 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; |
| sda-gpios = <&gpio1 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; |
| status = "okay"; |
| |
| /* Codec */ |
| audio_codec: audio-codec@18 { |
| compatible = "ti,tlv320aic3007"; |
| reg = <0x18>; |
| #sound-dai-cells = <0>; |
| AVDD-supply = <®_sound_3v3>; |
| IOVDD-supply = <®_sound_3v3>; |
| DRVDD-supply = <®_sound_3v3>; |
| DVDD-supply = <®_sound_1v8>; |
| }; |
| |
| /* RTC */ |
| i2c_rtc: rtc@68 { |
| compatible = "microcrystal,rv4162"; |
| reg = <0x68>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_rtc>; |
| interrupt-parent = <&gpio4>; |
| interrupts = <26 IRQ_TYPE_LEVEL_LOW>; |
| }; |
| }; |
| |
| /* Console */ |
| &lpuart1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart1>; |
| status = "okay"; |
| }; |
| |
| /* Audio */ |
| &sai1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_sai1>; |
| assigned-clocks = <&clk IMX93_CLK_SAI1>; |
| assigned-clock-parents = <&clk IMX93_CLK_AUDIO_PLL>; |
| assigned-clock-rates = <19200000>; |
| fsl,sai-mclk-direction-output; |
| status = "okay"; |
| }; |
| |
| /* USB */ |
| &usbphynop1 { |
| vbus-supply = <®_usb_otg1_vbus>; |
| }; |
| |
| &usbphynop2 { |
| vbus-supply = <®_usb_otg2_vbus>; |
| }; |
| |
| &usbotg1 { |
| disable-over-current; |
| dr_mode = "otg"; |
| status = "okay"; |
| }; |
| |
| &usbotg2 { |
| disable-over-current; |
| dr_mode = "host"; |
| status = "okay"; |
| }; |
| |
| /* SD-Card */ |
| &usdhc2 { |
| pinctrl-names = "default", "state_100mhz", "state_200mhz"; |
| pinctrl-0 = <&pinctrl_usdhc2_default>, <&pinctrl_usdhc2_cd>; |
| pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_cd>; |
| pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_cd>; |
| bus-width = <4>; |
| cd-gpios = <&gpio3 0 GPIO_ACTIVE_LOW>; |
| disable-wp; |
| no-mmc; |
| no-sdio; |
| vmmc-supply = <®_usdhc2_vmmc>; |
| status = "okay"; |
| }; |
| |
| &iomuxc { |
| pinctrl_eqos: eqosgrp { |
| fsl,pins = < |
| MX91_PAD_ENET1_TD2__ENET_QOS_CLOCK_GENERATE_CLK 0x4000050e |
| MX91_PAD_ENET1_RD0__ENET_QOS_RGMII_RD0 0x57e |
| MX91_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1 0x57e |
| MX91_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0 0x50e |
| MX91_PAD_ENET1_TD1__ENET1_RGMII_TD1 0x50e |
| MX91_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x57e |
| MX91_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x50e |
| MX91_PAD_ENET1_RXC__ENET_QOS_RX_ER 0x57e |
| >; |
| }; |
| |
| pinctrl_flexcan1: flexcan1grp { |
| fsl,pins = < |
| MX91_PAD_PDM_BIT_STREAM0__CAN1_RX 0x139e |
| MX91_PAD_PDM_CLK__CAN1_TX 0x139e |
| >; |
| }; |
| |
| pinctrl_flexcan1_tc: flexcan1tcgrp { |
| fsl,pins = < |
| MX91_PAD_ENET2_TD3__GPIO4_IO16 0x31e |
| >; |
| }; |
| |
| pinctrl_lpi2c2: lpi2c2grp { |
| fsl,pins = < |
| MX91_PAD_I2C2_SCL__LPI2C2_SCL 0x40000b9e |
| MX91_PAD_I2C2_SDA__LPI2C2_SDA 0x40000b9e |
| >; |
| }; |
| |
| pinctrl_lpi2c2_gpio: lpi2c2gpiogrp { |
| fsl,pins = < |
| MX91_PAD_I2C2_SCL__GPIO1_IO2 0x31e |
| MX91_PAD_I2C2_SDA__GPIO1_IO3 0x31e |
| >; |
| }; |
| |
| pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp { |
| fsl,pins = < |
| MX91_PAD_SD2_RESET_B__GPIO3_IO7 0x31e |
| >; |
| }; |
| |
| pinctrl_rtc: rtcgrp { |
| fsl,pins = < |
| MX91_PAD_ENET2_RD2__GPIO4_IO26 0x31e |
| >; |
| }; |
| |
| pinctrl_sai1: sai1grp { |
| fsl,pins = < |
| MX91_PAD_UART2_RXD__SAI1_MCLK 0x1202 |
| MX91_PAD_SAI1_TXFS__SAI1_TX_SYNC 0x1202 |
| MX91_PAD_SAI1_TXC__SAI1_TX_BCLK 0x1202 |
| MX91_PAD_SAI1_TXD0__SAI1_TX_DATA0 0x1402 |
| MX91_PAD_SAI1_RXD0__SAI1_RX_DATA0 0x1402 |
| >; |
| }; |
| |
| pinctrl_uart1: uart1grp { |
| fsl,pins = < |
| MX91_PAD_UART1_RXD__LPUART1_RX 0x31e |
| MX91_PAD_UART1_TXD__LPUART1_TX 0x30e |
| >; |
| }; |
| |
| pinctrl_usdhc2_cd: usdhc2cdgrp { |
| fsl,pins = < |
| MX91_PAD_SD2_CD_B__GPIO3_IO0 0x31e |
| >; |
| }; |
| |
| pinctrl_usdhc2_default: usdhc2grp { |
| fsl,pins = < |
| MX91_PAD_SD2_CLK__USDHC2_CLK 0x118e |
| MX91_PAD_SD2_CMD__USDHC2_CMD 0x1382 |
| MX91_PAD_SD2_DATA0__USDHC2_DATA0 0x1386 |
| MX91_PAD_SD2_DATA1__USDHC2_DATA1 0x138e |
| MX91_PAD_SD2_DATA2__USDHC2_DATA2 0x139e |
| MX91_PAD_SD2_DATA3__USDHC2_DATA3 0x139e |
| MX91_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e |
| >; |
| }; |
| |
| pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { |
| fsl,pins = < |
| MX91_PAD_SD2_CLK__USDHC2_CLK 0x119e |
| MX91_PAD_SD2_CMD__USDHC2_CMD 0x139e |
| MX91_PAD_SD2_DATA0__USDHC2_DATA0 0x138e |
| MX91_PAD_SD2_DATA1__USDHC2_DATA1 0x138e |
| MX91_PAD_SD2_DATA2__USDHC2_DATA2 0x139e |
| MX91_PAD_SD2_DATA3__USDHC2_DATA3 0x139e |
| MX91_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e |
| >; |
| }; |
| |
| pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { |
| fsl,pins = < |
| MX91_PAD_SD2_CLK__USDHC2_CLK 0x118e |
| MX91_PAD_SD2_CMD__USDHC2_CMD 0x138e |
| MX91_PAD_SD2_DATA0__USDHC2_DATA0 0x139e |
| MX91_PAD_SD2_DATA1__USDHC2_DATA1 0x139e |
| MX91_PAD_SD2_DATA2__USDHC2_DATA2 0x139e |
| MX91_PAD_SD2_DATA3__USDHC2_DATA3 0x139e |
| MX91_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e |
| >; |
| }; |
| }; |
