| // SPDX-License-Identifier: GPL-2.0 OR MIT |
| /* |
| * Copyright (c) 2024 Yixun Lan <dlan@gentoo.org> |
| */ |
| |
| #include <dt-bindings/gpio/gpio.h> |
| |
| #define K1_PADCONF(pin, func) (((pin) << 16) | (func)) |
| |
| /* Map GPIO pin to each bank's <index, offset> */ |
| #define K1_GPIO(x) (x / 32) (x % 32) |
| |
| &pinctrl { |
| gmac0_cfg: gmac0-cfg { |
| gmac0-pins { |
| pinmux = <K1_PADCONF(0, 1)>, /* gmac0_rxdv */ |
| <K1_PADCONF(1, 1)>, /* gmac0_rx_d0 */ |
| <K1_PADCONF(2, 1)>, /* gmac0_rx_d1 */ |
| <K1_PADCONF(3, 1)>, /* gmac0_rx_clk */ |
| <K1_PADCONF(4, 1)>, /* gmac0_rx_d2 */ |
| <K1_PADCONF(5, 1)>, /* gmac0_rx_d3 */ |
| <K1_PADCONF(6, 1)>, /* gmac0_tx_d0 */ |
| <K1_PADCONF(7, 1)>, /* gmac0_tx_d1 */ |
| <K1_PADCONF(8, 1)>, /* gmac0_tx */ |
| <K1_PADCONF(9, 1)>, /* gmac0_tx_d2 */ |
| <K1_PADCONF(10, 1)>, /* gmac0_tx_d3 */ |
| <K1_PADCONF(11, 1)>, /* gmac0_tx_en */ |
| <K1_PADCONF(12, 1)>, /* gmac0_mdc */ |
| <K1_PADCONF(13, 1)>, /* gmac0_mdio */ |
| <K1_PADCONF(14, 1)>; /* gmac0_int_n */ |
| |
| bias-pull-up = <0>; |
| drive-strength = <21>; |
| }; |
| }; |
| |
| gmac0_clk_ref_cfg: gmac0-clk-ref-cfg { |
| gmac0-clk-ref-pins { |
| pinmux = <K1_PADCONF(45, 1)>; /* gmac0_clk_ref */ |
| |
| bias-pull-up = <0>; |
| drive-strength = <21>; |
| }; |
| }; |
| |
| gmac1_cfg: gmac1-cfg { |
| gmac1-pins { |
| pinmux = <K1_PADCONF(29, 1)>, /* gmac1_rxdv */ |
| <K1_PADCONF(30, 1)>, /* gmac1_rx_d0 */ |
| <K1_PADCONF(31, 1)>, /* gmac1_rx_d1 */ |
| <K1_PADCONF(32, 1)>, /* gmac1_rx_clk */ |
| <K1_PADCONF(33, 1)>, /* gmac1_rx_d2 */ |
| <K1_PADCONF(34, 1)>, /* gmac1_rx_d3 */ |
| <K1_PADCONF(35, 1)>, /* gmac1_tx_d0 */ |
| <K1_PADCONF(36, 1)>, /* gmac1_tx_d1 */ |
| <K1_PADCONF(37, 1)>, /* gmac1_tx */ |
| <K1_PADCONF(38, 1)>, /* gmac1_tx_d2 */ |
| <K1_PADCONF(39, 1)>, /* gmac1_tx_d3 */ |
| <K1_PADCONF(40, 1)>, /* gmac1_tx_en */ |
| <K1_PADCONF(41, 1)>, /* gmac1_mdc */ |
| <K1_PADCONF(42, 1)>, /* gmac1_mdio */ |
| <K1_PADCONF(43, 1)>; /* gmac1_int_n */ |
| |
| bias-pull-up = <0>; |
| drive-strength = <21>; |
| }; |
| }; |
| |
| gmac1_clk_ref_cfg: gmac1-clk-ref-cfg { |
| gmac1-clk-ref-pins { |
| pinmux = <K1_PADCONF(46, 1)>; /* gmac1_clk_ref */ |
| |
| bias-pull-up = <0>; |
| drive-strength = <21>; |
| }; |
| }; |
| |
| i2c2_0_cfg: i2c2-0-cfg { |
| i2c2-0-pins { |
| pinmux = <K1_PADCONF(84, 4)>, /* I2C2_SCL */ |
| <K1_PADCONF(85, 4)>; /* I2C2_SDA */ |
| }; |
| }; |
| |
| i2c8_cfg: i2c8-cfg { |
| i2c8-0-pins { |
| pinmux = <K1_PADCONF(93, 0)>, /* PWR_SCL */ |
| <K1_PADCONF(94, 0)>; /* PWR_SDA */ |
| }; |
| }; |
| |
| qspi_cfg: qspi-cfg { |
| qspi-pins { |
| pinmux = <K1_PADCONF(98, 0)>, /* QSPI_DATA3 */ |
| <K1_PADCONF(99, 0)>, /* QSPI_DATA2 */ |
| <K1_PADCONF(100, 0)>, /* QSPI_DATA1 */ |
| <K1_PADCONF(101, 0)>, /* QSPI_DATA0 */ |
| <K1_PADCONF(102, 0)>; /* QSPI_CLK */ |
| |
| bias-disable; |
| drive-strength = <19>; |
| power-source = <3300>; |
| }; |
| |
| qspi-cs1-pins { |
| pinmux = <K1_PADCONF(103, 0)>; /* QSPI_CS1 */ |
| bias-pull-up = <0>; |
| drive-strength = <19>; |
| power-source = <3300>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart0_0_cfg: uart0-0-cfg { |
| uart0-0-pins { |
| pinmux = <K1_PADCONF(104, 3)>, /* uart0_txd */ |
| <K1_PADCONF(105, 3)>; /* uart0_rxd */ |
| power-source = <3300>; |
| bias-pull-up = <0>; |
| drive-strength = <19>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart0_1_cfg: uart0-1-cfg { |
| uart0-1-pins { |
| pinmux = <K1_PADCONF(108, 1)>, /* uart0_txd */ |
| <K1_PADCONF(80, 3)>; /* uart0_rxd */ |
| power-source = <3300>; |
| bias-pull-up = <0>; |
| drive-strength = <19>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart0_2_cfg: uart0-2-cfg { |
| uart0-2-pins { |
| pinmux = <K1_PADCONF(68, 2)>, /* uart0_txd */ |
| <K1_PADCONF(69, 2)>; /* uart0_rxd */ |
| bias-pull-up = <0>; |
| drive-strength = <32>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart2_0_cfg: uart2-0-cfg { |
| uart2-0-pins { |
| pinmux = <K1_PADCONF(21, 1)>, /* uart2_txd */ |
| <K1_PADCONF(22, 1)>; /* uart2_rxd */ |
| bias-pull-up = <0>; |
| drive-strength = <32>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart2_0_cts_rts_cfg: uart2-0-cts-rts-cfg { |
| uart2-0-pins { |
| pinmux = <K1_PADCONF(23, 1)>, /* uart2_cts */ |
| <K1_PADCONF(24, 1)>; /* uart2_rts */ |
| bias-pull-up = <0>; |
| drive-strength = <32>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart3_0_cfg: uart3-0-cfg { |
| uart3-0-pins { |
| pinmux = <K1_PADCONF(81, 2)>, /* uart3_txd */ |
| <K1_PADCONF(82, 2)>; /* uart3_rxd */ |
| bias-pull-up = <0>; |
| drive-strength = <32>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart3_0_cts_rts_cfg: uart3-0-cts-rts-cfg { |
| uart3-0-pins { |
| pinmux = <K1_PADCONF(83, 2)>, /* uart3_cts */ |
| <K1_PADCONF(84, 2)>; /* uart3_rts */ |
| bias-pull-up = <0>; |
| drive-strength = <32>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart3_1_cfg: uart3-1-cfg { |
| uart3-1-pins { |
| pinmux = <K1_PADCONF(18, 2)>, /* uart3_txd */ |
| <K1_PADCONF(19, 2)>; /* uart3_rxd */ |
| bias-pull-up = <0>; |
| drive-strength = <32>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart3_1_cts_rts_cfg: uart3-1-cts-rts-cfg { |
| uart3-1-pins { |
| pinmux = <K1_PADCONF(20, 2)>, /* uart3_cts */ |
| <K1_PADCONF(21, 2)>; /* uart3_rts */ |
| bias-pull-up = <0>; |
| drive-strength = <32>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart3_2_cfg: uart3-2-cfg { |
| uart3-2-pins { |
| pinmux = <K1_PADCONF(53, 4)>, /* uart3_txd */ |
| <K1_PADCONF(54, 4)>; /* uart3_rxd */ |
| bias-pull-up = <0>; |
| drive-strength = <32>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart3_2_cts_rts_cfg: uart3-2-cts-rts-cfg { |
| uart3-2-pins { |
| pinmux = <K1_PADCONF(55, 4)>, /* uart3_cts */ |
| <K1_PADCONF(56, 4)>; /* uart3_rts */ |
| bias-pull-up = <0>; |
| drive-strength = <32>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart4_0_cfg: uart4-0-cfg { |
| uart4-0-pins { |
| pinmux = <K1_PADCONF(100, 4)>, /* uart4_txd */ |
| <K1_PADCONF(101, 4)>; /* uart4_rxd */ |
| power-source = <3300>; |
| bias-pull-up = <0>; |
| drive-strength = <19>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart4_1_cfg: uart4-1-cfg { |
| uart4-1-pins { |
| pinmux = <K1_PADCONF(83, 3)>, /* uart4_txd */ |
| <K1_PADCONF(84, 3)>; /* uart4_rxd */ |
| bias-pull-up = <0>; |
| drive-strength = <32>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart4_1_cts_rts_cfg: uart4-1-cts-rts-cfg { |
| uart4-1-pins { |
| pinmux = <K1_PADCONF(81, 3)>, /* uart4_cts */ |
| <K1_PADCONF(82, 3)>; /* uart4_rts */ |
| bias-pull-up = <0>; |
| drive-strength = <32>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart4_2_cfg: uart4-2-cfg { |
| uart4-2-pins { |
| pinmux = <K1_PADCONF(23, 2)>, /* uart4_txd */ |
| <K1_PADCONF(24, 2)>; /* uart4_rxd */ |
| bias-pull-up = <0>; |
| drive-strength = <32>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart4_3_cfg: uart4-3-cfg { |
| uart4-3-pins { |
| pinmux = <K1_PADCONF(33, 2)>, /* uart4_txd */ |
| <K1_PADCONF(34, 2)>; /* uart4_rxd */ |
| bias-pull-up = <0>; |
| drive-strength = <32>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart4_3_cts_rts_cfg: uart4-3-cts-rts-cfg { |
| uart4-3-pins { |
| pinmux = <K1_PADCONF(35, 2)>, /* uart4_cts */ |
| <K1_PADCONF(36, 2)>; /* uart4_rts */ |
| bias-pull-up = <0>; |
| drive-strength = <32>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart4_4_cfg: uart4-4-cfg { |
| uart4-4-pins { |
| pinmux = <K1_PADCONF(111, 4)>, /* uart4_txd */ |
| <K1_PADCONF(112, 4)>; /* uart4_rxd */ |
| bias-pull-up = <0>; |
| drive-strength = <32>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart4_4_cts_rts_cfg: uart4-4-cts-rts-cfg { |
| uart4-4-pins { |
| pinmux = <K1_PADCONF(113, 4)>, /* uart4_cts */ |
| <K1_PADCONF(114, 4)>; /* uart4_rts */ |
| bias-pull-up = <0>; |
| drive-strength = <32>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart5_0_cfg: uart5-0-cfg { |
| uart5-0-pins { |
| pinmux = <K1_PADCONF(102, 3)>, /* uart5_txd */ |
| <K1_PADCONF(103, 3)>; /* uart5_rxd */ |
| power-source = <3300>; |
| bias-pull-up = <0>; |
| drive-strength = <19>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart5_1_cfg: uart5-1-cfg { |
| uart5-1-pins { |
| pinmux = <K1_PADCONF(25, 2)>, /* uart5_txd */ |
| <K1_PADCONF(26, 2)>; /* uart5_rxd */ |
| bias-pull-up = <0>; |
| drive-strength = <32>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart5_1_cts_rts_cfg: uart5-1-cts-rts-cfg { |
| uart5-1-pins { |
| pinmux = <K1_PADCONF(27, 2)>, /* uart5_cts */ |
| <K1_PADCONF(28, 2)>; /* uart5_rts */ |
| bias-pull-up = <0>; |
| drive-strength = <32>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart5_2_cfg: uart5-2-cfg { |
| uart5-2-pins { |
| pinmux = <K1_PADCONF(42, 2)>, /* uart5_txd */ |
| <K1_PADCONF(43, 2)>; /* uart5_rxd */ |
| bias-pull-up = <0>; |
| drive-strength = <32>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart5_2_cts_rts_cfg: uart5-2-cts-rts-cfg { |
| uart5-2-pins { |
| pinmux = <K1_PADCONF(44, 2)>, /* uart5_cts */ |
| <K1_PADCONF(45, 2)>; /* uart5_rts */ |
| bias-pull-up = <0>; |
| drive-strength = <32>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart5_3_cfg: uart5-3-cfg { |
| uart5-3-pins { |
| pinmux = <K1_PADCONF(70, 4)>, /* uart5_txd */ |
| <K1_PADCONF(71, 4)>; /* uart5_rxd */ |
| bias-pull-up = <0>; |
| drive-strength = <32>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart5_3_cts_rts_cfg: uart5-3-cts-rts-cfg { |
| uart5-3-pins { |
| pinmux = <K1_PADCONF(72, 4)>, /* uart5_cts */ |
| <K1_PADCONF(73, 4)>; /* uart5_rts */ |
| bias-pull-up = <0>; |
| drive-strength = <32>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart6_0_cfg: uart6-0-cfg { |
| uart6-0-pins { |
| pinmux = <K1_PADCONF(86, 2)>, /* uart6_txd */ |
| <K1_PADCONF(87, 2)>; /* uart6_rxd */ |
| bias-pull-up = <0>; |
| drive-strength = <32>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart6_0_cts_rts_cfg: uart6-0-cts-rts-cfg { |
| uart6-0-pins { |
| pinmux = <K1_PADCONF(85, 2)>, /* uart6_cts */ |
| <K1_PADCONF(90, 2)>; /* uart6_rts */ |
| bias-pull-up = <0>; |
| drive-strength = <32>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart6_1_cfg: uart6-1-cfg { |
| uart6-1-pins { |
| pinmux = <K1_PADCONF(0, 2)>, /* uart6_txd */ |
| <K1_PADCONF(1, 2)>; /* uart6_rxd */ |
| bias-pull-up = <0>; |
| drive-strength = <32>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart6_1_cts_rts_cfg: uart6-1-cts-rts-cfg { |
| uart6-1-pins { |
| pinmux = <K1_PADCONF(2, 2)>, /* uart6_cts */ |
| <K1_PADCONF(3, 2)>; /* uart6_rts */ |
| bias-pull-up = <0>; |
| drive-strength = <32>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart6_2_cfg: uart6-2-cfg { |
| uart6-2-pins { |
| pinmux = <K1_PADCONF(56, 2)>, /* uart6_txd */ |
| <K1_PADCONF(57, 2)>; /* uart6_rxd */ |
| bias-pull-up = <0>; |
| drive-strength = <32>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart7_0_cfg: uart7-0-cfg { |
| uart7-0-pins { |
| pinmux = <K1_PADCONF(88, 2)>, /* uart7_txd */ |
| <K1_PADCONF(89, 2)>; /* uart7_rxd */ |
| bias-pull-up = <0>; |
| drive-strength = <32>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart7_1_cfg: uart7-1-cfg { |
| uart7-1-pins { |
| pinmux = <K1_PADCONF(4, 2)>, /* uart7_txd */ |
| <K1_PADCONF(5, 2)>; /* uart7_rxd */ |
| bias-pull-up = <0>; |
| drive-strength = <32>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart7_1_cts_rts_cfg: uart7-1-cts-rts-cfg { |
| uart7-1-pins { |
| pinmux = <K1_PADCONF(6, 2)>, /* uart7_cts */ |
| <K1_PADCONF(7, 2)>; /* uart7_rts */ |
| bias-pull-up = <0>; |
| drive-strength = <32>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart8_0_cfg: uart8-0-cfg { |
| uart8-0-pins { |
| pinmux = <K1_PADCONF(82, 4)>, /* uart8_txd */ |
| <K1_PADCONF(83, 4)>; /* uart8_rxd */ |
| bias-pull-up = <0>; |
| drive-strength = <32>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart8_1_cfg: uart8-1-cfg { |
| uart8-1-pins { |
| pinmux = <K1_PADCONF(8, 2)>, /* uart8_txd */ |
| <K1_PADCONF(9, 2)>; /* uart8_rxd */ |
| bias-pull-up = <0>; |
| drive-strength = <32>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart8_1_cts_rts_cfg: uart8-1-cts-rts-cfg { |
| uart8-1-pins { |
| pinmux = <K1_PADCONF(10, 2)>, /* uart8_cts */ |
| <K1_PADCONF(11, 2)>; /* uart8_rts */ |
| bias-pull-up = <0>; |
| drive-strength = <32>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart8_2_cfg: uart8-2-cfg { |
| uart8-2-pins { |
| pinmux = <K1_PADCONF(75, 4)>, /* uart8_txd */ |
| <K1_PADCONF(76, 4)>; /* uart8_rxd */ |
| power-source = <3300>; |
| bias-pull-up = <0>; |
| drive-strength = <19>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart8_2_cts_rts_cfg: uart8-2-cts-rts-cfg { |
| uart8-2-pins { |
| pinmux = <K1_PADCONF(77, 4)>, /* uart8_cts */ |
| <K1_PADCONF(78, 4)>; /* uart8_rts */ |
| power-source = <3300>; |
| bias-pull-up = <0>; |
| drive-strength = <19>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart9_0_cfg: uart9-0-cfg { |
| uart9-0-pins { |
| pinmux = <K1_PADCONF(12, 2)>, /* uart9_txd */ |
| <K1_PADCONF(13, 2)>; /* uart9_rxd */ |
| bias-pull-up = <0>; |
| drive-strength = <32>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart9_1_cfg: uart9-1-cfg { |
| uart9-1-pins { |
| pinmux = <K1_PADCONF(116, 3)>, /* uart9_txd */ |
| <K1_PADCONF(117, 3)>; /* uart9_rxd */ |
| bias-pull-up = <0>; |
| drive-strength = <32>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart9_1_cts_rts_cfg: uart9-1-cts-rts-cfg { |
| uart9-1-pins { |
| pinmux = <K1_PADCONF(110, 3)>, /* uart9_cts */ |
| <K1_PADCONF(115, 3)>; /* uart9_rts */ |
| bias-pull-up = <0>; |
| drive-strength = <32>; |
| }; |
| }; |
| |
| /omit-if-no-ref/ |
| uart9_2_cfg: uart9-2-cfg { |
| uart9-2-pins { |
| pinmux = <K1_PADCONF(72, 2)>, /* uart9_txd */ |
| <K1_PADCONF(73, 2)>; /* uart9_rxd */ |
| bias-pull-up = <0>; |
| drive-strength = <32>; |
| }; |
| }; |
| |
| pcie0_3_cfg: pcie0-3-cfg { |
| pcie0-3-pins { |
| pinmux = <K1_PADCONF(54, 3)>, /* PERST# */ |
| <K1_PADCONF(55, 3)>, /* WAKE# */ |
| <K1_PADCONF(53, 3)>; /* CLKREQ# */ |
| |
| bias-pull-up = <0>; |
| drive-strength = <21>; |
| }; |
| }; |
| |
| pcie1_3_cfg: pcie1-3-cfg { |
| pcie1-3-pins { |
| pinmux = <K1_PADCONF(59, 4)>, /* PERST# */ |
| <K1_PADCONF(60, 4)>, /* WAKE# */ |
| <K1_PADCONF(61, 4)>; /* CLKREQ# */ |
| |
| bias-pull-up = <0>; |
| drive-strength = <21>; |
| }; |
| }; |
| |
| pcie2_4_cfg: pcie2-4-cfg { |
| pcie2-4-pins { |
| pinmux = <K1_PADCONF(62, 4)>, /* PERST# */ |
| <K1_PADCONF(112, 3)>, /* WAKE# */ |
| <K1_PADCONF(117, 4)>; /* CLKREQ# */ |
| |
| bias-pull-up = <0>; |
| drive-strength = <21>; |
| }; |
| }; |
| |
| pwm14_1_cfg: pwm14-1-cfg { |
| pwm14-1-pins { |
| pinmux = <K1_PADCONF(44, 4)>; |
| bias-pull-up = <0>; |
| drive-strength = <32>; |
| }; |
| }; |
| |
| ssp3_0_cfg: ssp3-0-cfg { |
| ssp3-0-pins { |
| pinmux = <K1_PADCONF(75, 2)>, /* SCLK */ |
| <K1_PADCONF(77, 2)>, /* MOSI */ |
| <K1_PADCONF(78, 2)>; /* MISO */ |
| |
| bias-disable; |
| drive-strength = <19>; |
| power-source = <3300>; |
| }; |
| |
| ssp3-0-frm-pins { |
| pinmux = <K1_PADCONF(76, 2)>; /* FRM (frame) */ |
| |
| bias-pull-up = <0>; |
| drive-strength = <19>; |
| power-source = <3300>; |
| }; |
| }; |
| |
| mmc1_cfg: mmc1-cfg { |
| mmc1-data-cmd-pins { |
| pinmux = <K1_PADCONF(104, 0)>, /* mmc1_d3 */ |
| <K1_PADCONF(105, 0)>, /* mmc1_d2 */ |
| <K1_PADCONF(106, 0)>, /* mmc1_d1 */ |
| <K1_PADCONF(107, 0)>, /* mmc1_d0 */ |
| <K1_PADCONF(108, 0)>; /* mmc1_cmd */ |
| bias-pull-up = <1>; |
| drive-strength = <19>; |
| power-source = <3300>; |
| }; |
| |
| mmc1-clk-pins { |
| pinmux = <K1_PADCONF(109, 0)>; /* mmc1_clk */ |
| bias-pull-down = <1>; |
| drive-strength = <19>; |
| power-source = <3300>; |
| }; |
| }; |
| |
| mmc1_uhs_cfg: mmc1-uhs-cfg { |
| mmc1-data-cmd-pins { |
| pinmux = <K1_PADCONF(104, 0)>, /* mmc1_d3 */ |
| <K1_PADCONF(105, 0)>, /* mmc1_d2 */ |
| <K1_PADCONF(106, 0)>, /* mmc1_d1 */ |
| <K1_PADCONF(107, 0)>, /* mmc1_d0 */ |
| <K1_PADCONF(108, 0)>; /* mmc1_cmd */ |
| bias-pull-up = <1>; |
| drive-strength = <42>; |
| power-source = <1800>; |
| }; |
| |
| mmc1-clk-pins { |
| pinmux = <K1_PADCONF(109, 0)>; /* mmc1_clk */ |
| bias-pull-down = <1>; |
| drive-strength = <42>; |
| power-source = <1800>; |
| }; |
| }; |
| }; |
