Documentation/devicetree/bindings/clock/qcom,qcs615-gpucc.yaml

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/qcom,qcs615-gpucc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm Graphics Clock & Reset Controller on QCS615

maintainers:
  - Taniya Das <quic_tdas@quicinc.com>

description: |
  Qualcomm graphics clock control module provides clocks, resets and power
  domains on QCS615 Qualcomm SoCs.

  See also: include/dt-bindings/clock/qcom,qcs615-gpucc.h

properties:
  compatible:
    const: qcom,qcs615-gpucc

  clocks:
    items:
      - description: Board XO source
      - description: GPLL0 main branch source
      - description: GPLL0 GPUCC div branch source

allOf:
  - $ref: qcom,gcc.yaml#

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/clock/qcom,rpmh.h>
    #include <dt-bindings/clock/qcom,qcs615-gcc.h>

    clock-controller@5090000 {
      compatible = "qcom,qcs615-gpucc";
      reg = <0x5090000 0x9000>;
      clocks = <&rpmhcc RPMH_CXO_CLK>,
               <&gcc GPLL0>,
               <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;

      #clock-cells = <1>;
      #reset-cells = <1>;
      #power-domain-cells = <1>;
    };
...