| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/clock/samsung,exynos7870-cmu.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Samsung Exynos7870 SoC clock controller |
| |
| maintainers: |
| - Kaustabh Chakraborty <kauschluss@disroot.org> |
| |
| description: | |
| Exynos7870 clock controller is comprised of several CMU units, generating |
| clocks for different domains. Those CMU units are modeled as separate device |
| tree nodes, and might depend on each other. The root clock in that root tree |
| is an external clock: OSCCLK (26 MHz). This external clock must be defined |
| as a fixed-rate clock in dts. |
| |
| Each clock is assigned an identifier and client nodes can use this identifier |
| to specify the clock which they consume. All clocks available for usage |
| in clock consumer nodes are defined as preprocessor macros in |
| include/dt-bindings/clock/samsung,exynos7870-cmu.h header. |
| |
| properties: |
| compatible: |
| enum: |
| - samsung,exynos7870-cmu-mif |
| - samsung,exynos7870-cmu-dispaud |
| - samsung,exynos7870-cmu-fsys |
| - samsung,exynos7870-cmu-g3d |
| - samsung,exynos7870-cmu-isp |
| - samsung,exynos7870-cmu-mfcmscl |
| - samsung,exynos7870-cmu-peri |
| |
| clocks: |
| minItems: 1 |
| maxItems: 10 |
| |
| clock-names: |
| minItems: 1 |
| maxItems: 10 |
| |
| "#clock-cells": |
| const: 1 |
| |
| reg: |
| maxItems: 1 |
| |
| required: |
| - compatible |
| - clocks |
| - clock-names |
| - "#clock-cells" |
| - reg |
| |
| allOf: |
| - if: |
| properties: |
| compatible: |
| contains: |
| const: samsung,exynos7870-cmu-mif |
| then: |
| properties: |
| clocks: |
| items: |
| - description: External reference clock (26 MHz) |
| |
| clock-names: |
| items: |
| - const: oscclk |
| |
| - if: |
| properties: |
| compatible: |
| contains: |
| const: samsung,exynos7870-cmu-dispaud |
| then: |
| properties: |
| clocks: |
| items: |
| - description: External reference clock (26 MHz) |
| - description: CMU_DISPAUD bus clock (from CMU_MIF) |
| - description: DECON external clock (from CMU_MIF) |
| - description: DECON vertical clock (from CMU_MIF) |
| |
| clock-names: |
| items: |
| - const: oscclk |
| - const: bus |
| - const: decon_eclk |
| - const: decon_vclk |
| |
| - if: |
| properties: |
| compatible: |
| contains: |
| const: samsung,exynos7870-cmu-fsys |
| then: |
| properties: |
| clocks: |
| items: |
| - description: External reference clock (26 MHz) |
| - description: CMU_FSYS bus clock (from CMU_MIF) |
| - description: USB20DRD clock (from CMU_MIF) |
| |
| clock-names: |
| items: |
| - const: oscclk |
| - const: bus |
| - const: usb20drd |
| |
| - if: |
| properties: |
| compatible: |
| contains: |
| const: samsung,exynos7870-cmu-g3d |
| then: |
| properties: |
| clocks: |
| items: |
| - description: External reference clock (26 MHz) |
| - description: G3D switch clock (from CMU_MIF) |
| |
| clock-names: |
| items: |
| - const: oscclk |
| - const: switch |
| |
| - if: |
| properties: |
| compatible: |
| contains: |
| const: samsung,exynos7870-cmu-isp |
| then: |
| properties: |
| clocks: |
| items: |
| - description: External reference clock (26 MHz) |
| - description: ISP camera clock (from CMU_MIF) |
| - description: ISP clock (from CMU_MIF) |
| - description: ISP VRA clock (from CMU_MIF) |
| |
| clock-names: |
| items: |
| - const: oscclk |
| - const: cam |
| - const: isp |
| - const: vra |
| |
| - if: |
| properties: |
| compatible: |
| contains: |
| const: samsung,exynos7870-cmu-mfcmscl |
| then: |
| properties: |
| clocks: |
| items: |
| - description: External reference clock (26 MHz) |
| - description: MSCL clock (from CMU_MIF) |
| - description: MFC clock (from CMU_MIF) |
| |
| clock-names: |
| items: |
| - const: oscclk |
| - const: mfc |
| - const: mscl |
| |
| - if: |
| properties: |
| compatible: |
| contains: |
| const: samsung,exynos7870-cmu-peri |
| then: |
| properties: |
| clocks: |
| items: |
| - description: External reference clock (26 MHz) |
| - description: CMU_PERI bus clock (from CMU_MIF) |
| - description: SPI0 clock (from CMU_MIF) |
| - description: SPI1 clock (from CMU_MIF) |
| - description: SPI2 clock (from CMU_MIF) |
| - description: SPI3 clock (from CMU_MIF) |
| - description: SPI4 clock (from CMU_MIF) |
| - description: UART0 clock (from CMU_MIF) |
| - description: UART1 clock (from CMU_MIF) |
| - description: UART2 clock (from CMU_MIF) |
| |
| clock-names: |
| items: |
| - const: oscclk |
| - const: bus |
| - const: spi0 |
| - const: spi1 |
| - const: spi2 |
| - const: spi3 |
| - const: spi4 |
| - const: uart0 |
| - const: uart1 |
| - const: uart2 |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/clock/samsung,exynos7870-cmu.h> |
| |
| cmu_peri: clock-controller@101f0000 { |
| compatible = "samsung,exynos7870-cmu-peri"; |
| reg = <0x101f0000 0x1000>; |
| #clock-cells = <1>; |
| |
| clock-names = "oscclk", "bus", "spi0", "spi1", "spi2", |
| "spi3", "spi4", "uart0", "uart1", "uart2"; |
| clocks = <&oscclk>, |
| <&cmu_mif CLK_GOUT_MIF_CMU_PERI_BUS>, |
| <&cmu_mif CLK_GOUT_MIF_CMU_PERI_SPI0>, |
| <&cmu_mif CLK_GOUT_MIF_CMU_PERI_SPI1>, |
| <&cmu_mif CLK_GOUT_MIF_CMU_PERI_SPI2>, |
| <&cmu_mif CLK_GOUT_MIF_CMU_PERI_SPI3>, |
| <&cmu_mif CLK_GOUT_MIF_CMU_PERI_SPI4>, |
| <&cmu_mif CLK_GOUT_MIF_CMU_PERI_UART0>, |
| <&cmu_mif CLK_GOUT_MIF_CMU_PERI_UART1>, |
| <&cmu_mif CLK_GOUT_MIF_CMU_PERI_UART2>; |
| }; |
| |
| ... |