| // SPDX-License-Identifier: GPL-2.0+ |
| /dts-v1/; |
| |
| #include "aspeed-g6.dtsi" |
| #include <dt-bindings/i2c/i2c.h> |
| #include <dt-bindings/gpio/aspeed-gpio.h> |
| #include <dt-bindings/leds/common.h> |
| |
| / { |
| model = "AST2600 GB200NVL BMC"; |
| compatible = "nvidia,gb200nvl-bmc", "aspeed,ast2600"; |
| |
| aliases { |
| serial2 = &uart3; |
| serial4 = &uart5; |
| i2c16 = &imux16; |
| i2c17 = &imux17; |
| i2c18 = &imux18; |
| i2c19 = &imux19; |
| i2c20 = &imux20; |
| i2c21 = &imux21; |
| i2c22 = &imux22; |
| i2c23 = &imux23; |
| i2c24 = &imux24; |
| i2c25 = &imux25; |
| i2c26 = &imux26; |
| i2c27 = &imux27; |
| i2c28 = &imux28; |
| i2c29 = &imux29; |
| i2c30 = &imux30; |
| i2c31 = &imux31; |
| i2c32 = &imux32; |
| i2c33 = &imux33; |
| i2c34 = &imux34; |
| i2c35 = &imux35; |
| i2c36 = &imux36; |
| i2c37 = &imux37; |
| i2c38 = &imux38; |
| i2c39 = &imux39; |
| i2c40 = &e1si2c0; |
| i2c41 = &e1si2c1; |
| i2c42 = &e1si2c2; |
| i2c43 = &e1si2c3; |
| i2c44 = &e1si2c4; |
| i2c45 = &e1si2c5; |
| i2c46 = &e1si2c6; |
| i2c47 = &e1si2c7; |
| i2c48 = &i2c17mux0; |
| i2c49 = &i2c17mux1; |
| i2c50 = &i2c17mux2; |
| i2c51 = &i2c17mux3; |
| i2c52 = &i2c25mux0; |
| i2c53 = &i2c25mux1; |
| i2c54 = &i2c25mux2; |
| i2c55 = &i2c25mux3; |
| i2c56 = &i2c29mux0; |
| i2c57 = &i2c29mux1; |
| i2c58 = &i2c29mux2; |
| i2c59 = &i2c29mux3; |
| }; |
| |
| chosen { |
| stdout-path = &uart5; |
| }; |
| |
| memory@80000000 { |
| device_type = "memory"; |
| reg = <0x80000000 0x80000000>; |
| }; |
| |
| reserved-memory { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges; |
| |
| vga_memory: framebuffer@9f000000 { |
| no-map; |
| reg = <0x9f000000 0x01000000>; /* 16M */ |
| }; |
| |
| ramoops@a0000000 { |
| compatible = "ramoops"; |
| reg = <0xa0000000 0x100000>; /* 1MB */ |
| record-size = <0x10000>; /* 64KB */ |
| max-reason = <2>; /* KMSG_DUMP_OOPS */ |
| }; |
| |
| gfx_memory: framebuffer { |
| size = <0x01000000>; |
| alignment = <0x01000000>; |
| compatible = "shared-dma-pool"; |
| reusable; |
| }; |
| |
| video_engine_memory: jpegbuffer { |
| size = <0x02000000>; /* 32M */ |
| alignment = <0x01000000>; |
| compatible = "shared-dma-pool"; |
| reusable; |
| }; |
| }; |
| |
| leds { |
| compatible = "gpio-leds"; |
| led-0 { |
| label = "uid_led"; |
| gpios = <&sgpiom0 27 GPIO_ACTIVE_LOW>; |
| }; |
| led-1 { |
| label = "fault_led"; |
| gpios = <&sgpiom0 29 GPIO_ACTIVE_LOW>; |
| }; |
| led-2 { |
| label = "power_led"; |
| gpios = <&sgpiom0 31 GPIO_ACTIVE_LOW>; |
| }; |
| }; |
| |
| buttons { |
| button-power { |
| label = "power-btn"; |
| gpio = <&sgpiom0 156 GPIO_ACTIVE_LOW>; |
| }; |
| button-uid { |
| label = "uid-btn"; |
| gpio = <&sgpiom0 154 GPIO_ACTIVE_LOW>; |
| }; |
| }; |
| |
| standby_power_regulator: standby-power-regulator { |
| status = "okay"; |
| compatible = "regulator-fixed"; |
| regulator-name = "standby_power"; |
| gpio = <&gpio0 ASPEED_GPIO(M, 3) GPIO_ACTIVE_HIGH>; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| enable-active-high; |
| regulator-always-on; |
| }; |
| }; |
| |
| // Enable Primary flash on FMC for bring up activity |
| &fmc { |
| status = "okay"; |
| flash@0 { |
| status = "okay"; |
| compatible = "jedec,spi-nor"; |
| label = "bmc"; |
| spi-max-frequency = <50000000>; |
| partitions { |
| compatible = "fixed-partitions"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| u-boot@0 { |
| // 896KB |
| reg = <0x0 0xe0000>; |
| label = "u-boot"; |
| }; |
| |
| kernel@100000 { |
| // 9MB |
| reg = <0x100000 0x900000>; |
| label = "kernel"; |
| }; |
| |
| rofs@a00000 { |
| // 55292KB (extends to end of 64MB SPI - 4KB) |
| reg = <0xa00000 0x35FF000>; |
| label = "rofs"; |
| }; |
| }; |
| }; |
| }; |
| |
| &spi2 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_spi2_default>; |
| |
| // Data SPI is 64MB in size |
| flash@0 { |
| status = "okay"; |
| label = "config"; |
| spi-max-frequency = <50000000>; |
| partitions { |
| compatible = "fixed-partitions"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| u-boot-env@0 { |
| // 256KB |
| reg = <0x0 0x40000>; |
| label = "u-boot-env"; |
| }; |
| |
| rwfs@40000 { |
| // 16MB |
| reg = <0x40000 0x1000000>; |
| label = "rwfs"; |
| }; |
| |
| log@1040000 { |
| // 40MB |
| reg = <0x1040000 0x2800000>; |
| label = "log"; |
| }; |
| }; |
| }; |
| }; |
| |
| &uart1 { |
| status = "okay"; |
| }; |
| |
| &uart3 { |
| // Enabling SOL |
| status = "okay"; |
| }; |
| |
| &uart5 { |
| // BMC Debug Console |
| status = "okay"; |
| }; |
| |
| &uart_routing { |
| status = "okay"; |
| }; |
| |
| &mdio0 { |
| status = "okay"; |
| ethphy0: ethernet-phy@0 { |
| compatible = "ethernet-phy-ieee802.3-c22"; |
| reg = <0>; |
| }; |
| }; |
| |
| &mdio3 { |
| status = "okay"; |
| ethphy3: ethernet-phy@2 { |
| compatible = "ethernet-phy-ieee802.3-c22"; |
| reg = <2>; |
| }; |
| }; |
| |
| &mac0 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| phy-mode = "rgmii-id"; |
| phy-handle = <ðphy3>; |
| pinctrl-0 = <&pinctrl_rgmii1_default>; |
| }; |
| |
| &mac2 { |
| status = "okay"; |
| phy-mode = "rmii"; |
| use-ncsi; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_rmii3_default>; |
| }; |
| |
| /* |
| * Enable USB port A as device (via the virtual hub) to host |
| */ |
| &vhub { |
| status = "okay"; |
| }; |
| |
| &video { |
| status = "okay"; |
| memory-region = <&video_engine_memory>; |
| }; |
| |
| // USB 2.0 to HMC, on USB Port B |
| &ehci1 { |
| status = "okay"; |
| }; |
| |
| // USB 1.0 |
| &uhci { |
| status = "okay"; |
| }; |
| |
| &sgpiom0 { |
| status = "okay"; |
| ngpios = <128>; |
| gpio-line-names = |
| "","", |
| "","", |
| "","", |
| "","", |
| "","", |
| "","", |
| "","", |
| "","", |
| "RUN_POWER_FAULT_L-I","SYS_RST_IN_L-O", |
| "RUN_POWER_PG-I","PWR_BRAKE_L-O", |
| "SYS_RST_OUT_L-I","RUN_POWER_EN-O", |
| "L0L1_RST_REQ_OUT_L-I","SHDN_FORCE_L-O", |
| "L2_RST_REQ_OUT_L-I","SHDN_REQ_L-O", |
| "SHDN_OK_L-I","UID_LED_N-O", |
| "BMC_I2C1_FPGA_ALERT_L-I","SYS_FAULT_LED_N-O", |
| "BMC_I2C0_FPGA_ALERT_L-I","PWR_LED_N-O", |
| "FPGA_RSVD_FFU3-I","", |
| "FPGA_RSVD_FFU2-I","", |
| "FPGA_RSVD_FFU1-I","", |
| "FPGA_RSVD_FFU0-I","BMC_I2C_SSIF_ALERT_L-O", |
| "CPU_BOOT_DONE-I","JTAG_MUX_SELECT-O", |
| "SPI_BMC_FPGA_INT_L-I","RTC_CLR_L-O", |
| "THERM_BB_WARN_L-I","UART_MUX_SEL-O", |
| "THERM_BB_OVERT_L-I","", |
| "CPU0_UPHY3_PRSNT1_L-I","IOBRD0_RUN_POWER_EN-O", |
| "CPU0_UPHY3_PRSNT0_L-I","IOBRD1_RUN_POWER_EN-O", |
| "CPU0_UPHY2_PRSNT1_L-I","FPGA_RSVD_FFU4-O", |
| "CPU0_UPHY2_PRSNT0_L-I","FPGA_RSVD_FFU5-O", |
| "CPU0_UPHY1_PRSNT1_L-I","FPGA_RSVD_FFU6-O", |
| "CPU0_UPHY1_PRSNT0_L-I","FPGA_RSVD_FFU7-O", |
| "CPU0_UPHY0_PRSNT1_L-I","RSVD_NV_PLT_DETECT-O", |
| "CPU0_UPHY0_PRSNT0_L-I","SPI1_INT_L-O", |
| "CPU1_UPHY3_PRSNT1_L-I","", |
| "CPU1_UPHY3_PRSNT0_L-I","HMC_EROT_MUX_STATUS", |
| "CPU1_UPHY2_PRSNT1_L-I","", |
| "CPU1_UPHY2_PRSNT0_L-I","", |
| "CPU1_UPHY1_PRSNT1_L-I","", |
| "CPU1_UPHY1_PRSNT0_L-I","", |
| "CPU1_UPHY0_PRSNT1_L-I","", |
| "CPU1_UPHY0_PRSNT0_L-I","", |
| "FAN1_PRESENT_L-I","", |
| "FAN0_PRESENT_L-I","", |
| "","", |
| "IPEX_CABLE_PRSNT_L-I","", |
| "M2_1_PRSNT_L-I","", |
| "M2_0_PRSNT_L-I","", |
| "CPU1_UPHY4_PRSNT1_L-I","", |
| "CPU0_UPHY4_PRSNT0_L-I","", |
| "","", |
| "I2C_RTC_ALERT_L-I","", |
| "FAN7_PRESENT_L-I","", |
| "FAN6_PRESENT_L-I","", |
| "FAN5_PRESENT_L-I","", |
| "FAN4_PRESENT_L-I","", |
| "FAN3_PRESENT_L-I","", |
| "FAN2_PRESENT_L-I","", |
| "IOBRD0_IOX_INT_L-I","", |
| "IOBRD1_PRSNT_L-I","", |
| "IOBRD0_PRSNT_L-I","", |
| "IOBRD1_PWR_GOOD-I","", |
| "IOBRD0_PWR_GOOD-I","", |
| "","", |
| "","", |
| "FAN_FAIL_IN_L-I","", |
| "","", |
| "","", |
| "","", |
| "PDB_CABLE_PRESENT_L-I","", |
| "","", |
| "CHASSIS_PWR_BRK_L-I","", |
| "","", |
| "IOBRD1_IOX_INT_L-I","", |
| "10GBE_SMBALRT_L-I","", |
| "PCIE_WAKE_L-I","", |
| "I2C_M21_ALERT_L-I","", |
| "I2C_M20_ALERT_L-I","", |
| "TRAY_FAST_SHDN_L-I","", |
| "UID_BTN_N-I","", |
| "PWR_BTN_L-I","", |
| "PSU_SMB_ALERT_L-I","", |
| "","", |
| "","", |
| "NODE_LOC_ID[0]-I","", |
| "NODE_LOC_ID[1]-I","", |
| "NODE_LOC_ID[2]-I","", |
| "NODE_LOC_ID[3]-I","", |
| "NODE_LOC_ID[4]-I","", |
| "NODE_LOC_ID[5]-I","", |
| "FAN10_PRESENT_L-I","", |
| "FAN9_PRESENT_L-I","", |
| "FAN8_PRESENT_L-I","", |
| "FPGA1_READY_HMC-I","", |
| "DP_HPD-I","", |
| "HMC_I2C3_FPGA_ALERT_L-I","", |
| "HMC_I2C2_FPGA_ALERT_L-I","", |
| "FPGA0_READY_HMC-I","", |
| "","", |
| "","", |
| "","", |
| "","", |
| "LEAK_DETECT_ALERT_L-I","", |
| "MOD1_B2B_CABLE_PRESENT_L-I","", |
| "MOD1_CLINK_CABLE_PRESENT_L-I","", |
| "FAN11_PRESENT_L-I","", |
| "","", |
| "","", |
| "","", |
| "","", |
| "","", |
| "","", |
| "","", |
| "","", |
| "","", |
| "","", |
| "","", |
| "","", |
| "","", |
| "","", |
| "","", |
| "","", |
| "RSVD_SGPIO_IN_CRC[0]","RSVD_SGPIO_O_CRC[7]", |
| "RSVD_SGPIO_IN_CRC[1]","RSVD_SGPIO_O_CRC[6]", |
| "RSVD_SGPIO_IN_CRC[2]","RSVD_SGPIO_O_CRC[5]", |
| "RSVD_SGPIO_IN_CRC[3]","RSVD_SGPIO_O_CRC[4]", |
| "RSVD_SGPIO_IN_CRC[4]","RSVD_SGPIO_O_CRC[3]", |
| "RSVD_SGPIO_IN_CRC[5]","RSVD_SGPIO_O_CRC[2]", |
| "RSVD_SGPIO_IN_CRC[6]","RSVD_SGPIO_O_CRC[1]", |
| "RSVD_SGPIO_IN_CRC[7]","RSVD_SGPIO_O_CRC[0]"; |
| }; |
| |
| // I2C1, SSIF IPMI interface |
| &i2c0 { |
| status = "okay"; |
| clock-frequency = <400000>; |
| |
| ssif-bmc@10 { |
| compatible = "ssif-bmc"; |
| reg = <0x10>; |
| }; |
| }; |
| |
| // I2C2 |
| // BMC_I2C1_FPGA - Secondary FPGA |
| // HMC EROT |
| &i2c1 { |
| status = "okay"; |
| clock-frequency = <400000>; |
| multi-master; |
| }; |
| |
| // I2C3 |
| // BMC_I2C0_FPGA - Primary FPGA |
| // HMC FRU EEPROM |
| &i2c2 { |
| status = "okay"; |
| clock-frequency = <400000>; |
| multi-master; |
| }; |
| |
| // I2C4 |
| &i2c3 { |
| status = "okay"; |
| }; |
| |
| // I2C5 |
| // RTC Driver |
| // IO Expander |
| &i2c4 { |
| status = "okay"; |
| clock-frequency = <400000>; |
| |
| // Module 0, Expander @0x21 |
| exp4: gpio@21 { |
| compatible = "nxp,pca9555"; |
| reg = <0x21>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| interrupt-parent = <&gpio1>; |
| interrupts = <ASPEED_GPIO(B, 6) IRQ_TYPE_LEVEL_LOW>; |
| vcc-supply = <&standby_power_regulator>; |
| gpio-line-names = |
| "RTC_MUX_SEL-O", |
| "PCI_MUX_SEL-O", |
| "TPM_MUX_SEL-O", |
| "FAN_MUX-SEL-O", |
| "SGMII_MUX_SEL-O", |
| "DP_MUX_SEL-O", |
| "UPHY3_USB_SEL-O", |
| "NCSI_MUX_SEL-O", |
| "BMC_PHY_RST-O", |
| "RTC_CLR_L-O", |
| "BMC_12V_CTRL-O", |
| "PS_RUN_IO0_PG-I", |
| "", |
| "", |
| "", |
| ""; |
| }; |
| }; |
| |
| // I2C6 |
| // Module 0/1 I2C MUX x3 |
| &i2c5 { |
| status = "okay"; |
| clock-frequency = <400000>; |
| multi-master; |
| |
| i2c-mux@71 { |
| compatible = "nxp,pca9546"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x71>; |
| i2c-mux-idle-disconnect; |
| vdd-supply = <&standby_power_regulator>; |
| |
| imux16: i2c@0 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0>; |
| }; |
| |
| imux17: i2c@1 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <1>; |
| |
| i2c-mux@74 { |
| compatible = "nxp,pca9546"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x74>; |
| i2c-mux-idle-disconnect; |
| |
| i2c17mux0: i2c@0 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0>; |
| }; |
| |
| i2c17mux1: i2c@1 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <1>; |
| }; |
| |
| i2c17mux2: i2c@2 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <2>; |
| }; |
| |
| i2c17mux3: i2c@3 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <3>; |
| }; |
| }; |
| }; |
| |
| imux18: i2c@2 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <2>; |
| }; |
| |
| imux19: i2c@3 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <3>; |
| }; |
| }; |
| |
| i2c-mux@72 { |
| compatible = "nxp,pca9546"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x72>; |
| i2c-mux-idle-disconnect; |
| vdd-supply = <&standby_power_regulator>; |
| |
| imux20: i2c@0 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0>; |
| }; |
| |
| imux21: i2c@1 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <1>; |
| |
| gpio@21 { |
| compatible = "nxp,pca9555"; |
| reg = <0x21>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| vcc-supply = <&standby_power_regulator>; |
| gpio-line-names = |
| "RST_CX_0_L-O", |
| "RST_CX_1_L-O", |
| "CX0_SSD0_PRSNT_L-I", |
| "CX1_SSD1_PRSNT_L-I", |
| "CX_BOOT_CMPLT_CX0-I", |
| "CX_BOOT_CMPLT_CX1-I", |
| "CX_TWARN_CX0_L-I", |
| "CX_TWARN_CX1_L-I", |
| "CX_OVT_SHDN_CX0-I", |
| "CX_OVT_SHDN_CX1-I", |
| "FNP_L_CX0-O", |
| "FNP_L_CX1-O", |
| "", |
| "MCU_GPIO-I", |
| "MCU_RST_N-O", |
| "MCU_RECOVERY_N-O"; |
| }; |
| }; |
| |
| imux22: i2c@2 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <2>; |
| }; |
| |
| imux23: i2c@3 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <3>; |
| }; |
| }; |
| |
| i2c-mux@73 { |
| compatible = "nxp,pca9546"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x73>; |
| i2c-mux-idle-disconnect; |
| vdd-supply = <&standby_power_regulator>; |
| |
| imux24: i2c@0 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0>; |
| }; |
| |
| imux25: i2c@1 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <1>; |
| |
| i2c-mux@70 { |
| compatible = "nxp,pca9546"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x70>; |
| i2c-mux-idle-disconnect; |
| vdd-supply = <&standby_power_regulator>; |
| |
| i2c25mux0: i2c@0 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0>; |
| }; |
| |
| i2c25mux1: i2c@1 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <1>; |
| }; |
| |
| i2c25mux2: i2c@2 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <2>; |
| }; |
| |
| i2c25mux3: i2c@3 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <3>; |
| }; |
| }; |
| }; |
| |
| imux26: i2c@2 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <2>; |
| }; |
| |
| imux27: i2c@3 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <3>; |
| }; |
| }; |
| |
| i2c-mux@75 { |
| compatible = "nxp,pca9546"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x75>; |
| i2c-mux-idle-disconnect; |
| vdd-supply = <&standby_power_regulator>; |
| |
| imux28: i2c@0 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0>; |
| }; |
| |
| imux29: i2c@1 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <1>; |
| |
| i2c-mux@74 { |
| compatible = "nxp,pca9546"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x74>; |
| i2c-mux-idle-disconnect; |
| |
| i2c29mux0: i2c@0 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0>; |
| }; |
| |
| i2c29mux1: i2c@1 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <1>; |
| }; |
| |
| i2c29mux2: i2c@2 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <2>; |
| }; |
| |
| i2c29mux3: i2c@3 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <3>; |
| }; |
| }; |
| }; |
| |
| imux30: i2c@2 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <2>; |
| }; |
| |
| imux31: i2c@3 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <3>; |
| }; |
| }; |
| |
| i2c-mux@76 { |
| compatible = "nxp,pca9546"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x76>; |
| i2c-mux-idle-disconnect; |
| vdd-supply = <&standby_power_regulator>; |
| |
| imux32: i2c@0 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0>; |
| }; |
| |
| imux33: i2c@1 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <1>; |
| |
| gpio@21 { |
| compatible = "nxp,pca9555"; |
| reg = <0x21>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| vcc-supply = <&standby_power_regulator>; |
| gpio-line-names = |
| "SEC_RST_CX_0_L-O", |
| "SEC_RST_CX_1_L-O", |
| "SEC_CX0_SSD0_PRSNT_L-I", |
| "SEC_CX1_SSD1_PRSNT_L-I", |
| "SEC_CX_BOOT_CMPLT_CX0-I", |
| "SEC_CX_BOOT_CMPLT_CX1-I", |
| "SEC_CX_TWARN_CX0_L-I", |
| "SEC_CX_TWARN_CX1_L-I", |
| "SEC_CX_OVT_SHDN_CX0-I", |
| "SEC_CX_OVT_SHDN_CX1-I", |
| "SEC_FNP_L_CX0-O", |
| "SEC_FNP_L_CX1-O", |
| "", |
| "SEC_MCU_GPIO-I", |
| "SEC_MCU_RST_N-O", |
| "SEC_MCU_RECOVERY_N-O"; |
| }; |
| }; |
| |
| imux34: i2c@2 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <2>; |
| }; |
| |
| imux35: i2c@3 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <3>; |
| }; |
| }; |
| |
| i2c-mux@77 { |
| compatible = "nxp,pca9546"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x77>; |
| i2c-mux-idle-disconnect; |
| vdd-supply = <&standby_power_regulator>; |
| |
| imux36: i2c@0 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0>; |
| }; |
| |
| imux37: i2c@1 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <1>; |
| }; |
| |
| imux38: i2c@2 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <2>; |
| }; |
| |
| imux39: i2c@3 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <3>; |
| }; |
| }; |
| }; |
| |
| // I2C7 |
| // Module 0/1 Leak Sensors |
| // Module 0/1 Fan Controllers |
| &i2c6 { |
| status = "okay"; |
| clock-frequency = <400000>; |
| |
| pmic@12 { |
| compatible = "ti,lm5066i"; |
| reg = <0x12>; |
| shunt-resistor-micro-ohms = <190>; |
| status = "okay"; |
| }; |
| |
| pmic@14 { |
| compatible = "ti,lm5066i"; |
| reg = <0x14>; |
| shunt-resistor-micro-ohms = <190>; |
| status = "okay"; |
| }; |
| |
| pwm@20 { |
| compatible = "maxim,max31790"; |
| reg = <0x20>; |
| }; |
| |
| pwm@23 { |
| compatible = "maxim,max31790"; |
| reg = <0x23>; |
| }; |
| |
| pwm@2c { |
| compatible = "maxim,max31790"; |
| reg = <0x2c>; |
| }; |
| |
| pwm@2f { |
| compatible = "maxim,max31790"; |
| reg = <0x2f>; |
| }; |
| }; |
| |
| // I2C9 |
| // M.2 |
| &i2c8 { |
| status = "okay"; |
| clock-frequency = <400000>; |
| multi-master; |
| }; |
| |
| // I2C10 |
| // HMC IO Expander |
| // Module 0/1 IO Expanders |
| &i2c9 { |
| status = "okay"; |
| clock-frequency = <400000>; |
| |
| // Module 0, Expander @0x20 |
| exp0: gpio@20 { |
| compatible = "nxp,pca9555"; |
| reg = <0x20>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| interrupt-parent = <&gpio1>; |
| interrupts = <ASPEED_GPIO(B, 6) IRQ_TYPE_LEVEL_LOW>; |
| vcc-supply = <&standby_power_regulator>; |
| gpio-line-names = |
| "FPGA_THERM_OVERT_L-I", |
| "FPGA_READY_BMC-I", |
| "HMC_BMC_DETECT-O", |
| "HMC_PGOOD-O", |
| "", |
| "BMC_STBY_CYCLE-O", |
| "FPGA_EROT_FATAL_ERROR_L-I", |
| "WP_HW_EXT_CTRL_L-O", |
| "EROT_FPGA_RST_L-O", |
| "FPGA_EROT_RECOVERY_L-O", |
| "BMC_EROT_FPGA_SPI_MUX_SEL-O", |
| "USB_HUB_RESET_L-O", |
| "NCSI_CS1_SEL-O", |
| "SGPIO_EN_L-O", |
| "B2B_IOEXP_INT_L-I", |
| "I2C_BUS_MUX_RESET_L-O"; |
| }; |
| |
| // Module 1, Expander @0x21 |
| exp1: gpio@21 { |
| compatible = "nxp,pca9555"; |
| reg = <0x21>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| interrupt-parent = <&gpio1>; |
| interrupts = <ASPEED_GPIO(B, 6) IRQ_TYPE_LEVEL_LOW>; |
| vcc-supply = <&standby_power_regulator>; |
| gpio-line-names = |
| "SEC_FPGA_THERM_OVERT_L-I", |
| "SEC_FPGA_READY_BMC-I", |
| "", |
| "", |
| "", |
| "", |
| "SEC_FPGA_EROT_FATAL_ERROR_L-I", |
| "SEC_WP_HW_EXT_CTRL_L-O", |
| "SEC_EROT_FPGA_RST_L-O", |
| "SEC_FPGA_EROT_RECOVERY_L-O", |
| "SEC_BMC_EROT_FPGA_SPI_MUX_SEL-O", |
| "SEC_USB2_HUB_RST_L-O", |
| "", |
| "", |
| "", |
| "SEC_I2C_BUS_MUX_RESET_L-O"; |
| }; |
| |
| // HMC Expander @0x27 |
| exp2: gpio@27 { |
| compatible = "nxp,pca9555"; |
| reg = <0x27>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| interrupt-parent = <&gpio1>; |
| interrupts = <ASPEED_GPIO(B, 6) IRQ_TYPE_LEVEL_LOW>; |
| gpio-line-names = |
| "HMC_PRSNT_L-I", |
| "HMC_READY-I", |
| "HMC_EROT_FATAL_ERROR_L-I", |
| "I2C_MUX_SEL-O", |
| "HMC_EROT_SPI_MUX_SEL-O", |
| "HMC_EROT_RECOVERY_L-O", |
| "HMC_EROT_RST_L-O", |
| "GLOBAL_WP_HMC-O", |
| "FPGA_RST_L-O", |
| "USB2_HUB_RST-O", |
| "CPU_UART_MUX_SEL-O", |
| "", |
| "", |
| "", |
| "", |
| ""; |
| }; |
| |
| // HMC Expander @0x74 |
| exp3: gpio@74 { |
| compatible = "nxp,pca9555"; |
| reg = <0x74>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| interrupt-parent = <&gpio1>; |
| interrupts = <ASPEED_GPIO(B, 6) IRQ_TYPE_LEVEL_LOW>; |
| vcc-supply = <&standby_power_regulator>; |
| gpio-line-names = |
| "IOB_PRSNT_L", |
| "IOB_DP_HPD", |
| "IOX_BMC_RESET", |
| "IOB_IOEXP_INT_L", |
| "IOB_UID_LED_L", |
| "IOB_UID_BTN_L", |
| "IOB_SYS_RST_BTN_L", |
| "IOB_PWR_LED_L", |
| "IOB_PWR_BTN_L", |
| "IOB_PHY_RST", |
| "CPLD_JTAG_MUX_SEL", |
| "", |
| "", |
| "", |
| "", |
| ""; |
| }; |
| }; |
| |
| // I2C11 |
| // BMC FRU EEPROM |
| // BMC Temp Sensor |
| &i2c10 { |
| status = "okay"; |
| clock-frequency = <400000>; |
| |
| // BMC FRU EEPROM - 256 bytes |
| eeprom@50 { |
| compatible = "atmel,24c02"; |
| reg = <0x50>; |
| pagesize = <8>; |
| }; |
| }; |
| |
| // I2C12 |
| &i2c11 { |
| status = "disabled"; |
| }; |
| |
| // I2C13 |
| &i2c12 { |
| status = "disabled"; |
| }; |
| |
| // I2C14 |
| // Module 0 UPHY3 SMBus |
| &i2c13 { |
| status = "disabled"; |
| }; |
| |
| // I2C15 |
| // Module 1 UPHY3 SMBus |
| &i2c14 { |
| status = "okay"; |
| clock-frequency = <100000>; |
| multi-master; |
| |
| //E1.S drive slot 0-3 |
| i2c-mux@77 { |
| compatible = "nxp,pca9546"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x77>; |
| i2c-mux-idle-disconnect; |
| vdd-supply = <&standby_power_regulator>; |
| |
| e1si2c0: i2c@0 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0>; |
| }; |
| |
| e1si2c1: i2c@1 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <1>; |
| }; |
| |
| e1si2c2: i2c@2 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <2>; |
| }; |
| |
| e1si2c3: i2c@3 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <3>; |
| }; |
| }; |
| }; |
| |
| // I2C16 |
| &i2c15 { |
| status = "okay"; |
| clock-frequency = <100000>; |
| multi-master; |
| |
| //E1.S drive slot 4-7 |
| i2c-mux@77 { |
| compatible = "nxp,pca9546"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x77>; |
| i2c-mux-idle-disconnect; |
| vdd-supply = <&standby_power_regulator>; |
| |
| e1si2c4: i2c@0 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0>; |
| }; |
| |
| e1si2c5: i2c@1 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <1>; |
| }; |
| |
| e1si2c6: i2c@2 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <2>; |
| }; |
| |
| e1si2c7: i2c@3 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <3>; |
| }; |
| }; |
| }; |
| |
| &rng { |
| status = "okay"; |
| }; |
| |
| &gpio0 { |
| gpio-line-names = |
| /*A0-A7*/ "", "", "", "", "", "", "", "", |
| /*B0-B7*/ "", "", "", "", "", "", "", "", |
| /*C0-C7*/ "SGPIO_I2C_MUX_SEL-O", "", "", "", "", "", "", "", |
| /*D0-D7*/ "", "", "", "UART1_MUX_SEL-O", "", "FPGA_PEX_RST_L-O", "", "", |
| /*E0-E7*/ "RTL8221_PHY_RST_L-O", "RTL8211_PHY_INT_L-I", "", "UART3_MUX_SEL-O", |
| "", "", "", "SGPIO_BMC_EN-O", |
| /*F0-F7*/ "", "", "", "", "", "", "", "", |
| /*G0-G7*/ "", "", "", "", "", "", "", "", |
| /*H0-H7*/ "", "", "", "", "", "", "", "", |
| /*I0-I7*/ "", "", "", "", "", "QSPI2_RST_L-O", "GLOBAL_WP_BMC-O", "BMC_DDR4_TEN-O", |
| /*J0-J7*/ "", "", "", "", "", "", "", "", |
| /*K0-K7*/ "", "", "", "", "", "", "", "", |
| /*L0-L7*/ "", "", "", "", "", "", "", "", |
| /*M0-M7*/ "PCIE_EP_RST_EN-O", "BMC_FRU_WP-O", "FPGA_RST_L-O", "STBY_POWER_EN-O", |
| "STBY_POWER_PG-I", "PCIE_EP_RST_L-O", "", "", |
| /*N0-N7*/ "", "", "", "", "", "", "", "", |
| /*O0-O7*/ "", "", "", "", "", "", "", "", |
| /*P0-P7*/ "", "", "", "", "", "", "", "", |
| /*Q0-Q7*/ "", "", "", "", "", "", "", "", |
| /*R0-R7*/ "", "", "", "", "", "", "", "", |
| /*S0-S7*/ "", "", "", "", "", "", "", "", |
| /*T0-T7*/ "", "", "", "", "", "", "", "", |
| /*U0-U7*/ "", "", "", "", "", "", "", "", |
| /*V0-V7*/ "AP_EROT_REQ-O", "EROT_AP_GNT-I", "", "","PCB_TEMP_ALERT-I", "","", "", |
| /*W0-W7*/ "", "", "", "", "", "", "", "", |
| /*X0-X7*/ "", "", "TPM_MUX_SEL-O", "", "", "", "", "", |
| /*Y0-Y7*/ "", "", "", "EMMC_RST-O", "","", "", "", |
| /*Z0-Z7*/ "BMC_READY-O","", "", "", "", "", "", ""; |
| }; |
| |
| &gpio1 { |
| /* 36 1.8V GPIOs */ |
| gpio-line-names = |
| /*A0-A7*/ "", "", "", "", "", "", "", "", |
| /*B0-B7*/ "", "", "", "", "", "", "IO_EXPANDER_INT_L-I","", |
| /*C0-C7*/ "", "", "", "", "", "", "", "", |
| /*D0-D7*/ "", "", "", "", "", "", "SPI_HOST_TPM_RST_L-O", "SPI_BMC_FPGA_INT_L-I", |
| /*E0-E7*/ "", "", "", "", "", "", "", ""; |
| }; |
