arch/arm64/boot/dts/exynos/axis/artpec8-pinctrl.dtsi

// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
 * Axis ARTPEC-8 SoC pin-mux and pin-config device tree source
 *
 * Copyright (c) 2025 Samsung Electronics Co., Ltd.
 *             https://www.samsung.com
 * Copyright (c) 2025  Axis Communications AB.
 *             https://www.axis.com
 */

#include "artpec-pinctrl.h"

&pinctrl_fsys {
	gpe0: gpe0-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
	};

	gpe1: gpe1-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
	};

	gpe2: gpe2-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
	};

	gpf0: gpf0-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
	};

	gpf1: gpf1-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
	};

	gpf2: gpf2-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
	};

	gpf3: gpf3-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
	};

	gpf4: gpf4-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
	};

	gps0: gps0-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
	};

	gps1: gps1-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
	};

	serial0_bus: serial0-bus-pins {
		samsung,pins = "gpf4-4", "gpf4-5";
		samsung,pin-function = <ARTPEC_PIN_FUNC_2>;
		samsung,pin-pud = <ARTPEC_PIN_PULL_UP>;
		samsung,pin-drv = <ARTPEC_PIN_DRV_SR3>;
	};
};

&pinctrl_peric {
	gpa0: gpa0-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
	};

	gpa1: gpa1-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
	};

	gpa2: gpa2-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
	};

	gpk0: gpk0-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
	};
};