| // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| /* |
| * Copyright 2026 NXP |
| */ |
| |
| /dts-v1/; |
| |
| #include <dt-bindings/usb/pd.h> |
| #include "imx91.dtsi" |
| |
| / { |
| compatible = "fsl,imx91-9x9-qsb", "fsl,imx91"; |
| model = "NXP i.MX91 9x9 Quick Start Board"; |
| |
| aliases { |
| ethernet0 = &fec; |
| ethernet1 = &eqos; |
| gpio0 = &gpio1; |
| gpio1 = &gpio2; |
| gpio2 = &gpio3; |
| i2c0 = &lpi2c1; |
| i2c1 = &lpi2c2; |
| mmc0 = &usdhc1; |
| mmc1 = &usdhc2; |
| rtc0 = &bbnsm_rtc; |
| serial0 = &lpuart1; |
| }; |
| |
| chosen { |
| stdout-path = &lpuart1; |
| }; |
| |
| wm8524: audio-codec { |
| compatible = "wlf,wm8524"; |
| #sound-dai-cells = <0>; |
| wlf,mute-gpios = <&pcal6524 2 GPIO_ACTIVE_LOW>; |
| |
| port { |
| codec_ep: endpoint { |
| remote-endpoint = <&sai1_ep1>; |
| }; |
| }; |
| }; |
| |
| dmic: dmic { |
| compatible = "dmic-codec"; |
| #sound-dai-cells = <0>; |
| num-channels = <4>; |
| |
| port { |
| dmic_ep: endpoint { |
| remote-endpoint = <&micfil_ep>; |
| }; |
| }; |
| }; |
| |
| can_mux: mux-controller-0 { |
| compatible = "gpio-mux"; |
| #mux-control-cells = <0>; |
| #mux-state-cells = <1>; |
| mux-gpios = <&pcal6524 17 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| sai1_mux: mux-controller-1 { |
| compatible = "gpio-mux"; |
| #mux-control-cells = <0>; |
| #mux-state-cells = <1>; |
| mux-gpios = <&pcal6524 18 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| sai1_en_mux: mux-controller-2 { |
| compatible = "gpio-mux"; |
| #mux-control-cells = <0>; |
| #mux-state-cells = <1>; |
| mux-gpios = <&pcal6524 9 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| pinctrl-gpiomux { |
| compatible = "pinctrl-multiplexer"; |
| |
| can_fun: can-grp { |
| mux-states = <&can_mux 1>; |
| }; |
| |
| m2_fun: m2-grp { |
| mux-states = <&sai1_mux 1>; |
| }; |
| |
| pdm_fun: pdm-grp { |
| mux-states = <&can_mux 0>; |
| }; |
| |
| sai1_disable: sai1-disable-grp { |
| mux-states = <&sai1_en_mux 1>; |
| }; |
| |
| sai1_enable: sai1-enable-grp { |
| mux-states = <&sai1_en_mux 0>; |
| }; |
| |
| sai1_fun: sai1-grp { |
| mux-states = <&sai1_mux 0>; |
| }; |
| }; |
| |
| reg_vref_1v8: regulator-adc-vref { |
| compatible = "regulator-fixed"; |
| regulator-name = "vref_1v8"; |
| regulator-max-microvolt = <1800000>; |
| regulator-min-microvolt = <1800000>; |
| }; |
| |
| reg_usdhc2_vmmc: regulator-usdhc2 { |
| compatible = "regulator-fixed"; |
| regulator-name = "VSD_3V3"; |
| off-on-delay-us = <12000>; |
| pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; |
| pinctrl-names = "default"; |
| regulator-max-microvolt = <3300000>; |
| regulator-min-microvolt = <3300000>; |
| gpio = <&gpio3 7 GPIO_ACTIVE_HIGH>; |
| enable-active-high; |
| }; |
| |
| reserved-memory { |
| ranges; |
| #address-cells = <2>; |
| #size-cells = <2>; |
| |
| linux,cma { |
| compatible = "shared-dma-pool"; |
| reusable; |
| size = <0 0x10000000>; |
| linux,cma-default; |
| }; |
| }; |
| |
| sound-micfil { |
| compatible = "audio-graph-card2"; |
| label = "micfil-audio"; |
| links = <&micfil_port>; |
| }; |
| |
| sound-wm8524 { |
| compatible = "audio-graph-card2"; |
| label = "wm8524-audio"; |
| links = <&sai1_port1>; |
| widgets = "Line", "Line Out Jack"; |
| routing = |
| "Line Out Jack", "LINEVOUTL", |
| "Line Out Jack", "LINEVOUTR"; |
| }; |
| }; |
| |
| &adc1 { |
| vref-supply = <®_vref_1v8>; |
| status = "okay"; |
| }; |
| |
| &eqos { |
| phy-handle = <ðphy1>; |
| phy-mode = "rgmii-id"; |
| pinctrl-0 = <&pinctrl_eqos>; |
| pinctrl-names = "default"; |
| status = "okay"; |
| |
| mdio { |
| compatible = "snps,dwmac-mdio"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| ethphy1: ethernet-phy@1 { |
| compatible = "ethernet-phy-ieee802.3-c22"; |
| reg = <1>; |
| reset-gpios = <&pcal6524 15 GPIO_ACTIVE_LOW>; |
| reset-assert-us = <10000>; |
| reset-deassert-us = <80000>; |
| realtek,clkout-disable; |
| }; |
| }; |
| }; |
| |
| &iomuxc { |
| pinctrl_eqos: eqosgrp { |
| fsl,pins = < |
| MX91_PAD_ENET1_MDC__ENET1_MDC 0x57e |
| MX91_PAD_ENET1_MDIO__ENET_QOS_MDIO 0x57e |
| MX91_PAD_ENET1_RD0__ENET_QOS_RGMII_RD0 0x57e |
| MX91_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1 0x57e |
| MX91_PAD_ENET1_RD2__ENET_QOS_RGMII_RD2 0x57e |
| MX91_PAD_ENET1_RD3__ENET_QOS_RGMII_RD3 0x57e |
| MX91_PAD_ENET1_RXC__ENET_QOS_RGMII_RXC 0x5fe |
| MX91_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x57e |
| MX91_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0 0x57e |
| MX91_PAD_ENET1_TD1__ENET1_RGMII_TD1 0x57e |
| MX91_PAD_ENET1_TD2__ENET_QOS_RGMII_TD2 0x57e |
| MX91_PAD_ENET1_TD3__ENET_QOS_RGMII_TD3 0x57e |
| MX91_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x5fe |
| MX91_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x57e |
| >; |
| }; |
| |
| pinctrl_lpi2c1: lpi2c1grp { |
| fsl,pins = < |
| MX91_PAD_I2C1_SCL__LPI2C1_SCL 0x40000b9e |
| MX91_PAD_I2C1_SDA__LPI2C1_SDA 0x40000b9e |
| >; |
| }; |
| |
| pinctrl_lpi2c2: lpi2c2grp { |
| fsl,pins = < |
| MX91_PAD_I2C2_SCL__LPI2C2_SCL 0x40000b9e |
| MX91_PAD_I2C2_SDA__LPI2C2_SDA 0x40000b9e |
| >; |
| }; |
| |
| pinctrl_pcal6524: pcal6524grp { |
| fsl,pins = < |
| MX91_PAD_CCM_CLKO1__GPIO3_IO26 0x31e |
| >; |
| }; |
| |
| pinctrl_pdm: pdmgrp { |
| fsl,pins = < |
| MX91_PAD_PDM_CLK__PDM_CLK 0x31e |
| MX91_PAD_PDM_BIT_STREAM0__PDM_BIT_STREAM0 0x31e |
| MX91_PAD_PDM_BIT_STREAM1__PDM_BIT_STREAM1 0x31e |
| >; |
| }; |
| |
| pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp { |
| fsl,pins = < |
| MX91_PAD_SD2_RESET_B__GPIO3_IO7 0x31e |
| >; |
| }; |
| |
| pinctrl_sai1: sai1grp { |
| fsl,pins = < |
| MX91_PAD_SAI1_TXC__SAI1_TX_BCLK 0x31e |
| MX91_PAD_SAI1_TXFS__SAI1_TX_SYNC 0x31e |
| MX91_PAD_SAI1_TXD0__SAI1_TX_DATA0 0x31e |
| MX91_PAD_SAI1_RXD0__SAI1_MCLK 0x31e |
| >; |
| }; |
| |
| pinctrl_uart1: uart1grp { |
| fsl,pins = < |
| MX91_PAD_UART1_RXD__LPUART1_RX 0x31e |
| MX91_PAD_UART1_TXD__LPUART1_TX 0x31e |
| >; |
| }; |
| |
| pinctrl_usdhc1: usdhc1grp { |
| fsl,pins = < |
| MX91_PAD_SD1_CLK__USDHC1_CLK 0x1582 |
| MX91_PAD_SD1_CMD__USDHC1_CMD 0x1382 |
| MX91_PAD_SD1_DATA0__USDHC1_DATA0 0x1382 |
| MX91_PAD_SD1_DATA1__USDHC1_DATA1 0x1382 |
| MX91_PAD_SD1_DATA2__USDHC1_DATA2 0x1382 |
| MX91_PAD_SD1_DATA3__USDHC1_DATA3 0x1382 |
| MX91_PAD_SD1_DATA4__USDHC1_DATA4 0x1382 |
| MX91_PAD_SD1_DATA5__USDHC1_DATA5 0x1382 |
| MX91_PAD_SD1_DATA6__USDHC1_DATA6 0x1382 |
| MX91_PAD_SD1_DATA7__USDHC1_DATA7 0x1382 |
| MX91_PAD_SD1_STROBE__USDHC1_STROBE 0x1582 |
| >; |
| }; |
| |
| pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { |
| fsl,pins = < |
| MX91_PAD_SD1_CLK__USDHC1_CLK 0x158e |
| MX91_PAD_SD1_CMD__USDHC1_CMD 0x138e |
| MX91_PAD_SD1_DATA0__USDHC1_DATA0 0x138e |
| MX91_PAD_SD1_DATA1__USDHC1_DATA1 0x138e |
| MX91_PAD_SD1_DATA2__USDHC1_DATA2 0x138e |
| MX91_PAD_SD1_DATA3__USDHC1_DATA3 0x138e |
| MX91_PAD_SD1_DATA4__USDHC1_DATA4 0x138e |
| MX91_PAD_SD1_DATA5__USDHC1_DATA5 0x138e |
| MX91_PAD_SD1_DATA6__USDHC1_DATA6 0x138e |
| MX91_PAD_SD1_DATA7__USDHC1_DATA7 0x138e |
| MX91_PAD_SD1_STROBE__USDHC1_STROBE 0x158e |
| >; |
| }; |
| |
| pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { |
| fsl,pins = < |
| MX91_PAD_SD1_CLK__USDHC1_CLK 0x15fe |
| MX91_PAD_SD1_CMD__USDHC1_CMD 0x13fe |
| MX91_PAD_SD1_DATA0__USDHC1_DATA0 0x13fe |
| MX91_PAD_SD1_DATA1__USDHC1_DATA1 0x13fe |
| MX91_PAD_SD1_DATA2__USDHC1_DATA2 0x13fe |
| MX91_PAD_SD1_DATA3__USDHC1_DATA3 0x13fe |
| MX91_PAD_SD1_DATA4__USDHC1_DATA4 0x13fe |
| MX91_PAD_SD1_DATA5__USDHC1_DATA5 0x13fe |
| MX91_PAD_SD1_DATA6__USDHC1_DATA6 0x13fe |
| MX91_PAD_SD1_DATA7__USDHC1_DATA7 0x13fe |
| MX91_PAD_SD1_STROBE__USDHC1_STROBE 0x15fe |
| >; |
| }; |
| |
| pinctrl_usdhc2_gpio: usdhc2gpiogrp { |
| fsl,pins = < |
| MX91_PAD_SD2_CD_B__GPIO3_IO0 0x31e |
| >; |
| }; |
| |
| pinctrl_usdhc2: usdhc2grp { |
| fsl,pins = < |
| MX91_PAD_SD2_CLK__USDHC2_CLK 0x1582 |
| MX91_PAD_SD2_CMD__USDHC2_CMD 0x1382 |
| MX91_PAD_SD2_DATA0__USDHC2_DATA0 0x1382 |
| MX91_PAD_SD2_DATA1__USDHC2_DATA1 0x1382 |
| MX91_PAD_SD2_DATA2__USDHC2_DATA2 0x1382 |
| MX91_PAD_SD2_DATA3__USDHC2_DATA3 0x1382 |
| MX91_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e |
| >; |
| }; |
| |
| pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { |
| fsl,pins = < |
| MX91_PAD_SD2_CLK__USDHC2_CLK 0x158e |
| MX91_PAD_SD2_CMD__USDHC2_CMD 0x138e |
| MX91_PAD_SD2_DATA0__USDHC2_DATA0 0x138e |
| MX91_PAD_SD2_DATA1__USDHC2_DATA1 0x138e |
| MX91_PAD_SD2_DATA2__USDHC2_DATA2 0x138e |
| MX91_PAD_SD2_DATA3__USDHC2_DATA3 0x138e |
| MX91_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e |
| >; |
| }; |
| |
| pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { |
| fsl,pins = < |
| MX91_PAD_SD2_CLK__USDHC2_CLK 0x15fe |
| MX91_PAD_SD2_CMD__USDHC2_CMD 0x13fe |
| MX91_PAD_SD2_DATA0__USDHC2_DATA0 0x13fe |
| MX91_PAD_SD2_DATA1__USDHC2_DATA1 0x13fe |
| MX91_PAD_SD2_DATA2__USDHC2_DATA2 0x13fe |
| MX91_PAD_SD2_DATA3__USDHC2_DATA3 0x13fe |
| MX91_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e |
| >; |
| }; |
| |
| pinctrl_wdog: wdoggrp { |
| fsl,pins = < |
| MX91_PAD_WDOG_ANY__WDOG1_WDOG_ANY 0x31e |
| >; |
| }; |
| }; |
| |
| &lpi2c1 { |
| clock-frequency = <400000>; |
| pinctrl-0 = <&pinctrl_lpi2c1>; |
| pinctrl-names = "default"; |
| status = "okay"; |
| |
| p3t1085: temperature-sensor@48 { |
| compatible = "nxp,p3t1085"; |
| reg = <0x48>; |
| }; |
| |
| ptn5110: tcpc@50 { |
| compatible = "nxp,ptn5110", "tcpci"; |
| reg = <0x50>; |
| interrupt-parent = <&gpio3>; |
| interrupts = <26 IRQ_TYPE_LEVEL_LOW>; |
| |
| typec1_con: connector { |
| compatible = "usb-c-connector"; |
| data-role = "dual"; |
| label = "USB-C"; |
| op-sink-microwatt = <15000000>; |
| power-role = "dual"; |
| self-powered; |
| sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM) |
| PDO_VAR(5000, 20000, 3000)>; |
| source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>; |
| try-power-role = "sink"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| typec1_dr_sw: endpoint { |
| remote-endpoint = <&usb1_drd_sw>; |
| }; |
| }; |
| }; |
| }; |
| }; |
| |
| pcf2131: rtc@53 { |
| compatible = "nxp,pcf2131"; |
| reg = <0x53>; |
| interrupt-parent = <&pcal6524>; |
| interrupts = <1 IRQ_TYPE_EDGE_FALLING>; |
| }; |
| }; |
| |
| &lpi2c2 { |
| clock-frequency = <400000>; |
| pinctrl-0 = <&pinctrl_lpi2c2>; |
| pinctrl-names = "default"; |
| status = "okay"; |
| |
| pcal6524: gpio@22 { |
| compatible = "nxp,pcal6524"; |
| reg = <0x22>; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| interrupt-parent = <&gpio3>; |
| interrupts = <26 IRQ_TYPE_LEVEL_LOW>; |
| #gpio-cells = <2>; |
| gpio-controller; |
| pinctrl-0 = <&pinctrl_pcal6524>; |
| pinctrl-names = "default"; |
| }; |
| |
| pmic@32 { |
| compatible = "nxp,pf9453"; |
| reg = <0x32>; |
| interrupt-parent = <&pcal6524>; |
| interrupts = <11 IRQ_TYPE_EDGE_FALLING>; |
| |
| regulators { |
| buck1: BUCK1 { |
| regulator-name = "BUCK1"; |
| regulator-always-on; |
| regulator-boot-on; |
| regulator-max-microvolt = <1140000>; |
| regulator-min-microvolt = <1060000>; |
| }; |
| |
| buck2: BUCK2 { |
| regulator-name = "BUCK2"; |
| regulator-always-on; |
| regulator-boot-on; |
| regulator-max-microvolt = <900000>; |
| regulator-min-microvolt = <610000>; |
| regulator-ramp-delay = <12500>; |
| }; |
| |
| buck3: BUCK3 { |
| regulator-name = "BUCK3"; |
| regulator-always-on; |
| regulator-boot-on; |
| regulator-max-microvolt = <3450000>; |
| regulator-min-microvolt = <1650000>; |
| }; |
| |
| buck4: BUCK4 { |
| regulator-name = "BUCK4"; |
| regulator-always-on; |
| regulator-boot-on; |
| regulator-max-microvolt = <3450000>; |
| regulator-min-microvolt = <1650000>; |
| }; |
| |
| ldo1: LDO1 { |
| regulator-name = "LDO1"; |
| regulator-always-on; |
| regulator-boot-on; |
| regulator-max-microvolt = <3300000>; |
| regulator-min-microvolt = <1650000>; |
| }; |
| |
| ldo2: LDO2 { |
| regulator-name = "LDO2"; |
| regulator-always-on; |
| regulator-boot-on; |
| regulator-max-microvolt = <1890000>; |
| regulator-min-microvolt = <760000>; |
| }; |
| |
| ldo_snvs: LDO-SNVS { |
| regulator-name = "LDO-SNVS"; |
| regulator-always-on; |
| regulator-boot-on; |
| regulator-max-microvolt = <1950000>; |
| regulator-min-microvolt = <1650000>; |
| }; |
| }; |
| }; |
| }; |
| |
| &lpuart1 { |
| pinctrl-0 = <&pinctrl_uart1>; |
| pinctrl-names = "default"; |
| status = "okay"; |
| }; |
| |
| &micfil { |
| #sound-dai-cells = <0>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_pdm>, <&pdm_fun>; |
| assigned-clocks = <&clk IMX93_CLK_PDM>; |
| assigned-clock-parents = <&clk IMX93_CLK_AUDIO_PLL>; |
| assigned-clock-rates = <49152000>; |
| status = "okay"; |
| |
| micfil_port: port { |
| capture-only; |
| |
| micfil_ep: endpoint { |
| remote-endpoint = <&dmic_ep>; |
| }; |
| }; |
| }; |
| |
| &sai1 { |
| #sound-dai-cells = <0>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_sai1>, <&sai1_fun>, <&sai1_enable>; |
| assigned-clocks = <&clk IMX93_CLK_SAI1>; |
| assigned-clock-parents = <&clk IMX93_CLK_AUDIO_PLL>; |
| assigned-clock-rates = <24576000>; |
| clocks = <&clk IMX93_CLK_SAI1_IPG>, <&clk IMX93_CLK_DUMMY>, |
| <&clk IMX93_CLK_SAI1_GATE>, <&clk IMX93_CLK_DUMMY>, |
| <&clk IMX93_CLK_DUMMY>, <&clk IMX93_CLK_AUDIO_PLL>; |
| clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3", "pll8k"; |
| fsl,sai-mclk-direction-output; |
| status = "okay"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| sai1_port1: port@1 { |
| reg = <1>; |
| playback-only; |
| |
| sai1_ep1: endpoint { |
| dai-format = "i2s"; |
| dai-tdm-slot-num = <2>; |
| dai-tdm-slot-width = <32>; |
| bitclock-master; |
| frame-master; |
| mclk-fs = <256>; |
| system-clock-direction-out; |
| remote-endpoint = <&codec_ep>; |
| }; |
| }; |
| }; |
| }; |
| |
| &usbotg1 { |
| adp-disable; |
| disable-over-current; |
| dr_mode = "otg"; |
| hnp-disable; |
| srp-disable; |
| usb-role-switch; |
| samsung,picophy-dc-vol-level-adjust = <7>; |
| samsung,picophy-pre-emp-curr-control = <3>; |
| status = "okay"; |
| |
| port { |
| usb1_drd_sw: endpoint { |
| remote-endpoint = <&typec1_dr_sw>; |
| }; |
| }; |
| }; |
| |
| &usdhc1 { |
| bus-width = <8>; |
| non-removable; |
| pinctrl-0 = <&pinctrl_usdhc1>; |
| pinctrl-1 = <&pinctrl_usdhc1_100mhz>; |
| pinctrl-2 = <&pinctrl_usdhc1_200mhz>; |
| pinctrl-names = "default", "state_100mhz", "state_200mhz"; |
| fsl,tuning-step = <1>; |
| status = "okay"; |
| }; |
| |
| &usdhc2 { |
| bus-width = <4>; |
| cd-gpios = <&gpio3 0 GPIO_ACTIVE_LOW>; |
| no-mmc; |
| no-sdio; |
| pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; |
| pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; |
| pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; |
| pinctrl-names = "default", "state_100mhz", "state_200mhz"; |
| vmmc-supply = <®_usdhc2_vmmc>; |
| fsl,tuning-step = <1>; |
| status = "okay"; |
| }; |
| |
| &wdog3 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_wdog>; |
| fsl,ext-reset-output; |
| status = "okay"; |
| }; |
