| // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| /* |
| * Variscite Symphony carrier board for VAR-SOM-MX91 |
| * |
| * Link: https://variscite.com/carrier-boards/symphony-board/ |
| * |
| * Copyright (C) 2026 Variscite Ltd. - https://www.variscite.com/ |
| * |
| */ |
| |
| /dts-v1/; |
| |
| #include <dt-bindings/leds/common.h> |
| #include "imx91-var-som.dtsi" |
| |
| /{ |
| model = "Variscite VAR-SOM-MX91 on Symphony evaluation board"; |
| compatible = "variscite,var-som-mx91-symphony", |
| "variscite,var-som-mx91", "fsl,imx91"; |
| |
| aliases { |
| ethernet0 = &eqos; |
| ethernet1 = &fec; |
| gpio0 = &gpio1; |
| gpio1 = &gpio2; |
| gpio2 = &gpio3; |
| gpio3 = &gpio4; |
| gpio4 = &pca9534; |
| gpio5 = &pca6408; |
| i2c0 = &lpi2c1; |
| i2c1 = &lpi2c2; |
| i2c2 = &lpi2c3; |
| mmc0 = &usdhc1; |
| mmc1 = &usdhc2; |
| serial0 = &lpuart1; |
| serial1 = &lpuart2; |
| serial2 = &lpuart3; |
| serial3 = &lpuart4; |
| serial4 = &lpuart5; |
| }; |
| |
| chosen { |
| stdout-path = &lpuart1; |
| }; |
| |
| gpio-keys { |
| compatible = "gpio-keys"; |
| |
| key-back { |
| label = "Back"; |
| gpios = <&pca9534 1 GPIO_ACTIVE_LOW>; |
| linux,code = <KEY_BACK>; |
| }; |
| |
| key-home { |
| label = "Home"; |
| gpios = <&pca9534 2 GPIO_ACTIVE_LOW>; |
| linux,code = <KEY_HOME>; |
| }; |
| |
| key-menu { |
| label = "Menu"; |
| gpios = <&pca9534 3 GPIO_ACTIVE_LOW>; |
| linux,code = <KEY_MENU>; |
| }; |
| }; |
| |
| gpio-leds { |
| compatible = "gpio-leds"; |
| |
| led-hearthbeat { |
| function = LED_FUNCTION_STATUS; |
| color = <LED_COLOR_ID_GREEN>; |
| gpios = <&pca9534 0 GPIO_ACTIVE_HIGH>; |
| linux,default-trigger = "heartbeat"; |
| }; |
| }; |
| |
| reg_vref_1v8: regulator-adc-vref { |
| compatible = "regulator-fixed"; |
| regulator-name = "vref_1v8"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| }; |
| |
| /* |
| * Needed only for Symphony <= v1.5 |
| */ |
| reg_fec_phy: regulator-fec-phy { |
| compatible = "regulator-fixed"; |
| regulator-name = "fec-phy"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-enable-ramp-delay = <20000>; |
| gpio = <&pca9534 7 GPIO_ACTIVE_HIGH>; |
| enable-active-high; |
| regulator-always-on; |
| }; |
| |
| reg_usdhc2_vmmc: regulator-usdhc2 { |
| compatible = "regulator-fixed"; |
| regulator-name = "VSD_3V3"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| gpio = <&pca6408 6 GPIO_ACTIVE_HIGH>; |
| off-on-delay-us = <20000>; |
| enable-active-high; |
| }; |
| |
| reserved-memory { |
| ranges; |
| #address-cells = <2>; |
| #size-cells = <2>; |
| |
| ele_reserved: ele-reserved@87de0000 { |
| compatible = "shared-dma-pool"; |
| reg = <0 0x87de0000 0 0x100000>; |
| no-map; |
| }; |
| |
| linux,cma { |
| compatible = "shared-dma-pool"; |
| alloc-ranges = <0 0x80000000 0 0x40000000>; |
| reusable; |
| size = <0 0x10000000>; |
| linux,cma-default; |
| }; |
| }; |
| }; |
| |
| &adc1 { |
| vref-supply = <®_vref_1v8>; |
| status = "okay"; |
| }; |
| |
| /* Use external instead of internal RTC*/ |
| &bbnsm_rtc { |
| status = "disabled"; |
| }; |
| |
| &eqos { |
| mdio { |
| ethphy1: ethernet-phy@5 { |
| compatible = "ethernet-phy-ieee802.3-c22"; |
| reg = <5>; |
| eee-broken-1000t; |
| reset-gpios = <&pca9534 5 GPIO_ACTIVE_LOW>; |
| reset-assert-us = <10000>; |
| reset-deassert-us = <20000>; |
| vddio-supply = <&vddio1>; |
| |
| leds { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| led@0 { |
| reg = <0>; |
| color = <LED_COLOR_ID_YELLOW>; |
| function = LED_FUNCTION_LAN; |
| linux,default-trigger = "netdev"; |
| }; |
| |
| led@1 { |
| reg = <1>; |
| color = <LED_COLOR_ID_GREEN>; |
| function = LED_FUNCTION_LAN; |
| linux,default-trigger = "netdev"; |
| }; |
| }; |
| |
| vddio1: vddio-regulator { |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| }; |
| }; |
| }; |
| }; |
| |
| ðphy0 { |
| leds { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| led@0 { |
| reg = <0>; |
| color = <LED_COLOR_ID_YELLOW>; |
| function = LED_FUNCTION_LAN; |
| linux,default-trigger = "netdev"; |
| }; |
| |
| led@1 { |
| reg = <1>; |
| color = <LED_COLOR_ID_GREEN>; |
| function = LED_FUNCTION_LAN; |
| linux,default-trigger = "netdev"; |
| }; |
| }; |
| }; |
| |
| &fec { |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&pinctrl_fec>; |
| pinctrl-1 = <&pinctrl_fec_sleep>; |
| /* |
| * The required RGMII TX and RX 2ns delays are implemented directly |
| * in hardware via passive delay elements on the SOM PCB. |
| * No delay configuration is needed in software via PHY driver. |
| */ |
| phy-mode = "rgmii"; |
| phy-handle = <ðphy1>; |
| phy-supply = <®_fec_phy>; |
| status = "okay"; |
| }; |
| |
| &flexcan1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_flexcan1>; |
| status = "okay"; |
| }; |
| |
| &lpi2c1 { |
| clock-frequency = <400000>; |
| pinctrl-names = "default", "sleep", "gpio"; |
| pinctrl-0 = <&pinctrl_lpi2c1>; |
| pinctrl-1 = <&pinctrl_lpi2c1_gpio>; |
| pinctrl-2 = <&pinctrl_lpi2c1_gpio>; |
| scl-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>; |
| sda-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>; |
| status = "okay"; |
| |
| pca9534: gpio@20 { |
| compatible = "nxp,pca9534"; |
| reg = <0x20>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_pca9534>; |
| interrupt-parent = <&gpio3>; |
| interrupts = <26 IRQ_TYPE_EDGE_FALLING>; |
| wakeup-source; |
| }; |
| |
| pca6408: gpio@21 { |
| compatible = "nxp,pcal6408"; |
| reg = <0x21>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_pca6408>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| interrupt-parent = <&gpio2>; |
| interrupts = <4 IRQ_TYPE_EDGE_FALLING>; |
| wakeup-source; |
| |
| tpm-enable-hog { |
| gpio-hog; |
| gpios = <4 GPIO_ACTIVE_HIGH>; |
| output-high; |
| line-name = "tpm_en"; |
| }; |
| |
| /* RGB_SEL */ |
| lvds-brg-enable-hog { |
| gpio-hog; |
| gpios = <7 GPIO_ACTIVE_HIGH>; |
| output-high; |
| line-name = "lvds_brg_en"; |
| }; |
| }; |
| |
| /* USB Type-C Controller */ |
| ptn5150: typec@3d { |
| compatible = "nxp,ptn5150"; |
| reg = <0x3d>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_ptn5150>; |
| interrupt-parent = <&gpio1>; |
| interrupts = <10 IRQ_TYPE_NONE>; |
| |
| port { |
| typec1_dr_sw: endpoint { |
| remote-endpoint = <&usb1_drd_sw>; |
| }; |
| }; |
| }; |
| |
| st33ktpm2xi2c: tpm@2e { |
| compatible = "st,st33ktpm2xi2c", "tcg,tpm-tis-i2c"; |
| reg = <0x2e>; |
| }; |
| |
| /* Capacitive touch controller */ |
| ft5x06_ts: touchscreen@38 { |
| compatible = "edt,edt-ft5206"; |
| reg = <0x38>; |
| interrupt-parent = <&pca6408>; |
| interrupts = <3 IRQ_TYPE_EDGE_FALLING>; |
| touchscreen-size-x = <800>; |
| touchscreen-size-y = <480>; |
| touchscreen-inverted-x; |
| touchscreen-inverted-y; |
| wakeup-source; |
| }; |
| |
| /* DS1337 RTC module */ |
| rtc@68 { |
| compatible = "dallas,ds1337"; |
| reg = <0x68>; |
| }; |
| }; |
| |
| /* pins conflict */ |
| &lpspi8 { |
| status = "disabled"; |
| }; |
| |
| /* Console */ |
| &lpuart1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart1>; |
| status = "okay"; |
| }; |
| |
| &tpm4 { |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&pinctrl_tpm4>; |
| pinctrl-1 = <&pinctrl_tpm4_sleep>; |
| status = "okay"; |
| }; |
| |
| &usbotg1 { |
| dr_mode = "otg"; |
| hnp-disable; |
| srp-disable; |
| adp-disable; |
| usb-role-switch; |
| samsung,picophy-pre-emp-curr-control = <3>; |
| samsung,picophy-dc-vol-level-adjust = <7>; |
| status = "okay"; |
| |
| port { |
| usb1_drd_sw: endpoint { |
| remote-endpoint = <&typec1_dr_sw>; |
| }; |
| }; |
| }; |
| |
| &usbotg2 { |
| dr_mode = "host"; |
| disable-over-current; |
| status = "okay"; |
| }; |
| |
| /* SD */ |
| &usdhc2 { |
| pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; |
| pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; |
| pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; |
| pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; |
| pinctrl-3 = <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_gpio_sleep>; |
| bus-width = <4>; |
| cd-gpios = <&gpio3 00 GPIO_ACTIVE_LOW>; |
| no-mmc; |
| no-sdio; |
| vmmc-supply = <®_usdhc2_vmmc>; |
| status = "okay"; |
| }; |
| |
| /* Watchdog */ |
| &wdog3 { |
| status = "okay"; |
| }; |
| |
| &iomuxc { |
| pinctrl_fec: fecgrp { |
| fsl,pins = < |
| MX91_PAD_ENET2_RD0__ENET2_RGMII_RD0 0x57e |
| MX91_PAD_ENET2_RD1__ENET2_RGMII_RD1 0x57e |
| MX91_PAD_ENET2_RD2__ENET2_RGMII_RD2 0x57e |
| MX91_PAD_ENET2_RD3__ENET2_RGMII_RD3 0x57e |
| MX91_PAD_ENET2_RXC__ENET2_RGMII_RXC 0x5fe |
| MX91_PAD_ENET2_RX_CTL__ENET2_RGMII_RX_CTL 0x57e |
| MX91_PAD_ENET2_TD0__ENET2_RGMII_TD0 0x57e |
| MX91_PAD_ENET2_TD1__ENET2_RGMII_TD1 0x57e |
| MX91_PAD_ENET2_TD2__ENET2_RGMII_TD2 0x57e |
| MX91_PAD_ENET2_TD3__ENET2_RGMII_TD3 0x57e |
| MX91_PAD_ENET2_TXC__ENET2_RGMII_TXC 0x5fe |
| MX91_PAD_ENET2_TX_CTL__ENET2_RGMII_TX_CTL 0x57e |
| >; |
| }; |
| |
| pinctrl_fec_sleep: fecsleepgrp { |
| fsl,pins = < |
| MX91_PAD_ENET2_RD0__GPIO4_IO24 0x51e |
| MX91_PAD_ENET2_RD1__GPIO4_IO25 0x51e |
| MX91_PAD_ENET2_RD2__GPIO4_IO26 0x51e |
| MX91_PAD_ENET2_RD3__GPIO4_IO27 0x51e |
| MX91_PAD_ENET2_RXC__GPIO4_IO23 0x51e |
| MX91_PAD_ENET2_RX_CTL__GPIO4_IO22 0x51e |
| MX91_PAD_ENET2_TD0__GPIO4_IO19 0x51e |
| MX91_PAD_ENET2_TD1__GPIO4_IO18 0x51e |
| MX91_PAD_ENET2_TD2__GPIO4_IO17 0x51e |
| MX91_PAD_ENET2_TD3__GPIO4_IO16 0x51e |
| MX91_PAD_ENET2_TXC__GPIO4_IO21 0x51e |
| MX91_PAD_ENET2_TX_CTL__GPIO4_IO20 0x51e |
| >; |
| }; |
| |
| pinctrl_flexcan1: flexcan1grp { |
| fsl,pins = < |
| MX91_PAD_PDM_CLK__CAN1_TX 0x139e |
| MX91_PAD_PDM_BIT_STREAM0__CAN1_RX 0x139e |
| >; |
| }; |
| |
| pinctrl_lpi2c1: lpi2c1grp { |
| fsl,pins = < |
| MX91_PAD_I2C1_SCL__LPI2C1_SCL 0x40000b9e |
| MX91_PAD_I2C1_SDA__LPI2C1_SDA 0x40000b9e |
| >; |
| }; |
| |
| pinctrl_lpi2c1_gpio: lpi2c1gpiogrp { |
| fsl,pins = < |
| MX91_PAD_I2C1_SCL__GPIO1_IO0 0x31e |
| MX91_PAD_I2C1_SDA__GPIO1_IO1 0x31e |
| >; |
| }; |
| |
| pinctrl_pca6408: pca6408grp { |
| fsl,pins = < |
| MX91_PAD_GPIO_IO04__GPIO2_IO4 0x31e |
| >; |
| }; |
| |
| pinctrl_pca9534: pca9534grp { |
| fsl,pins = < |
| MX91_PAD_CCM_CLKO1__GPIO3_IO26 0x31e |
| >; |
| }; |
| |
| pinctrl_ptn5150: ptn5150grp { |
| fsl,pins = < |
| MX91_PAD_PDM_BIT_STREAM1__GPIO1_IO10 0x31e |
| >; |
| }; |
| |
| pinctrl_uart1: uart1grp { |
| fsl,pins = < |
| MX91_PAD_UART1_RXD__LPUART1_RX 0x31e |
| MX91_PAD_UART1_TXD__LPUART1_TX 0x31e |
| >; |
| }; |
| |
| pinctrl_tpm4: tpm4grp { |
| fsl,pins = < |
| MX91_PAD_GPIO_IO05__TPM4_CH0 0x51e |
| >; |
| }; |
| |
| pinctrl_tpm4_sleep: tpm4sleepgrp { |
| fsl,pins = < |
| MX91_PAD_GPIO_IO05__GPIO2_IO5 0x51e |
| >; |
| }; |
| |
| pinctrl_usdhc2: usdhc2grp { |
| fsl,pins = < |
| MX91_PAD_SD2_CLK__USDHC2_CLK 0x1582 |
| MX91_PAD_SD2_CMD__USDHC2_CMD 0x1382 |
| MX91_PAD_SD2_DATA0__USDHC2_DATA0 0x1382 |
| MX91_PAD_SD2_DATA1__USDHC2_DATA1 0x1382 |
| MX91_PAD_SD2_DATA2__USDHC2_DATA2 0x1382 |
| MX91_PAD_SD2_DATA3__USDHC2_DATA3 0x1382 |
| MX91_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e |
| >; |
| }; |
| |
| pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { |
| fsl,pins = < |
| MX91_PAD_SD2_CLK__USDHC2_CLK 0x158e |
| MX91_PAD_SD2_CMD__USDHC2_CMD 0x138e |
| MX91_PAD_SD2_DATA0__USDHC2_DATA0 0x138e |
| MX91_PAD_SD2_DATA1__USDHC2_DATA1 0x138e |
| MX91_PAD_SD2_DATA2__USDHC2_DATA2 0x138e |
| MX91_PAD_SD2_DATA3__USDHC2_DATA3 0x138e |
| MX91_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e |
| >; |
| }; |
| |
| pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { |
| fsl,pins = < |
| MX91_PAD_SD2_CLK__USDHC2_CLK 0x15fe |
| MX91_PAD_SD2_CMD__USDHC2_CMD 0x13fe |
| MX91_PAD_SD2_DATA0__USDHC2_DATA0 0x13fe |
| MX91_PAD_SD2_DATA1__USDHC2_DATA1 0x13fe |
| MX91_PAD_SD2_DATA2__USDHC2_DATA2 0x13fe |
| MX91_PAD_SD2_DATA3__USDHC2_DATA3 0x13fe |
| MX91_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e |
| >; |
| }; |
| |
| pinctrl_usdhc2_sleep: usdhc2sleep-grp { |
| fsl,pins = < |
| MX91_PAD_SD2_CLK__GPIO3_IO1 0x51e |
| MX91_PAD_SD2_CMD__GPIO3_IO2 0x51e |
| MX91_PAD_SD2_DATA0__GPIO3_IO3 0x51e |
| MX91_PAD_SD2_DATA1__GPIO3_IO4 0x51e |
| MX91_PAD_SD2_DATA2__GPIO3_IO5 0x51e |
| MX91_PAD_SD2_DATA3__GPIO3_IO6 0x51e |
| MX91_PAD_SD2_VSELECT__GPIO3_IO19 0x51e |
| >; |
| }; |
| |
| pinctrl_usdhc2_gpio: usdhc2gpiogrp { |
| fsl,pins = < |
| MX91_PAD_SD2_CD_B__GPIO3_IO0 0x31e |
| >; |
| }; |
| |
| pinctrl_usdhc2_gpio_sleep: usdhc2gpiosleep-grp { |
| fsl,pins = < |
| MX91_PAD_SD2_CD_B__GPIO3_IO0 0x51e |
| >; |
| }; |
| }; |
