| // SPDX-License-Identifier: GPL-2.0 |
| // Copyright (c) 2021 Nuvoton Technology tomer.maimon@nuvoton.com |
| |
| #include <dt-bindings/clock/nuvoton,npcm845-clk.h> |
| #include <dt-bindings/interrupt-controller/arm-gic.h> |
| #include <dt-bindings/interrupt-controller/irq.h> |
| |
| / { |
| #address-cells = <2>; |
| #size-cells = <2>; |
| interrupt-parent = <&gic>; |
| |
| soc { |
| #address-cells = <2>; |
| #size-cells = <2>; |
| compatible = "simple-bus"; |
| interrupt-parent = <&gic>; |
| ranges; |
| |
| gcr: system-controller@f0800000 { |
| compatible = "nuvoton,npcm845-gcr", "syscon"; |
| reg = <0x0 0xf0800000 0x0 0x1000>; |
| }; |
| |
| gic: interrupt-controller@dfff9000 { |
| compatible = "arm,gic-400"; |
| reg = <0x0 0xdfff9000 0x0 0x1000>, |
| <0x0 0xdfffa000 0x0 0x2000>, |
| <0x0 0xdfffc000 0x0 0x2000>, |
| <0x0 0xdfffe000 0x0 0x2000>; |
| interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; |
| #interrupt-cells = <3>; |
| interrupt-controller; |
| #address-cells = <0>; |
| }; |
| }; |
| |
| ahb { |
| #address-cells = <2>; |
| #size-cells = <2>; |
| compatible = "simple-bus"; |
| interrupt-parent = <&gic>; |
| ranges; |
| |
| clk: rstc: reset-controller@f0801000 { |
| compatible = "nuvoton,npcm845-reset"; |
| reg = <0x0 0xf0801000 0x0 0xC4>; |
| nuvoton,sysgcr = <&gcr>; |
| #reset-cells = <2>; |
| clocks = <&refclk>; |
| #clock-cells = <1>; |
| }; |
| |
| apb { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| compatible = "simple-bus"; |
| interrupt-parent = <&gic>; |
| ranges = <0x0 0x0 0xf0000000 0x00300000>, |
| <0xfff00000 0x0 0xfff00000 0x00016000>; |
| |
| peci: peci-controller@100000 { |
| compatible = "nuvoton,npcm845-peci"; |
| reg = <0x100000 0x1000>; |
| interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&clk NPCM8XX_CLK_APB3>; |
| cmd-timeout-ms = <1000>; |
| status = "disabled"; |
| }; |
| |
| timer0: timer@8000 { |
| compatible = "nuvoton,npcm845-timer"; |
| interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; |
| reg = <0x8000 0x1C>; |
| clocks = <&refclk>; |
| clock-names = "refclk"; |
| }; |
| |
| serial0: serial@0 { |
| compatible = "nuvoton,npcm845-uart", "nuvoton,npcm750-uart"; |
| reg = <0x0 0x1000>; |
| clocks = <&clk NPCM8XX_CLK_UART>; |
| interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; |
| reg-shift = <2>; |
| status = "disabled"; |
| }; |
| |
| serial1: serial@1000 { |
| compatible = "nuvoton,npcm845-uart", "nuvoton,npcm750-uart"; |
| reg = <0x1000 0x1000>; |
| clocks = <&clk NPCM8XX_CLK_UART>; |
| interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; |
| reg-shift = <2>; |
| status = "disabled"; |
| }; |
| |
| serial2: serial@2000 { |
| compatible = "nuvoton,npcm845-uart", "nuvoton,npcm750-uart"; |
| reg = <0x2000 0x1000>; |
| clocks = <&clk NPCM8XX_CLK_UART>; |
| interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>; |
| reg-shift = <2>; |
| status = "disabled"; |
| }; |
| |
| serial3: serial@3000 { |
| compatible = "nuvoton,npcm845-uart", "nuvoton,npcm750-uart"; |
| reg = <0x3000 0x1000>; |
| clocks = <&clk NPCM8XX_CLK_UART>; |
| interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>; |
| reg-shift = <2>; |
| status = "disabled"; |
| }; |
| |
| serial4: serial@4000 { |
| compatible = "nuvoton,npcm845-uart", "nuvoton,npcm750-uart"; |
| reg = <0x4000 0x1000>; |
| clocks = <&clk NPCM8XX_CLK_UART>; |
| interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>; |
| reg-shift = <2>; |
| status = "disabled"; |
| }; |
| |
| serial5: serial@5000 { |
| compatible = "nuvoton,npcm845-uart", "nuvoton,npcm750-uart"; |
| reg = <0x5000 0x1000>; |
| clocks = <&clk NPCM8XX_CLK_UART>; |
| interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; |
| reg-shift = <2>; |
| status = "disabled"; |
| }; |
| |
| serial6: serial@6000 { |
| compatible = "nuvoton,npcm845-uart", "nuvoton,npcm750-uart"; |
| reg = <0x6000 0x1000>; |
| clocks = <&clk NPCM8XX_CLK_UART>; |
| interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>; |
| reg-shift = <2>; |
| status = "disabled"; |
| }; |
| |
| watchdog0: watchdog@801c { |
| compatible = "nuvoton,npcm845-wdt", "nuvoton,npcm750-wdt"; |
| interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; |
| reg = <0x801c 0x4>; |
| status = "disabled"; |
| clocks = <&refclk>; |
| }; |
| |
| watchdog1: watchdog@901c { |
| compatible = "nuvoton,npcm845-wdt", "nuvoton,npcm750-wdt"; |
| interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; |
| reg = <0x901c 0x4>; |
| status = "disabled"; |
| clocks = <&refclk>; |
| }; |
| |
| watchdog2: watchdog@a01c { |
| compatible = "nuvoton,npcm845-wdt", "nuvoton,npcm750-wdt"; |
| interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; |
| reg = <0xa01c 0x4>; |
| status = "disabled"; |
| clocks = <&refclk>; |
| }; |
| }; |
| }; |
| |
| pinctrl: pinctrl@f0010000 { |
| compatible = "nuvoton,npcm845-pinctrl"; |
| ranges = <0x0 0x0 0xf0010000 0x8000>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| nuvoton,sysgcr = <&gcr>; |
| status = "okay"; |
| gpio0: gpio@f0010000 { |
| gpio-controller; |
| #gpio-cells = <2>; |
| reg = <0x0 0xB0>; |
| interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; |
| gpio-ranges = <&pinctrl 0 0 32>; |
| }; |
| gpio1: gpio@f0011000 { |
| gpio-controller; |
| #gpio-cells = <2>; |
| reg = <0x1000 0xB0>; |
| interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; |
| gpio-ranges = <&pinctrl 0 32 32>; |
| }; |
| gpio2: gpio@f0012000 { |
| gpio-controller; |
| #gpio-cells = <2>; |
| reg = <0x2000 0xB0>; |
| interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; |
| gpio-ranges = <&pinctrl 0 64 32>; |
| }; |
| gpio3: gpio@f0013000 { |
| gpio-controller; |
| #gpio-cells = <2>; |
| reg = <0x3000 0xB0>; |
| interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; |
| gpio-ranges = <&pinctrl 0 96 32>; |
| }; |
| gpio4: gpio@f0014000 { |
| gpio-controller; |
| #gpio-cells = <2>; |
| reg = <0x4000 0xB0>; |
| interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; |
| gpio-ranges = <&pinctrl 0 128 32>; |
| }; |
| gpio5: gpio@f0015000 { |
| gpio-controller; |
| #gpio-cells = <2>; |
| reg = <0x5000 0xB0>; |
| interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; |
| gpio-ranges = <&pinctrl 0 160 32>; |
| }; |
| gpio6: gpio@f0016000 { |
| gpio-controller; |
| #gpio-cells = <2>; |
| reg = <0x6000 0xB0>; |
| interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; |
| gpio-ranges = <&pinctrl 0 192 32>; |
| }; |
| gpio7: gpio@f0017000 { |
| gpio-controller; |
| #gpio-cells = <2>; |
| reg = <0x7000 0xB0>; |
| interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; |
| gpio-ranges = <&pinctrl 0 224 32>; |
| }; |
| |
| iox1_pins: iox1-mux { |
| groups = "iox1"; |
| function = "iox1"; |
| }; |
| iox2_pins: iox2-mux { |
| groups = "iox2"; |
| function = "iox2"; |
| }; |
| smb1d_pins: smb1d-mux { |
| groups = "smb1d"; |
| function = "smb1d"; |
| }; |
| smb2d_pins: smb2d-mux { |
| groups = "smb2d"; |
| function = "smb2d"; |
| }; |
| lkgpo1_pins: lkgpo1-mux { |
| groups = "lkgpo1"; |
| function = "lkgpo1"; |
| }; |
| lkgpo2_pins: lkgpo2-mux { |
| groups = "lkgpo2"; |
| function = "lkgpo2"; |
| }; |
| ioxh_pins: ioxh-mux { |
| groups = "ioxh"; |
| function = "ioxh"; |
| }; |
| gspi_pins: gspi-mux { |
| groups = "gspi"; |
| function = "gspi"; |
| }; |
| smb5b_pins: smb5b-mux { |
| groups = "smb5b"; |
| function = "smb5b"; |
| }; |
| smb5c_pins: smb5c-mux { |
| groups = "smb5c"; |
| function = "smb5c"; |
| }; |
| lkgpo0_pins: lkgpo0-mux { |
| groups = "lkgpo0"; |
| function = "lkgpo0"; |
| }; |
| pspi_pins: pspi-mux { |
| groups = "pspi"; |
| function = "pspi"; |
| }; |
| jm1_pins: jm1-mux { |
| groups = "jm1"; |
| function = "jm1"; |
| }; |
| jm2_pins: jm2-mux { |
| groups = "jm2"; |
| function = "jm2"; |
| }; |
| smb4b_pins: smb4b-mux { |
| groups = "smb4b"; |
| function = "smb4b"; |
| }; |
| smb4c_pins: smb4c-mux { |
| groups = "smb4c"; |
| function = "smb4c"; |
| }; |
| smb15_pins: smb15-mux { |
| groups = "smb15"; |
| function = "smb15"; |
| }; |
| smb16_pins: smb16-mux { |
| groups = "smb16"; |
| function = "smb16"; |
| }; |
| smb17_pins: smb17-mux { |
| groups = "smb17"; |
| function = "smb17"; |
| }; |
| smb18_pins: smb18-mux { |
| groups = "smb18"; |
| function = "smb18"; |
| }; |
| smb19_pins: smb19-mux { |
| groups = "smb19"; |
| function = "smb19"; |
| }; |
| smb20_pins: smb20-mux { |
| groups = "smb20"; |
| function = "smb20"; |
| }; |
| smb21_pins: smb21-mux { |
| groups = "smb21"; |
| function = "smb21"; |
| }; |
| smb22_pins: smb22-mux { |
| groups = "smb22"; |
| function = "smb22"; |
| }; |
| smb23_pins: smb23-mux { |
| groups = "smb23"; |
| function = "smb23"; |
| }; |
| smb23b_pins: smb23b-mux { |
| groups = "smb23b"; |
| function = "smb23b"; |
| }; |
| smb4d_pins: smb4d-mux { |
| groups = "smb4d"; |
| function = "smb4d"; |
| }; |
| smb14_pins: smb14-mux { |
| groups = "smb14"; |
| function = "smb14"; |
| }; |
| smb5_pins: smb5-mux { |
| groups = "smb5"; |
| function = "smb5"; |
| }; |
| smb4_pins: smb4-mux { |
| groups = "smb4"; |
| function = "smb4"; |
| }; |
| smb3_pins: smb3-mux { |
| groups = "smb3"; |
| function = "smb3"; |
| }; |
| spi0cs1_pins: spi0cs1-mux { |
| groups = "spi0cs1"; |
| function = "spi0cs1"; |
| }; |
| spi1cs0_pins: spi1cs0-mux { |
| groups = "spi1cs0"; |
| function = "spi1cs0"; |
| }; |
| spi1cs1_pins: spi1cs1-mux { |
| groups = "spi1cs1"; |
| function = "spi1cs1"; |
| }; |
| spi1cs2_pins: spi1cs2-mux { |
| groups = "spi1cs2"; |
| function = "spi1cs2"; |
| }; |
| spi1cs3_pins: spi1cs3-mux { |
| groups = "spi1cs3"; |
| function = "spi1cs3"; |
| }; |
| smb3c_pins: smb3c-mux { |
| groups = "smb3c"; |
| function = "smb3c"; |
| }; |
| smb3b_pins: smb3b-mux { |
| groups = "smb3b"; |
| function = "smb3b"; |
| }; |
| bmcuart0a_pins: bmcuart0a-mux { |
| groups = "bmcuart0a"; |
| function = "bmcuart0a"; |
| }; |
| uart1_pins: uart1-mux { |
| groups = "uart1"; |
| function = "uart1"; |
| }; |
| jtag2_pins: jtag2-mux { |
| groups = "jtag2"; |
| function = "jtag2"; |
| }; |
| bmcuart1_pins: bmcuart1-mux { |
| groups = "bmcuart1"; |
| function = "bmcuart1"; |
| }; |
| uart2_pins: uart2-mux { |
| groups = "uart2"; |
| function = "uart2"; |
| }; |
| bmcuart0b_pins: bmcuart0b-mux { |
| groups = "bmcuart0b"; |
| function = "bmcuart0b"; |
| }; |
| r1err_pins: r1err-mux { |
| groups = "r1err"; |
| function = "r1err"; |
| }; |
| r1md_pins: r1md-mux { |
| groups = "r1md"; |
| function = "r1md"; |
| }; |
| r1oen_pins: r1oen-mux { |
| groups = "r1oen"; |
| function = "r1oen"; |
| }; |
| r2oen_pins: r2oen-mux { |
| groups = "r2oen"; |
| function = "r2oen"; |
| }; |
| rmii3_pins: rmii3-mux { |
| groups = "rmii3"; |
| function = "rmii3"; |
| }; |
| r3oen_pins: r3oen-mux { |
| groups = "r3oen"; |
| function = "r3oen"; |
| }; |
| smb3d_pins: smb3d-mux { |
| groups = "smb3d"; |
| function = "smb3d"; |
| }; |
| fanin0_pins: fanin0-mux { |
| groups = "fanin0"; |
| function = "fanin0"; |
| }; |
| fanin1_pins: fanin1-mux { |
| groups = "fanin1"; |
| function = "fanin1"; |
| }; |
| fanin2_pins: fanin2-mux { |
| groups = "fanin2"; |
| function = "fanin2"; |
| }; |
| fanin3_pins: fanin3-mux { |
| groups = "fanin3"; |
| function = "fanin3"; |
| }; |
| fanin4_pins: fanin4-mux { |
| groups = "fanin4"; |
| function = "fanin4"; |
| }; |
| fanin5_pins: fanin5-mux { |
| groups = "fanin5"; |
| function = "fanin5"; |
| }; |
| fanin6_pins: fanin6-mux { |
| groups = "fanin6"; |
| function = "fanin6"; |
| }; |
| fanin7_pins: fanin7-mux { |
| groups = "fanin7"; |
| function = "fanin7"; |
| }; |
| fanin8_pins: fanin8-mux { |
| groups = "fanin8"; |
| function = "fanin8"; |
| }; |
| fanin9_pins: fanin9-mux { |
| groups = "fanin9"; |
| function = "fanin9"; |
| }; |
| fanin10_pins: fanin10-mux { |
| groups = "fanin10"; |
| function = "fanin10"; |
| }; |
| fanin11_pins: fanin11-mux { |
| groups = "fanin11"; |
| function = "fanin11"; |
| }; |
| fanin12_pins: fanin12-mux { |
| groups = "fanin12"; |
| function = "fanin12"; |
| }; |
| fanin13_pins: fanin13-mux { |
| groups = "fanin13"; |
| function = "fanin13"; |
| }; |
| fanin14_pins: fanin14-mux { |
| groups = "fanin14"; |
| function = "fanin14"; |
| }; |
| fanin15_pins: fanin15-mux { |
| groups = "fanin15"; |
| function = "fanin15"; |
| }; |
| pwm0_pins: pwm0-mux { |
| groups = "pwm0"; |
| function = "pwm0"; |
| }; |
| pwm1_pins: pwm1-mux { |
| groups = "pwm1"; |
| function = "pwm1"; |
| }; |
| pwm2_pins: pwm2-mux { |
| groups = "pwm2"; |
| function = "pwm2"; |
| }; |
| pwm3_pins: pwm3-mux { |
| groups = "pwm3"; |
| function = "pwm3"; |
| }; |
| r2_pins: r2-mux { |
| groups = "r2"; |
| function = "r2"; |
| }; |
| r2err_pins: r2err-mux { |
| groups = "r2err"; |
| function = "r2err"; |
| }; |
| r2md_pins: r2md-mux { |
| groups = "r2md"; |
| function = "r2md"; |
| }; |
| r3rxer_pins: r3rxer-mux { |
| groups = "r3rxer"; |
| function = "r3rxer"; |
| }; |
| ga20kbc_pins: ga20kbc-mux { |
| groups = "ga20kbc"; |
| function = "ga20kbc"; |
| }; |
| smb5d_pins: smb5d-mux { |
| groups = "smb5d"; |
| function = "smb5d"; |
| }; |
| lpc_pins: lpc-mux { |
| groups = "lpc"; |
| function = "lpc"; |
| }; |
| espi_pins: espi-mux { |
| groups = "espi"; |
| function = "espi"; |
| }; |
| sg1mdio_pins: sg1mdio-mux { |
| groups = "sg1mdio"; |
| function = "sg1mdio"; |
| }; |
| rg2_pins: rg2-mux { |
| groups = "rg2"; |
| function = "rg2"; |
| }; |
| ddr_pins: ddr-mux { |
| groups = "ddr"; |
| function = "ddr"; |
| }; |
| i3c0_pins: i3c0-mux { |
| groups = "i3c0"; |
| function = "i3c0"; |
| }; |
| i3c1_pins: i3c1-mux { |
| groups = "i3c1"; |
| function = "i3c1"; |
| }; |
| i3c2_pins: i3c2-mux { |
| groups = "i3c2"; |
| function = "i3c2"; |
| }; |
| i3c3_pins: i3c3-mux { |
| groups = "i3c3"; |
| function = "i3c3"; |
| }; |
| i3c4_pins: i3c4-mux { |
| groups = "i3c4"; |
| function = "i3c4"; |
| }; |
| i3c5_pins: i3c5-mux { |
| groups = "i3c5"; |
| function = "i3c5"; |
| }; |
| smb0_pins: smb0-mux { |
| groups = "smb0"; |
| function = "smb0"; |
| }; |
| smb1_pins: smb1-mux { |
| groups = "smb1"; |
| function = "smb1"; |
| }; |
| smb2_pins: smb2-mux { |
| groups = "smb2"; |
| function = "smb2"; |
| }; |
| smb2c_pins: smb2c-mux { |
| groups = "smb2c"; |
| function = "smb2c"; |
| }; |
| smb2b_pins: smb2b-mux { |
| groups = "smb2b"; |
| function = "smb2b"; |
| }; |
| smb1c_pins: smb1c-mux { |
| groups = "smb1c"; |
| function = "smb1c"; |
| }; |
| smb1b_pins: smb1b-mux { |
| groups = "smb1b"; |
| function = "smb1b"; |
| }; |
| smb8_pins: smb8-mux { |
| groups = "smb8"; |
| function = "smb8"; |
| }; |
| smb9_pins: smb9-mux { |
| groups = "smb9"; |
| function = "smb9"; |
| }; |
| smb10_pins: smb10-mux { |
| groups = "smb10"; |
| function = "smb10"; |
| }; |
| smb11_pins: smb11-mux { |
| groups = "smb11"; |
| function = "smb11"; |
| }; |
| sd1_pins: sd1-mux { |
| groups = "sd1"; |
| function = "sd1"; |
| }; |
| sd1pwr_pins: sd1pwr-mux { |
| groups = "sd1pwr"; |
| function = "sd1pwr"; |
| }; |
| pwm4_pins: pwm4-mux { |
| groups = "pwm4"; |
| function = "pwm4"; |
| }; |
| pwm5_pins: pwm5-mux { |
| groups = "pwm5"; |
| function = "pwm5"; |
| }; |
| pwm6_pins: pwm6-mux { |
| groups = "pwm6"; |
| function = "pwm6"; |
| }; |
| pwm7_pins: pwm7-mux { |
| groups = "pwm7"; |
| function = "pwm7"; |
| }; |
| pwm8_pins: pwm8-mux { |
| groups = "pwm8"; |
| function = "pwm8"; |
| }; |
| pwm9_pins: pwm9-mux { |
| groups = "pwm9"; |
| function = "pwm9"; |
| }; |
| pwm10_pins: pwm10-mux { |
| groups = "pwm10"; |
| function = "pwm10"; |
| }; |
| pwm11_pins: pwm11-mux { |
| groups = "pwm11"; |
| function = "pwm11"; |
| }; |
| mmc8_pins: mmc8-mux { |
| groups = "mmc8"; |
| function = "mmc8"; |
| }; |
| mmc_pins: mmc-mux { |
| groups = "mmc"; |
| function = "mmc"; |
| }; |
| mmcwp_pins: mmcwp-mux { |
| groups = "mmcwp"; |
| function = "mmcwp"; |
| }; |
| mmccd_pins: mmccd-mux { |
| groups = "mmccd"; |
| function = "mmccd"; |
| }; |
| mmcrst_pins: mmcrst-mux { |
| groups = "mmcrst"; |
| function = "mmcrst"; |
| }; |
| clkout_pins: clkout-mux { |
| groups = "clkout"; |
| function = "clkout"; |
| }; |
| serirq_pins: serirq-mux { |
| groups = "serirq"; |
| function = "serirq"; |
| }; |
| scipme_pins: scipme-mux { |
| groups = "scipme"; |
| function = "scipme"; |
| }; |
| smb6_pins: smb6-mux { |
| groups = "smb6"; |
| function = "smb6"; |
| }; |
| smb6b_pins: smb6b-mux { |
| groups = "smb6b"; |
| function = "smb6b"; |
| }; |
| smb6c_pins: smb6c-mux { |
| groups = "smb6c"; |
| function = "smb6c"; |
| }; |
| smb6d_pins: smb6d-mux { |
| groups = "smb6d"; |
| function = "smb6d"; |
| }; |
| smb7_pins: smb7-mux { |
| groups = "smb7"; |
| function = "smb7"; |
| }; |
| smb7b_pins: smb7b-mux { |
| groups = "smb7b"; |
| function = "smb7b"; |
| }; |
| smb7c_pins: smb7c-mux { |
| groups = "smb7c"; |
| function = "smb7c"; |
| }; |
| smb7d_pins: smb7d-mux { |
| groups = "smb7d"; |
| function = "smb7d"; |
| }; |
| spi1_pins: spi1-mux { |
| groups = "spi1"; |
| function = "spi1"; |
| }; |
| faninx_pins: faninx-mux { |
| groups = "faninx"; |
| function = "faninx"; |
| }; |
| r1_pins: r1-mux { |
| groups = "r1"; |
| function = "r1"; |
| }; |
| spi3_pins: spi3-mux { |
| groups = "spi3"; |
| function = "spi3"; |
| }; |
| spi3cs1_pins: spi3cs1-mux { |
| groups = "spi3cs1"; |
| function = "spi3cs1"; |
| }; |
| spi3quad_pins: spi3quad-mux { |
| groups = "spi3quad"; |
| function = "spi3quad"; |
| }; |
| spi3cs2_pins: spi3cs2-mux { |
| groups = "spi3cs2"; |
| function = "spi3cs2"; |
| }; |
| spi3cs3_pins: spi3cs3-mux { |
| groups = "spi3cs3"; |
| function = "spi3cs3"; |
| }; |
| nprd_smi_pins: nprd-smi-mux { |
| groups = "nprd_smi"; |
| function = "nprd_smi"; |
| }; |
| smi_pins: smi-mux { |
| groups = "smi"; |
| function = "smi"; |
| }; |
| smb0b_pins: smb0b-mux { |
| groups = "smb0b"; |
| function = "smb0b"; |
| }; |
| smb0c_pins: smb0c-mux { |
| groups = "smb0c"; |
| function = "smb0c"; |
| }; |
| smb0den_pins: smb0den-mux { |
| groups = "smb0den"; |
| function = "smb0den"; |
| }; |
| smb0d_pins: smb0d-mux { |
| groups = "smb0d"; |
| function = "smb0d"; |
| }; |
| ddc_pins: ddc-mux { |
| groups = "ddc"; |
| function = "ddc"; |
| }; |
| rg2mdio_pins: rg2mdio-mux { |
| groups = "rg2mdio"; |
| function = "rg2mdio"; |
| }; |
| wdog1_pins: wdog1-mux { |
| groups = "wdog1"; |
| function = "wdog1"; |
| }; |
| wdog2_pins: wdog2-mux { |
| groups = "wdog2"; |
| function = "wdog2"; |
| }; |
| smb12_pins: smb12-mux { |
| groups = "smb12"; |
| function = "smb12"; |
| }; |
| smb13_pins: smb13-mux { |
| groups = "smb13"; |
| function = "smb13"; |
| }; |
| spix_pins: spix-mux { |
| groups = "spix"; |
| function = "spix"; |
| }; |
| spixcs1_pins: spixcs1-mux { |
| groups = "spixcs1"; |
| function = "spixcs1"; |
| }; |
| clkreq_pins: clkreq-mux { |
| groups = "clkreq"; |
| function = "clkreq"; |
| }; |
| hgpio0_pins: hgpio0-mux { |
| groups = "hgpio0"; |
| function = "hgpio0"; |
| }; |
| hgpio1_pins: hgpio1-mux { |
| groups = "hgpio1"; |
| function = "hgpio1"; |
| }; |
| hgpio2_pins: hgpio2-mux { |
| groups = "hgpio2"; |
| function = "hgpio2"; |
| }; |
| hgpio3_pins: hgpio3-mux { |
| groups = "hgpio3"; |
| function = "hgpio3"; |
| }; |
| hgpio4_pins: hgpio4-mux { |
| groups = "hgpio4"; |
| function = "hgpio4"; |
| }; |
| hgpio5_pins: hgpio5-mux { |
| groups = "hgpio5"; |
| function = "hgpio5"; |
| }; |
| hgpio6_pins: hgpio6-mux { |
| groups = "hgpio6"; |
| function = "hgpio6"; |
| }; |
| hgpio7_pins: hgpio7-mux { |
| groups = "hgpio7"; |
| function = "hgpio7"; |
| }; |
| bu4_pins: bu4-mux { |
| groups = "bu4"; |
| function = "bu4"; |
| }; |
| bu4b_pins: bu4b-mux { |
| groups = "bu4b"; |
| function = "bu4b"; |
| }; |
| bu5_pins: bu5-mux { |
| groups = "bu5"; |
| function = "bu5"; |
| }; |
| bu5b_pins: bu5b-mux { |
| groups = "bu5b"; |
| function = "bu5b"; |
| }; |
| bu6_pins: bu6-mux { |
| groups = "bu6"; |
| function = "bu6"; |
| }; |
| gpo187_pins: gpo187-mux { |
| groups = "gpo187"; |
| function = "gpo187"; |
| }; |
| }; |
| }; |
