blob: 0c43d082b4ffa7dd0efbcaa7baf67f4e1c509c5a [file] [log] [blame]
From 6485af913350deb88ae903d416360225d231c04c Mon Sep 17 00:00:00 2001
From: Billy Tsai <billy_tsai@aspeedtech.com>
Date: Mon, 21 Apr 2025 15:51:54 +0800
Subject: [PATCH 8/9] i3c: mipi-i3c-hci: aspeed: Modify the tCAS and tCBP
Using push-pull high count as both tCAS and tCBP instead of the fixed
40ns.
Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
Change-Id: I1915e1a14124a716b4f419aec879769a7bb0d50a
---
drivers/i3c/master/mipi-i3c-hci/core.c | 7 +++----
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/i3c/master/mipi-i3c-hci/core.c b/drivers/i3c/master/mipi-i3c-hci/core.c
index 26795db6efed..19df976ea267 100644
--- a/drivers/i3c/master/mipi-i3c-hci/core.c
+++ b/drivers/i3c/master/mipi-i3c-hci/core.c
@@ -246,6 +246,9 @@ static void aspeed_i3c_of_populate_bus_timing(struct i3c_hci *hci, struct device
ast_phy_write(PHY_I3C_SDR0_CTRL1, ctrl1);
ast_phy_write(PHY_I3C_DDR_CTRL1, ctrl1);
+ /* The push-pull high count is used as both tCAS and tCBP. */
+ ast_phy_write(PHY_I3C_OD_CTRL0, FIELD_PREP(PHY_I3C_OD_CTRL0_CAS, hcnt) |
+ FIELD_PREP(PHY_I3C_OD_CTRL0_CBP, hcnt));
/*
* The SR_P hold time uses the default value, and the SR_P low count is
* the same as the push-pull low count.
@@ -283,10 +286,6 @@ static void aspeed_i3c_of_populate_bus_timing(struct i3c_hci *hci, struct device
ast_phy_write(PHY_I3C_OD_CTRL3, FIELD_PREP(PHY_I3C_OD_CTRL3_HD_DAT, hcnt) |
FIELD_PREP(PHY_I3C_OD_CTRL3_AHD_DAT, lcnt));
- hcnt = DIV_ROUND_CLOSEST(PHY_I3C_OD_DEFAULT_CAS_NS, core_period) - 1;
- lcnt = DIV_ROUND_CLOSEST(PHY_I3C_OD_DEFAULT_CBP_NS, core_period) - 1;
- ast_phy_write(PHY_I3C_OD_CTRL0, FIELD_PREP(PHY_I3C_OD_CTRL0_CAS, hcnt) |
- FIELD_PREP(PHY_I3C_OD_CTRL0_CBP, lcnt));
if (internal_pu)
ast_phy_write(PHY_SW_FORCE_CTRL,
PHY_SW_FORCE_CTRL_SCL_PU_EN | PHY_SW_FORCE_CTRL_SDA_PU_EN |
--
2.49.0.906.g1f30a19c02-goog