recipes-kernel/linux/files/0027-Add-setting-SGPIO-default-value.patch

From 264e67f064c60ebf6ec5b965f1798f048941a653 Mon Sep 17 00:00:00 2001
From: "yung-sheng.huang" <yung-sheng.huang@fii-na.corp-partner.google.com>
Date: Wed, 16 Apr 2025 14:33:30 +0800
Subject: [PATCH] Add setting SGPIO default value

This patch enable SGPIO init value from DTS

Signed-off-by: yung-sheng.huang <yung-sheng.huang@fii-na.corp-partner.google.com>
---
 drivers/gpio/gpio-aspeed-sgpio.c | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/drivers/gpio/gpio-aspeed-sgpio.c b/drivers/gpio/gpio-aspeed-sgpio.c
index 450d6eb87..ce3cdf387 100644
--- a/drivers/gpio/gpio-aspeed-sgpio.c
+++ b/drivers/gpio/gpio-aspeed-sgpio.c
@@ -855,6 +855,8 @@ static int aspeed_sgpio_probe(struct platform_device *pdev)
 	unsigned long apb_freq;
 	void __iomem *addr;
 	int rc, i;
+	u32 initial_val;
+	int has_default = 1;
 
 	gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL);
 	if (!gpio)
@@ -883,11 +885,29 @@ static int aspeed_sgpio_probe(struct platform_device *pdev)
 		return -EINVAL;
 	}
 
+	u32 Byte_configs[nr_gpios / 8];
+	for (i = 0; i < nr_gpios / 8; i++) {
+		char prop_name[16];
+		snprintf(prop_name, sizeof(prop_name), "Byte%d_default", i);
+		rc = device_property_read_u32(&pdev->dev, prop_name, &Byte_configs[i]);
+		if (rc < 0) {
+			has_default = 0;
+			break;
+	   }
+	}
+
 	if (gpio->version == 7 && !gpio->pdata->slave)
 		for (i = 0; i < nr_gpios; i++) {
 			addr = gpio->base + SGPIO_G7_CTRL_REG_OFFSET(i);
 			ast_write_bits(addr, SGPIO_G7_SERIAL_OUT_SEL,
 				       SELECT_FROM_CSR);
+
+			if (has_default) {
+				int byte_index = i / 8;
+				int bit_index = i % 8;
+				initial_val = (Byte_configs[byte_index] >> bit_index) & 1;
+				ast_write_bits(addr, SGPIO_G7_OUT_DATA, initial_val);
+			}
 		}
 
 	if (!gpio->pdata->slave) {
-- 
2.34.1