| From 96acc00b2f8cea3a4b69856b2466d0ef3aff52f8 Mon Sep 17 00:00:00 2001 | |
| From: David Wang <davidwang@quantatw.com> | |
| Date: Mon, 6 Nov 2023 10:57:10 +0800 | |
| Subject: [PATCH 08/16] drivers: spi: sync npcm spi | |
| --- | |
| drivers/spi/spi-npcm-fiu.c | 38 ++++++++++++++++++++++++++++++------- | |
| drivers/spi/spi-npcm-pspi.c | 1 + | |
| 2 files changed, 32 insertions(+), 7 deletions(-) | |
| diff --git a/drivers/spi/spi-npcm-fiu.c b/drivers/spi/spi-npcm-fiu.c | |
| index 40279fa144ce..d925c7519353 100644 | |
| --- a/drivers/spi/spi-npcm-fiu.c | |
| +++ b/drivers/spi/spi-npcm-fiu.c | |
| @@ -36,6 +36,7 @@ | |
| #define NPCM_FIU_UMA_DR1 0x34 | |
| #define NPCM_FIU_UMA_DR2 0x38 | |
| #define NPCM_FIU_UMA_DR3 0x3C | |
| +#define NPCM_FIU_CFG 0x78 | |
| #define NPCM_FIU_MAX_REG_LIMIT 0x80 | |
| /* FIU Direct Read Configuration Register */ | |
| @@ -151,6 +152,9 @@ | |
| #define NPCM_FIU_UMA_DR3_RB13 GENMASK(15, 8) | |
| #define NPCM_FIU_UMA_DR3_RB12 GENMASK(7, 0) | |
| +/* FIU Configuration Register */ | |
| +#define NPCM_FIU_CFG_FIU_FIX BIT(31) | |
| + | |
| /* FIU Read Mode */ | |
| enum { | |
| DRD_SINGLE_WIRE_MODE = 0, | |
| @@ -187,6 +191,7 @@ enum { | |
| FIU0 = 0, | |
| FIU3, | |
| FIUX, | |
| + FIU1, | |
| }; | |
| struct npcm_fiu_info { | |
| @@ -201,7 +206,7 @@ struct fiu_data { | |
| int fiu_max; | |
| }; | |
| -static const struct npcm_fiu_info npxm7xx_fiu_info[] = { | |
| +static const struct npcm_fiu_info npcm7xx_fiu_info[] = { | |
| {.name = "FIU0", .fiu_id = FIU0, | |
| .max_map_size = MAP_SIZE_128MB, .max_cs = 2}, | |
| {.name = "FIU3", .fiu_id = FIU3, | |
| @@ -209,11 +214,26 @@ static const struct npcm_fiu_info npxm7xx_fiu_info[] = { | |
| {.name = "FIUX", .fiu_id = FIUX, | |
| .max_map_size = MAP_SIZE_16MB, .max_cs = 2} }; | |
| -static const struct fiu_data npxm7xx_fiu_data = { | |
| - .npcm_fiu_data_info = npxm7xx_fiu_info, | |
| +static const struct fiu_data npcm7xx_fiu_data = { | |
| + .npcm_fiu_data_info = npcm7xx_fiu_info, | |
| .fiu_max = 3, | |
| }; | |
| +static const struct npcm_fiu_info npxm8xx_fiu_info[] = { | |
| + {.name = "FIU0", .fiu_id = FIU0, | |
| + .max_map_size = MAP_SIZE_128MB, .max_cs = 2}, | |
| + {.name = "FIU3", .fiu_id = FIU3, | |
| + .max_map_size = MAP_SIZE_128MB, .max_cs = 4}, | |
| + {.name = "FIUX", .fiu_id = FIUX, | |
| + .max_map_size = MAP_SIZE_16MB, .max_cs = 2}, | |
| + {.name = "FIU1", .fiu_id = FIU1, | |
| + .max_map_size = MAP_SIZE_16MB, .max_cs = 4} }; | |
| + | |
| +static const struct fiu_data npxm8xx_fiu_data = { | |
| + .npcm_fiu_data_info = npxm8xx_fiu_info, | |
| + .fiu_max = 4, | |
| +}; | |
| + | |
| struct npcm_fiu_spi; | |
| struct npcm_fiu_chip { | |
| @@ -252,8 +272,7 @@ static void npcm_fiu_set_drd(struct npcm_fiu_spi *fiu, | |
| fiu->drd_op.addr.buswidth = op->addr.buswidth; | |
| regmap_update_bits(fiu->regmap, NPCM_FIU_DRD_CFG, | |
| NPCM_FIU_DRD_CFG_DBW, | |
| - ((op->dummy.nbytes * ilog2(op->addr.buswidth)) / BITS_PER_BYTE) | |
| - << NPCM_FIU_DRD_DBW_SHIFT); | |
| + op->dummy.nbytes << NPCM_FIU_DRD_DBW_SHIFT); | |
| fiu->drd_op.dummy.nbytes = op->dummy.nbytes; | |
| regmap_update_bits(fiu->regmap, NPCM_FIU_DRD_CFG, | |
| NPCM_FIU_DRD_CFG_RDCMD, op->cmd.opcode); | |
| @@ -515,7 +534,7 @@ static void npcm_fiux_set_direct_wr(struct npcm_fiu_spi *fiu) | |
| static void npcm_fiux_set_direct_rd(struct npcm_fiu_spi *fiu) | |
| { | |
| - u32 rx_dummy = 0; | |
| + u32 rx_dummy = 2; | |
| regmap_write(fiu->regmap, NPCM_FIU_DRD_CFG, | |
| NPCM_FIU_DRD_16_BYTE_BURST); | |
| @@ -630,6 +649,10 @@ static int npcm_fiu_dirmap_create(struct spi_mem_dirmap_desc *desc) | |
| regmap_update_bits(gcr_regmap, NPCM7XX_INTCR3_OFFSET, | |
| NPCM7XX_INTCR3_FIU_FIX, | |
| NPCM7XX_INTCR3_FIU_FIX); | |
| + } else { | |
| + regmap_update_bits(fiu->regmap, NPCM_FIU_CFG, | |
| + NPCM_FIU_CFG_FIU_FIX, | |
| + NPCM_FIU_CFG_FIU_FIX); | |
| } | |
| if (desc->info.op_tmpl.data.dir == SPI_MEM_DATA_IN) { | |
| @@ -669,7 +692,8 @@ static const struct spi_controller_mem_ops npcm_fiu_mem_ops = { | |
| }; | |
| static const struct of_device_id npcm_fiu_dt_ids[] = { | |
| - { .compatible = "nuvoton,npcm750-fiu", .data = &npxm7xx_fiu_data }, | |
| + { .compatible = "nuvoton,npcm750-fiu", .data = &npcm7xx_fiu_data }, | |
| + { .compatible = "nuvoton,npcm845-fiu", .data = &npxm8xx_fiu_data }, | |
| { /* sentinel */ } | |
| }; | |
| diff --git a/drivers/spi/spi-npcm-pspi.c b/drivers/spi/spi-npcm-pspi.c | |
| index 02f0fcceaf19..6de9bb566cac 100644 | |
| --- a/drivers/spi/spi-npcm-pspi.c | |
| +++ b/drivers/spi/spi-npcm-pspi.c | |
| @@ -428,6 +428,7 @@ static int npcm_pspi_remove(struct platform_device *pdev) | |
| static const struct of_device_id npcm_pspi_match[] = { | |
| { .compatible = "nuvoton,npcm750-pspi", .data = NULL }, | |
| + { .compatible = "nuvoton,npcm845-pspi", .data = NULL }, | |
| {} | |
| }; | |
| MODULE_DEVICE_TABLE(of, npcm_pspi_match); | |
| -- | |
| 2.25.1 | |