recipes-kernel/linux/files/0002-arm-dts-aspeed-Change-eMMC-device-compatible.patch

From 0a76107f690d7172b9cfe6567bb4f8efc47ffc59 Mon Sep 17 00:00:00 2001
From: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
Date: Sun, 16 Jan 2022 15:29:53 +0800
Subject: [PATCH 2/4] arm: dts: aspeed: Change eMMC device compatible

Since the eMMC device's delay parameters are different from
the SD's, a new compatible should be used to distinguish
between eMMC and SD device.

Patch Tracking Bug: b/278581875
Upstream info: Aspeed will submit this upstream. Currently, the commit
can be found here: https://github.com/AspeedTech-BMC/linux/commit/c4c3998abaef9ab5e73acf28876161ff2e94004f
Upstream-Status: Pending
Justification: Aspeed will submit this change upstream
Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
Change-Id: Ie1291a04bfa28c7a6b7bba2ef4b6cdd6a56bb1cb
---
 arch/arm/boot/dts/aspeed-g6.dtsi   |  2 +-
 drivers/mmc/host/sdhci-of-aspeed.c | 38 ++++++++++++++++++++++++++++++
 2 files changed, 39 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
index 8c0de3f27883..e18954361761 100644
--- a/arch/arm/boot/dts/aspeed-g6.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6.dtsi
@@ -664,7 +664,7 @@ sdhci1: sdhci@1e740200 {
 			};
 
 			emmc_controller: sdc@1e750000 {
-				compatible = "aspeed,ast2600-sd-controller";
+				compatible = "aspeed,ast2600-emmc";
 				reg = <0x1e750000 0x100>;
 				#address-cells = <1>;
 				#size-cells = <1>;
diff --git a/drivers/mmc/host/sdhci-of-aspeed.c b/drivers/mmc/host/sdhci-of-aspeed.c
index ed3ce43f175b..9f3bd8f407ac 100644
--- a/drivers/mmc/host/sdhci-of-aspeed.c
+++ b/drivers/mmc/host/sdhci-of-aspeed.c
@@ -62,6 +62,8 @@ struct aspeed_sdhci_tap_desc {
 struct aspeed_sdhci_phase_desc {
 	struct aspeed_sdhci_tap_desc in;
 	struct aspeed_sdhci_tap_desc out;
+	bool non_uniform_delay;
+	u32 nr_taps;
 };
 
 struct aspeed_sdhci_pdata {
@@ -492,6 +494,8 @@ static const struct aspeed_sdhci_phase_desc ast2600_sdhci_phase[] = {
 			.enable_mask = ASPEED_SDC_S0_PHASE_OUT_EN,
 			.enable_value = 3,
 		},
+		.non_uniform_delay = false,
+		.nr_taps = 15,
 	},
 	/* SDHCI/Slot 1 */
 	[1] = {
@@ -505,6 +509,33 @@ static const struct aspeed_sdhci_phase_desc ast2600_sdhci_phase[] = {
 			.enable_mask = ASPEED_SDC_S1_PHASE_OUT_EN,
 			.enable_value = 3,
 		},
+		.non_uniform_delay = false,
+		.nr_taps = 15,
+	},
+};
+
+static const struct aspeed_sdhci_phase_desc ast2600_emmc_phase[] = {
+	/* eMMC slot 0 */
+	[0] = {
+		.in = {
+			.tap_mask = ASPEED_SDC_S0_PHASE_IN,
+			.enable_mask = ASPEED_SDC_S0_PHASE_IN_EN,
+			.enable_value = 1,
+		},
+		.out = {
+			.tap_mask = ASPEED_SDC_S0_PHASE_OUT,
+			.enable_mask = ASPEED_SDC_S0_PHASE_OUT_EN,
+			.enable_value = 3,
+		},
+
+		/*
+		 * There are 15 taps recorded in AST2600 datasheet.
+		 * But, actually, the time period of the first tap
+		 * is two times of others. Thus, 16 tap is used to
+		 * emulate this situation.
+		 */
+		.non_uniform_delay = true,
+		.nr_taps = 16,
 	},
 };
 
@@ -514,10 +545,17 @@ static const struct aspeed_sdhci_pdata ast2600_sdhci_pdata = {
 	.nr_phase_descs = ARRAY_SIZE(ast2600_sdhci_phase),
 };
 
+static const struct aspeed_sdhci_pdata ast2600_emmc_pdata = {
+	.clk_div_start = 1,
+	.phase_desc = ast2600_emmc_phase,
+	.nr_phase_descs = ARRAY_SIZE(ast2600_emmc_phase),
+};
+
 static const struct of_device_id aspeed_sdhci_of_match[] = {
 	{ .compatible = "aspeed,ast2400-sdhci", .data = &ast2400_sdhci_pdata, },
 	{ .compatible = "aspeed,ast2500-sdhci", .data = &ast2400_sdhci_pdata, },
 	{ .compatible = "aspeed,ast2600-sdhci", .data = &ast2600_sdhci_pdata, },
+	{ .compatible = "aspeed,ast2600-emmc", .data = &ast2600_emmc_pdata, },
 	{ }
 };
 
-- 
2.40.0.634.g4ca3ef3211-goog