kernel: update 3 byte read patch
The initial file is out of date.
Signed-off-by: Nan Zhou <nanzhou@google.com>
Change-Id: I3c7d81feeda4951fce16c68b962cade99103fbbb
diff --git a/recipes-kernel/linux/files/0002-kernel-Ensure-only-3-byte-read-command-can-be-sent.patch b/recipes-kernel/linux/files/0002-kernel-Ensure-only-3-byte-read-command-can-be-sent.patch
index b4cdac9..f51fd1e 100644
--- a/recipes-kernel/linux/files/0002-kernel-Ensure-only-3-byte-read-command-can-be-sent.patch
+++ b/recipes-kernel/linux/files/0002-kernel-Ensure-only-3-byte-read-command-can-be-sent.patch
@@ -15,34 +15,36 @@
Signed-off-by: Tom Tung <tomtung@google.com>
---
- drivers/mtd/spi-nor/controllers/aspeed-smc.c | 7 +++++--
- 1 file changed, 5 insertions(+), 2 deletions(-)
+ drivers/spi/spi-aspeed-smc.c | 11 +++++++----
+ 1 file changed, 7 insertions(+), 4 deletions(-)
+diff --git a/drivers/spi/spi-aspeed-smc.c b/drivers/spi/spi-aspeed-smc.c
+index 496f3e1e9079..925578192a78 100644
+--- a/drivers/spi/spi-aspeed-smc.c
++++ b/drivers/spi/spi-aspeed-smc.c
+@@ -319,7 +319,7 @@ static int do_aspeed_spi_exec_op(struct spi_mem *mem, const struct spi_mem_op *o
+ /* 4BYTE address mode */
+ if (op->addr.nbytes) {
+ if (op->addr.nbytes == 4)
+- addr_mode |= (0x11 << chip->cs);
++ addr_mode |= (0x01 << chip->cs);
+ else
+ addr_mode &= ~(0x11 << chip->cs);
-diff --git a/drivers/mtd/spi-nor/controllers/aspeed-smc.c b/drivers/mtd/spi-nor/controllers/aspeed-smc.c
-index c421fad4b3f5..e62868d4ddce 100644
---- a/drivers/mtd/spi-nor/controllers/aspeed-smc.c
-+++ b/drivers/mtd/spi-nor/controllers/aspeed-smc.c
-@@ -853,6 +853,9 @@ static void aspeed_smc_chip_set_4b(struct aspeed_smc_chip *chip)
- u32 reg;
-
- reg = readl(controller->regs + CE_CONTROL_REG);
-+ // Ensure the 4th bit of FMC04 is set to zero so that 3 byte read
-+ // command will be sent.
-+ reg &= 0xffffffef;
- reg |= 1 << chip->cs;
- writel(reg, controller->regs + CE_CONTROL_REG);
- }
-@@ -1032,8 +1035,8 @@ static u32 aspeed_smc_default_read(struct aspeed_smc_chip *chip)
- */
- u32 ctl_mask = chip->controller->info == &spi_2400_info ?
- CONTROL_IO_ADDRESS_4B : 0;
-- u8 cmd = chip->nor.addr_width == 4 ? SPINOR_OP_READ_4B :
-- SPINOR_OP_READ;
-+ // Ensure sending out 3 byte read command.
-+ u8 cmd = SPINOR_OP_READ;
-
- /*
- * Use the "read command" mode to customize the opcode. In
---
-2.35.0.263.gb82422642f-goog
+@@ -581,9 +581,12 @@ static int aspeed_spi_dirmap_create(struct spi_mem_dirmap_desc *desc)
+ if (op->addr.nbytes) {
+ u32 addr_mode = readl(aspi->regs + CE_CTRL_REG);
+- if (op->addr.nbytes == 4)
+- addr_mode |= (0x11 << chip->cs);
+- else
++ if (op->addr.nbytes == 4) {
++ // Ensure the 4th bit of FMC04 is set to zero so that
++ // 3 byte read command will be sent.
++ addr_mode &= ~0x10;
++ addr_mode |= (0x01 << chip->cs);
++ } else
+ addr_mode &= ~(0x11 << chip->cs);
+ writel(addr_mode, aspi->regs + CE_CTRL_REG);
+
+--
+2.36.0.512.ge40c2bad7a-goog
