kernel: SRCREV bump 15e3ed4..dd52df9

Billy Tsai (2):
    arm64: dts: aspeed: reserve per-instance DMA pools for i3c HCI
    i3c: mipi-i3c-hci: bind DMA rings to the reserved-memory pool

Jake Chiang (2):
    arm64: dts: aspeed: adjust I3C HCI reserved memory layout
    i3c: mipi-i3c-hci: dma: allocate IBI data before IBI status

Tested: Built

Google-Bug-Id: 542414147
Change-Id: I75eebddeac6d30c6e242a85ab83d5869c76f1da0
Signed-off-by: Jake Chiang <hung-tse.chiang@fii-na.corp-partner.google.com>

recipes-kernel/linux/linux-gbmc_aspeedg7.bb

diff --git a/recipes-kernel/linux/linux-gbmc_aspeedg7.bb b/recipes-kernel/linux/linux-gbmc_aspeedg7.bb
index cc1f771..31c691b 100644
--- a/recipes-kernel/linux/linux-gbmc_aspeedg7.bb
+++ b/recipes-kernel/linux/linux-gbmc_aspeedg7.bb
@@ -8,7 +8,7 @@
 LIC_FILES_CHKSUM = "file://COPYING;md5=6bc538ed5bd9a7fc9398086aedcd7e46"
 
 SRC_URI:prepend = "git://gbmc.googlesource.com/linux;protocol=https;branch=${KBRANCH}"
-SRCREV = "15e3ed4c88b72f3042f1a5a4ec2214bef1d20a59"
+SRCREV = "dd52df9f7a7b66673b99e3840d2d02b6026ab851"
 
 SRC_URI:append:aspeed-g7 = " \
   file://aspeed-g7-gbmc.cfg \