| /* SPDX-License-Identifier: GPL-2.0+ */ | |
| /* | |
| * Copyright (C) 2022 | |
| * Author(s): Jesse Taube <Mr.Bossman075@gmail.com> | |
| */ | |
| #ifndef __DT_BINDINGS_CLOCK_IMXRT1170_H | |
| #define __DT_BINDINGS_CLOCK_IMXRT1170_H | |
| #define IMXRT1170_CLK_DUMMY 0 | |
| #define IMXRT1170_CLK_OSC 1 | |
| #define IMXRT1170_CLK_OSC_32K 2 | |
| #define IMXRT1170_CLK_RCOSC_16M 3 | |
| #define IMXRT1170_CLK_RCOSC_48M 4 | |
| #define IMXRT1170_CLK_RCOSC_48M_DIV2 5 | |
| #define IMXRT1170_CLK_RCOSC_400M 6 | |
| #define IMXRT1170_CLK_PLL_ARM 7 | |
| #define IMXRT1170_CLK_PLL_AUDIO 8 | |
| #define IMXRT1170_CLK_PLL_VIDEO 9 | |
| #define IMXRT1170_CLK_PLL1 10 | |
| #define IMXRT1170_CLK_PLL1_DIV2 11 | |
| #define IMXRT1170_CLK_PLL1_DIV5 12 | |
| #define IMXRT1170_CLK_PLL2 13 | |
| #define IMXRT1170_CLK_PLL2_PFD0 14 | |
| #define IMXRT1170_CLK_PLL2_PFD1 15 | |
| #define IMXRT1170_CLK_PLL2_PFD2 16 | |
| #define IMXRT1170_CLK_PLL2_PFD3 17 | |
| #define IMXRT1170_CLK_PLL3 18 | |
| #define IMXRT1170_CLK_PLL3_DIV2 19 | |
| #define IMXRT1170_CLK_PLL3_PFD0 20 | |
| #define IMXRT1170_CLK_PLL3_PFD1 21 | |
| #define IMXRT1170_CLK_PLL3_PFD2 22 | |
| #define IMXRT1170_CLK_PLL3_PFD3 23 | |
| #define IMXRT1170_CLK_M7 24 | |
| #define IMXRT1170_CLK_M4 25 | |
| #define IMXRT1170_CLK_BUS 26 | |
| #define IMXRT1170_CLK_BUS_LPSR 27 | |
| #define IMXRT1170_CLK_LPUART1_SEL 28 | |
| #define IMXRT1170_CLK_LPUART1 29 | |
| #define IMXRT1170_CLK_USDHC1_SEL 30 | |
| #define IMXRT1170_CLK_USDHC1 31 | |
| #define IMXRT1170_CLK_GPT1_SEL 32 | |
| #define IMXRT1170_CLK_GPT1 33 | |
| #define IMXRT1170_CLK_SEMC_SEL 34 | |
| #define IMXRT1170_CLK_SEMC 35 | |
| #define IMXRT1170_CLK_FLEXSPI1_SEL 36 | |
| #define IMXRT1170_CLK_FLEXSPI1 37 | |
| #define IMXRT1170_CLK_END 38 | |
| #endif /* __DT_BINDINGS_CLOCK_IMXRT1170_H */ |