| /dts-v1/; | |
| #include <dt-bindings/input/input.h> | |
| #include "tegra20.dtsi" | |
| / { | |
| model = "NVIDIA Seaboard"; | |
| compatible = "nvidia,seaboard", "nvidia,tegra20"; | |
| aliases { | |
| /* This defines the order of our ports */ | |
| usb0 = "/usb@c5000000"; | |
| usb1 = "/usb@c5004000"; | |
| usb2 = "/usb@c5008000"; | |
| i2c0 = "/i2c@7000d000"; | |
| i2c1 = "/i2c@7000c000"; | |
| i2c2 = "/i2c@7000c400"; | |
| i2c3 = "/i2c@7000c500"; | |
| rtc0 = "/i2c@7000d000/tps6586x@34"; | |
| rtc1 = "/rtc@7000e000"; | |
| serial0 = &uartd; | |
| mmc0 = "/sdhci@c8000600"; | |
| mmc1 = "/sdhci@c8000400"; | |
| }; | |
| chosen { | |
| bootargs = "vmalloc=192M video=tegrafb console=ttyS0,115200n8 root=/dev/mmcblk1p3 rw rootwait"; | |
| }; | |
| chosen { | |
| stdout-path = &uartd; | |
| }; | |
| memory { | |
| reg = <0x00000000 0x40000000>; | |
| }; | |
| host1x@50000000 { | |
| status = "okay"; | |
| dc@54200000 { | |
| status = "okay"; | |
| rgb { | |
| status = "okay"; | |
| nvidia,panel = <&panel>; | |
| display-timings { | |
| timing@0 { | |
| /* Seaboard has 1366x768 */ | |
| clock-frequency = <70600000>; | |
| hactive = <1366>; | |
| vactive = <768>; | |
| hback-porch = <58>; | |
| hfront-porch = <58>; | |
| hsync-len = <58>; | |
| vback-porch = <4>; | |
| vfront-porch = <4>; | |
| vsync-len = <4>; | |
| hsync-active = <1>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| hdmi@54280000 { | |
| status = "okay"; | |
| vdd-supply = <&hdmi_vdd_reg>; | |
| pll-supply = <&hdmi_pll_reg>; | |
| hdmi-supply = <&vdd_hdmi>; | |
| nvidia,ddc-i2c-bus = <&hdmi_ddc>; | |
| nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) | |
| GPIO_ACTIVE_HIGH>; | |
| }; | |
| }; | |
| pinmux@70000014 { | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <&state_default>; | |
| state_default: pinmux { | |
| ata { | |
| nvidia,pins = "ata"; | |
| nvidia,function = "ide"; | |
| }; | |
| atb { | |
| nvidia,pins = "atb", "gma", "gme"; | |
| nvidia,function = "sdio4"; | |
| }; | |
| atc { | |
| nvidia,pins = "atc"; | |
| nvidia,function = "nand"; | |
| }; | |
| atd { | |
| nvidia,pins = "atd", "ate", "gmb", "spia", | |
| "spib", "spic"; | |
| nvidia,function = "gmi"; | |
| }; | |
| cdev1 { | |
| nvidia,pins = "cdev1"; | |
| nvidia,function = "plla_out"; | |
| }; | |
| cdev2 { | |
| nvidia,pins = "cdev2"; | |
| nvidia,function = "pllp_out4"; | |
| }; | |
| crtp { | |
| nvidia,pins = "crtp", "lm1"; | |
| nvidia,function = "crt"; | |
| }; | |
| csus { | |
| nvidia,pins = "csus"; | |
| nvidia,function = "vi_sensor_clk"; | |
| }; | |
| dap1 { | |
| nvidia,pins = "dap1"; | |
| nvidia,function = "dap1"; | |
| }; | |
| dap2 { | |
| nvidia,pins = "dap2"; | |
| nvidia,function = "dap2"; | |
| }; | |
| dap3 { | |
| nvidia,pins = "dap3"; | |
| nvidia,function = "dap3"; | |
| }; | |
| dap4 { | |
| nvidia,pins = "dap4"; | |
| nvidia,function = "dap4"; | |
| }; | |
| dta { | |
| nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte"; | |
| nvidia,function = "vi"; | |
| }; | |
| dtf { | |
| nvidia,pins = "dtf"; | |
| nvidia,function = "i2c3"; | |
| }; | |
| gmc { | |
| nvidia,pins = "gmc"; | |
| nvidia,function = "uartd"; | |
| }; | |
| gmd { | |
| nvidia,pins = "gmd"; | |
| nvidia,function = "sflash"; | |
| }; | |
| gpu { | |
| nvidia,pins = "gpu"; | |
| nvidia,function = "pwm"; | |
| }; | |
| gpu7 { | |
| nvidia,pins = "gpu7"; | |
| nvidia,function = "rtck"; | |
| }; | |
| gpv { | |
| nvidia,pins = "gpv", "slxa", "slxk"; | |
| nvidia,function = "pcie"; | |
| }; | |
| hdint { | |
| nvidia,pins = "hdint", "lpw0", "lpw2", "lsc1", | |
| "lsck", "lsda"; | |
| nvidia,function = "hdmi"; | |
| }; | |
| i2cp { | |
| nvidia,pins = "i2cp"; | |
| nvidia,function = "i2cp"; | |
| }; | |
| irrx { | |
| nvidia,pins = "irrx", "irtx"; | |
| nvidia,function = "uartb"; | |
| }; | |
| kbca { | |
| nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd", | |
| "kbce", "kbcf"; | |
| nvidia,function = "kbc"; | |
| }; | |
| lcsn { | |
| nvidia,pins = "lcsn", "ldc", "lm0", "lpw1", | |
| "lsdi", "lvp0"; | |
| nvidia,function = "rsvd4"; | |
| }; | |
| ld0 { | |
| nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4", | |
| "ld5", "ld6", "ld7", "ld8", "ld9", | |
| "ld10", "ld11", "ld12", "ld13", "ld14", | |
| "ld15", "ld16", "ld17", "ldi", "lhp0", | |
| "lhp1", "lhp2", "lhs", "lpp", "lsc0", | |
| "lspi", "lvp1", "lvs"; | |
| nvidia,function = "displaya"; | |
| }; | |
| owc { | |
| nvidia,pins = "owc", "spdi", "spdo", "uac"; | |
| nvidia,function = "rsvd2"; | |
| }; | |
| pmc { | |
| nvidia,pins = "pmc"; | |
| nvidia,function = "pwr_on"; | |
| }; | |
| rm { | |
| nvidia,pins = "rm"; | |
| nvidia,function = "i2c1"; | |
| }; | |
| sdb { | |
| nvidia,pins = "sdb", "sdc", "sdd"; | |
| nvidia,function = "sdio3"; | |
| }; | |
| sdio1 { | |
| nvidia,pins = "sdio1"; | |
| nvidia,function = "sdio1"; | |
| }; | |
| slxc { | |
| nvidia,pins = "slxc", "slxd"; | |
| nvidia,function = "spdif"; | |
| }; | |
| spid { | |
| nvidia,pins = "spid", "spie", "spif"; | |
| nvidia,function = "spi1"; | |
| }; | |
| spig { | |
| nvidia,pins = "spig", "spih"; | |
| nvidia,function = "spi2_alt"; | |
| }; | |
| uaa { | |
| nvidia,pins = "uaa", "uab", "uda"; | |
| nvidia,function = "ulpi"; | |
| }; | |
| uad { | |
| nvidia,pins = "uad"; | |
| nvidia,function = "irda"; | |
| }; | |
| uca { | |
| nvidia,pins = "uca", "ucb"; | |
| nvidia,function = "uartc"; | |
| }; | |
| conf_ata { | |
| nvidia,pins = "ata", "atb", "atc", "atd", | |
| "cdev1", "cdev2", "dap1", "dap2", | |
| "dap4", "ddc", "dtf", "gma", "gmc", "gmd", | |
| "gme", "gpu", "gpu7", "i2cp", "irrx", | |
| "irtx", "pta", "rm", "sdc", "sdd", | |
| "slxd", "slxk", "spdi", "spdo", "uac", | |
| "uad", "uca", "ucb", "uda"; | |
| nvidia,pull = <TEGRA_PIN_PULL_NONE>; | |
| nvidia,tristate = <TEGRA_PIN_DISABLE>; | |
| }; | |
| conf_ate { | |
| nvidia,pins = "ate", "csus", "dap3", | |
| "gpv", "owc", "slxc", "spib", "spid", | |
| "spie"; | |
| nvidia,pull = <TEGRA_PIN_PULL_NONE>; | |
| nvidia,tristate = <TEGRA_PIN_ENABLE>; | |
| }; | |
| conf_ck32 { | |
| nvidia,pins = "ck32", "ddrc", "pmca", "pmcb", | |
| "pmcc", "pmcd", "pmce", "xm2c", "xm2d"; | |
| nvidia,pull = <TEGRA_PIN_PULL_NONE>; | |
| }; | |
| conf_crtp { | |
| nvidia,pins = "crtp", "gmb", "slxa", "spia", | |
| "spig", "spih"; | |
| nvidia,pull = <TEGRA_PIN_PULL_UP>; | |
| nvidia,tristate = <TEGRA_PIN_ENABLE>; | |
| }; | |
| conf_dta { | |
| nvidia,pins = "dta", "dtb", "dtc", "dtd"; | |
| nvidia,pull = <TEGRA_PIN_PULL_DOWN>; | |
| nvidia,tristate = <TEGRA_PIN_DISABLE>; | |
| }; | |
| conf_dte { | |
| nvidia,pins = "dte", "spif"; | |
| nvidia,pull = <TEGRA_PIN_PULL_DOWN>; | |
| nvidia,tristate = <TEGRA_PIN_ENABLE>; | |
| }; | |
| conf_hdint { | |
| nvidia,pins = "hdint", "lcsn", "ldc", "lm1", | |
| "lpw1", "lsc1", "lsck", "lsda", "lsdi", | |
| "lvp0"; | |
| nvidia,tristate = <TEGRA_PIN_ENABLE>; | |
| }; | |
| conf_kbca { | |
| nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd", | |
| "kbce", "kbcf", "sdio1", "spic", "uaa", | |
| "uab"; | |
| nvidia,pull = <TEGRA_PIN_PULL_UP>; | |
| nvidia,tristate = <TEGRA_PIN_DISABLE>; | |
| }; | |
| conf_lc { | |
| nvidia,pins = "lc", "ls"; | |
| nvidia,pull = <TEGRA_PIN_PULL_UP>; | |
| }; | |
| conf_ld0 { | |
| nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4", | |
| "ld5", "ld6", "ld7", "ld8", "ld9", | |
| "ld10", "ld11", "ld12", "ld13", "ld14", | |
| "ld15", "ld16", "ld17", "ldi", "lhp0", | |
| "lhp1", "lhp2", "lhs", "lm0", "lpp", | |
| "lpw0", "lpw2", "lsc0", "lspi", "lvp1", | |
| "lvs", "pmc", "sdb"; | |
| nvidia,tristate = <TEGRA_PIN_DISABLE>; | |
| }; | |
| conf_ld17_0 { | |
| nvidia,pins = "ld17_0", "ld19_18", "ld21_20", | |
| "ld23_22"; | |
| nvidia,pull = <TEGRA_PIN_PULL_DOWN>; | |
| }; | |
| drive_sdio1 { | |
| nvidia,pins = "drive_sdio1"; | |
| nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>; | |
| nvidia,schmitt = <TEGRA_PIN_DISABLE>; | |
| nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>; | |
| nvidia,pull-down-strength = <31>; | |
| nvidia,pull-up-strength = <31>; | |
| nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>; | |
| nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>; | |
| }; | |
| }; | |
| state_i2cmux_ddc: pinmux_i2cmux_ddc { | |
| ddc { | |
| nvidia,pins = "ddc"; | |
| nvidia,function = "i2c2"; | |
| }; | |
| pta { | |
| nvidia,pins = "pta"; | |
| nvidia,function = "rsvd4"; | |
| }; | |
| }; | |
| state_i2cmux_pta: pinmux_i2cmux_pta { | |
| ddc { | |
| nvidia,pins = "ddc"; | |
| nvidia,function = "rsvd4"; | |
| }; | |
| pta { | |
| nvidia,pins = "pta"; | |
| nvidia,function = "i2c2"; | |
| }; | |
| }; | |
| state_i2cmux_idle: pinmux_i2cmux_idle { | |
| ddc { | |
| nvidia,pins = "ddc"; | |
| nvidia,function = "rsvd4"; | |
| }; | |
| pta { | |
| nvidia,pins = "pta"; | |
| nvidia,function = "rsvd4"; | |
| }; | |
| }; | |
| }; | |
| i2s@70002800 { | |
| status = "okay"; | |
| }; | |
| serial@70006300 { | |
| status = "okay"; | |
| clock-frequency = < 216000000 >; | |
| }; | |
| nand-controller@70008000 { | |
| nvidia,wp-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>; | |
| nvidia,width = <8>; | |
| nvidia,timing = <26 100 20 80 20 10 12 10 70>; | |
| nand@0 { | |
| reg = <0>; | |
| compatible = "hynix,hy27uf4g2b", "nand-flash"; | |
| }; | |
| }; | |
| pwm: pwm@7000a000 { | |
| status = "okay"; | |
| }; | |
| i2c@7000c000 { | |
| status = "okay"; | |
| clock-frequency = <400000>; | |
| wm8903: wm8903@1a { | |
| compatible = "wlf,wm8903"; | |
| reg = <0x1a>; | |
| interrupt-parent = <&gpio>; | |
| interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>; | |
| gpio-controller; | |
| #gpio-cells = <2>; | |
| micdet-cfg = <0>; | |
| micdet-delay = <100>; | |
| gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>; | |
| }; | |
| /* ALS and proximity sensor */ | |
| isl29018@44 { | |
| compatible = "isil,isl29018"; | |
| reg = <0x44>; | |
| interrupt-parent = <&gpio>; | |
| interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>; | |
| }; | |
| gyrometer@68 { | |
| compatible = "invn,mpu3050"; | |
| reg = <0x68>; | |
| interrupt-parent = <&gpio>; | |
| interrupts = <TEGRA_GPIO(Z, 4) IRQ_TYPE_LEVEL_HIGH>; | |
| }; | |
| }; | |
| i2c@7000c400 { | |
| status = "okay"; | |
| clock-frequency = <100000>; | |
| }; | |
| i2cmux { | |
| compatible = "i2c-mux-pinctrl"; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| i2c-parent = <&{/i2c@7000c400}>; | |
| pinctrl-names = "ddc", "pta", "idle"; | |
| pinctrl-0 = <&state_i2cmux_ddc>; | |
| pinctrl-1 = <&state_i2cmux_pta>; | |
| pinctrl-2 = <&state_i2cmux_idle>; | |
| hdmi_ddc: i2c@0 { | |
| reg = <0>; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| }; | |
| lvds_ddc: i2c@1 { | |
| reg = <1>; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| smart-battery@b { | |
| compatible = "ti,bq20z75", "smart-battery-1.1"; | |
| reg = <0xb>; | |
| ti,i2c-retry-count = <2>; | |
| ti,poll-retry-count = <10>; | |
| }; | |
| }; | |
| }; | |
| i2c@7000c500 { | |
| status = "okay"; | |
| clock-frequency = <400000>; | |
| }; | |
| i2c@7000d000 { | |
| status = "okay"; | |
| clock-frequency = <400000>; | |
| magnetometer@c { | |
| compatible = "asahi-kasei,ak8975"; | |
| reg = <0xc>; | |
| interrupt-parent = <&gpio>; | |
| interrupts = <TEGRA_GPIO(N, 5) IRQ_TYPE_LEVEL_HIGH>; | |
| }; | |
| pmic: tps6586x@34 { | |
| compatible = "ti,tps6586x"; | |
| reg = <0x34>; | |
| interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; | |
| ti,system-power-controller; | |
| #gpio-cells = <2>; | |
| gpio-controller; | |
| sys-supply = <&vdd_5v0_reg>; | |
| vin-sm0-supply = <&sys_reg>; | |
| vin-sm1-supply = <&sys_reg>; | |
| vin-sm2-supply = <&sys_reg>; | |
| vinldo01-supply = <&sm2_reg>; | |
| vinldo23-supply = <&sm2_reg>; | |
| vinldo4-supply = <&sm2_reg>; | |
| vinldo678-supply = <&sm2_reg>; | |
| vinldo9-supply = <&sm2_reg>; | |
| regulators { | |
| sys_reg: sys { | |
| regulator-name = "vdd_sys"; | |
| regulator-always-on; | |
| }; | |
| sm0 { | |
| regulator-name = "vdd_sm0,vdd_core"; | |
| regulator-min-microvolt = <1300000>; | |
| regulator-max-microvolt = <1300000>; | |
| regulator-always-on; | |
| }; | |
| sm1 { | |
| regulator-name = "vdd_sm1,vdd_cpu"; | |
| regulator-min-microvolt = <1125000>; | |
| regulator-max-microvolt = <1125000>; | |
| regulator-always-on; | |
| }; | |
| sm2_reg: sm2 { | |
| regulator-name = "vdd_sm2,vin_ldo*"; | |
| regulator-min-microvolt = <3700000>; | |
| regulator-max-microvolt = <3700000>; | |
| regulator-always-on; | |
| }; | |
| /* LDO0 is not connected to anything */ | |
| ldo1 { | |
| regulator-name = "vdd_ldo1,avdd_pll*"; | |
| regulator-min-microvolt = <1100000>; | |
| regulator-max-microvolt = <1100000>; | |
| regulator-always-on; | |
| }; | |
| ldo2 { | |
| regulator-name = "vdd_ldo2,vdd_rtc"; | |
| regulator-min-microvolt = <1200000>; | |
| regulator-max-microvolt = <1200000>; | |
| }; | |
| ldo3 { | |
| regulator-name = "vdd_ldo3,avdd_usb*"; | |
| regulator-min-microvolt = <3300000>; | |
| regulator-max-microvolt = <3300000>; | |
| regulator-always-on; | |
| }; | |
| ldo4 { | |
| regulator-name = "vdd_ldo4,avdd_osc,vddio_sys"; | |
| regulator-min-microvolt = <1800000>; | |
| regulator-max-microvolt = <1800000>; | |
| regulator-always-on; | |
| }; | |
| ldo5 { | |
| regulator-name = "vdd_ldo5,vcore_mmc"; | |
| regulator-min-microvolt = <2850000>; | |
| regulator-max-microvolt = <2850000>; | |
| regulator-always-on; | |
| }; | |
| ldo6 { | |
| regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam"; | |
| regulator-min-microvolt = <1800000>; | |
| regulator-max-microvolt = <1800000>; | |
| }; | |
| hdmi_vdd_reg: ldo7 { | |
| regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse"; | |
| regulator-min-microvolt = <3300000>; | |
| regulator-max-microvolt = <3300000>; | |
| }; | |
| hdmi_pll_reg: ldo8 { | |
| regulator-name = "vdd_ldo8,avdd_hdmi_pll"; | |
| regulator-min-microvolt = <1800000>; | |
| regulator-max-microvolt = <1800000>; | |
| }; | |
| ldo9 { | |
| regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx"; | |
| regulator-min-microvolt = <2850000>; | |
| regulator-max-microvolt = <2850000>; | |
| regulator-always-on; | |
| }; | |
| ldo_rtc { | |
| regulator-name = "vdd_rtc_out,vdd_cell"; | |
| regulator-min-microvolt = <3300000>; | |
| regulator-max-microvolt = <3300000>; | |
| regulator-always-on; | |
| }; | |
| }; | |
| }; | |
| temperature-sensor@4c { | |
| compatible = "onnn,nct1008"; | |
| reg = <0x4c>; | |
| }; | |
| }; | |
| kbc@7000e200 { | |
| status = "okay"; | |
| nvidia,debounce-delay-ms = <32>; | |
| nvidia,repeat-delay-ms = <160>; | |
| nvidia,ghost-filter; | |
| nvidia,kbc-row-pins = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>; | |
| nvidia,kbc-col-pins = <16 17 18 19 20 21 22 23>; | |
| linux,keymap = <MATRIX_KEY(0x00, 0x02, KEY_W) | |
| MATRIX_KEY(0x00, 0x03, KEY_S) | |
| MATRIX_KEY(0x00, 0x04, KEY_A) | |
| MATRIX_KEY(0x00, 0x05, KEY_Z) | |
| MATRIX_KEY(0x00, 0x07, KEY_FN) | |
| MATRIX_KEY(0x01, 0x07, KEY_LEFTMETA) | |
| MATRIX_KEY(0x02, 0x06, KEY_RIGHTALT) | |
| MATRIX_KEY(0x02, 0x07, KEY_LEFTALT) | |
| MATRIX_KEY(0x03, 0x00, KEY_5) | |
| MATRIX_KEY(0x03, 0x01, KEY_4) | |
| MATRIX_KEY(0x03, 0x02, KEY_R) | |
| MATRIX_KEY(0x03, 0x03, KEY_E) | |
| MATRIX_KEY(0x03, 0x04, KEY_F) | |
| MATRIX_KEY(0x03, 0x05, KEY_D) | |
| MATRIX_KEY(0x03, 0x06, KEY_X) | |
| MATRIX_KEY(0x04, 0x00, KEY_7) | |
| MATRIX_KEY(0x04, 0x01, KEY_6) | |
| MATRIX_KEY(0x04, 0x02, KEY_T) | |
| MATRIX_KEY(0x04, 0x03, KEY_H) | |
| MATRIX_KEY(0x04, 0x04, KEY_G) | |
| MATRIX_KEY(0x04, 0x05, KEY_V) | |
| MATRIX_KEY(0x04, 0x06, KEY_C) | |
| MATRIX_KEY(0x04, 0x07, KEY_SPACE) | |
| MATRIX_KEY(0x05, 0x00, KEY_9) | |
| MATRIX_KEY(0x05, 0x01, KEY_8) | |
| MATRIX_KEY(0x05, 0x02, KEY_U) | |
| MATRIX_KEY(0x05, 0x03, KEY_Y) | |
| MATRIX_KEY(0x05, 0x04, KEY_J) | |
| MATRIX_KEY(0x05, 0x05, KEY_N) | |
| MATRIX_KEY(0x05, 0x06, KEY_B) | |
| MATRIX_KEY(0x05, 0x07, KEY_BACKSLASH) | |
| MATRIX_KEY(0x06, 0x00, KEY_MINUS) | |
| MATRIX_KEY(0x06, 0x01, KEY_0) | |
| MATRIX_KEY(0x06, 0x02, KEY_O) | |
| MATRIX_KEY(0x06, 0x03, KEY_I) | |
| MATRIX_KEY(0x06, 0x04, KEY_L) | |
| MATRIX_KEY(0x06, 0x05, KEY_K) | |
| MATRIX_KEY(0x06, 0x06, KEY_COMMA) | |
| MATRIX_KEY(0x06, 0x07, KEY_M) | |
| MATRIX_KEY(0x07, 0x01, KEY_EQUAL) | |
| MATRIX_KEY(0x07, 0x02, KEY_RIGHTBRACE) | |
| MATRIX_KEY(0x07, 0x03, KEY_ENTER) | |
| MATRIX_KEY(0x07, 0x07, KEY_MENU) | |
| MATRIX_KEY(0x08, 0x04, KEY_RIGHTSHIFT) | |
| MATRIX_KEY(0x08, 0x05, KEY_LEFTSHIFT) | |
| MATRIX_KEY(0x09, 0x05, KEY_RIGHTCTRL) | |
| MATRIX_KEY(0x09, 0x07, KEY_LEFTCTRL) | |
| MATRIX_KEY(0x0B, 0x00, KEY_LEFTBRACE) | |
| MATRIX_KEY(0x0B, 0x01, KEY_P) | |
| MATRIX_KEY(0x0B, 0x02, KEY_APOSTROPHE) | |
| MATRIX_KEY(0x0B, 0x03, KEY_SEMICOLON) | |
| MATRIX_KEY(0x0B, 0x04, KEY_SLASH) | |
| MATRIX_KEY(0x0B, 0x05, KEY_DOT) | |
| MATRIX_KEY(0x0C, 0x00, KEY_F10) | |
| MATRIX_KEY(0x0C, 0x01, KEY_F9) | |
| MATRIX_KEY(0x0C, 0x02, KEY_BACKSPACE) | |
| MATRIX_KEY(0x0C, 0x03, KEY_3) | |
| MATRIX_KEY(0x0C, 0x04, KEY_2) | |
| MATRIX_KEY(0x0C, 0x05, KEY_UP) | |
| MATRIX_KEY(0x0C, 0x06, KEY_PRINT) | |
| MATRIX_KEY(0x0C, 0x07, KEY_PAUSE) | |
| MATRIX_KEY(0x0D, 0x00, KEY_INSERT) | |
| MATRIX_KEY(0x0D, 0x01, KEY_DELETE) | |
| MATRIX_KEY(0x0D, 0x03, KEY_PAGEUP ) | |
| MATRIX_KEY(0x0D, 0x04, KEY_PAGEDOWN) | |
| MATRIX_KEY(0x0D, 0x05, KEY_RIGHT) | |
| MATRIX_KEY(0x0D, 0x06, KEY_DOWN) | |
| MATRIX_KEY(0x0D, 0x07, KEY_LEFT) | |
| MATRIX_KEY(0x0E, 0x00, KEY_F11) | |
| MATRIX_KEY(0x0E, 0x01, KEY_F12) | |
| MATRIX_KEY(0x0E, 0x02, KEY_F8) | |
| MATRIX_KEY(0x0E, 0x03, KEY_Q) | |
| MATRIX_KEY(0x0E, 0x04, KEY_F4) | |
| MATRIX_KEY(0x0E, 0x05, KEY_F3) | |
| MATRIX_KEY(0x0E, 0x06, KEY_1) | |
| MATRIX_KEY(0x0E, 0x07, KEY_F7) | |
| MATRIX_KEY(0x0F, 0x00, KEY_ESC) | |
| MATRIX_KEY(0x0F, 0x01, KEY_GRAVE) | |
| MATRIX_KEY(0x0F, 0x02, KEY_F5) | |
| MATRIX_KEY(0x0F, 0x03, KEY_TAB) | |
| MATRIX_KEY(0x0F, 0x04, KEY_F1) | |
| MATRIX_KEY(0x0F, 0x05, KEY_F2) | |
| MATRIX_KEY(0x0F, 0x06, KEY_CAPSLOCK) | |
| MATRIX_KEY(0x0F, 0x07, KEY_F6) | |
| /* Software Handled Function Keys */ | |
| MATRIX_KEY(0x14, 0x00, KEY_KP7) | |
| MATRIX_KEY(0x15, 0x00, KEY_KP9) | |
| MATRIX_KEY(0x15, 0x01, KEY_KP8) | |
| MATRIX_KEY(0x15, 0x02, KEY_KP4) | |
| MATRIX_KEY(0x15, 0x04, KEY_KP1) | |
| MATRIX_KEY(0x16, 0x01, KEY_KPSLASH) | |
| MATRIX_KEY(0x16, 0x02, KEY_KP6) | |
| MATRIX_KEY(0x16, 0x03, KEY_KP5) | |
| MATRIX_KEY(0x16, 0x04, KEY_KP3) | |
| MATRIX_KEY(0x16, 0x05, KEY_KP2) | |
| MATRIX_KEY(0x16, 0x07, KEY_KP0) | |
| MATRIX_KEY(0x1B, 0x01, KEY_KPASTERISK) | |
| MATRIX_KEY(0x1B, 0x03, KEY_KPMINUS) | |
| MATRIX_KEY(0x1B, 0x04, KEY_KPPLUS) | |
| MATRIX_KEY(0x1B, 0x05, KEY_KPDOT) | |
| MATRIX_KEY(0x1C, 0x05, KEY_VOLUMEUP) | |
| MATRIX_KEY(0x1D, 0x03, KEY_HOME) | |
| MATRIX_KEY(0x1D, 0x04, KEY_END) | |
| MATRIX_KEY(0x1D, 0x05, KEY_BRIGHTNESSDOWN) | |
| MATRIX_KEY(0x1D, 0x06, KEY_VOLUMEDOWN) | |
| MATRIX_KEY(0x1D, 0x07, KEY_BRIGHTNESSUP) | |
| MATRIX_KEY(0x1E, 0x00, KEY_NUMLOCK) | |
| MATRIX_KEY(0x1E, 0x01, KEY_SCROLLLOCK) | |
| MATRIX_KEY(0x1E, 0x02, KEY_MUTE) | |
| MATRIX_KEY(0x1F, 0x04, KEY_HELP)>; | |
| }; | |
| pmc@7000e400 { | |
| nvidia,invert-interrupt; | |
| nvidia,suspend-mode = <1>; | |
| nvidia,cpu-pwr-good-time = <5000>; | |
| nvidia,cpu-pwr-off-time = <5000>; | |
| nvidia,core-pwr-good-time = <3845 3845>; | |
| nvidia,core-pwr-off-time = <3875>; | |
| nvidia,sys-clock-req-active-high; | |
| }; | |
| memory-controller@7000f400 { | |
| emc-table@190000 { | |
| reg = <190000>; | |
| compatible = "nvidia,tegra20-emc-table"; | |
| clock-frequency = <190000>; | |
| nvidia,emc-registers = <0x0000000c 0x00000026 | |
| 0x00000009 0x00000003 0x00000004 0x00000004 | |
| 0x00000002 0x0000000c 0x00000003 0x00000003 | |
| 0x00000002 0x00000001 0x00000004 0x00000005 | |
| 0x00000004 0x00000009 0x0000000d 0x0000059f | |
| 0x00000000 0x00000003 0x00000003 0x00000003 | |
| 0x00000003 0x00000001 0x0000000b 0x000000c8 | |
| 0x00000003 0x00000007 0x00000004 0x0000000f | |
| 0x00000002 0x00000000 0x00000000 0x00000002 | |
| 0x00000000 0x00000000 0x00000083 0xa06204ae | |
| 0x007dc010 0x00000000 0x00000000 0x00000000 | |
| 0x00000000 0x00000000 0x00000000 0x00000000>; | |
| }; | |
| emc-table@380000 { | |
| reg = <380000>; | |
| compatible = "nvidia,tegra20-emc-table"; | |
| clock-frequency = <380000>; | |
| nvidia,emc-registers = <0x00000017 0x0000004b | |
| 0x00000012 0x00000006 0x00000004 0x00000005 | |
| 0x00000003 0x0000000c 0x00000006 0x00000006 | |
| 0x00000003 0x00000001 0x00000004 0x00000005 | |
| 0x00000004 0x00000009 0x0000000d 0x00000b5f | |
| 0x00000000 0x00000003 0x00000003 0x00000006 | |
| 0x00000006 0x00000001 0x00000011 0x000000c8 | |
| 0x00000003 0x0000000e 0x00000007 0x0000000f | |
| 0x00000002 0x00000000 0x00000000 0x00000002 | |
| 0x00000000 0x00000000 0x00000083 0xe044048b | |
| 0x007d8010 0x00000000 0x00000000 0x00000000 | |
| 0x00000000 0x00000000 0x00000000 0x00000000>; | |
| }; | |
| }; | |
| usb@c5000000 { | |
| status = "okay"; | |
| nvidia,vbus-gpio = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>; | |
| dr_mode = "otg"; | |
| }; | |
| usb-phy@c5000000 { | |
| status = "okay"; | |
| vbus-supply = <&vbus_reg>; | |
| dr_mode = "otg"; | |
| }; | |
| usb@c5004000 { | |
| status = "okay"; | |
| nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1) | |
| GPIO_ACTIVE_LOW>; | |
| }; | |
| usb-phy@c5004000 { | |
| status = "okay"; | |
| nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1) | |
| GPIO_ACTIVE_LOW>; | |
| }; | |
| usb@c5008000 { | |
| status = "okay"; | |
| }; | |
| usb-phy@c5008000 { | |
| status = "okay"; | |
| }; | |
| sdhci@c8000000 { | |
| status = "okay"; | |
| power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>; | |
| bus-width = <4>; | |
| keep-power-in-suspend; | |
| }; | |
| sdhci@c8000400 { | |
| status = "okay"; | |
| cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; | |
| wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>; | |
| power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>; | |
| bus-width = <4>; | |
| }; | |
| sdhci@c8000600 { | |
| status = "okay"; | |
| bus-width = <8>; | |
| non-removable; | |
| }; | |
| backlight: backlight { | |
| compatible = "pwm-backlight"; | |
| enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>; | |
| power-supply = <&vdd_bl_reg>; | |
| pwms = <&pwm 2 5000000>; | |
| brightness-levels = <0 4 8 16 32 64 128 255>; | |
| default-brightness-level = <6>; | |
| }; | |
| clocks { | |
| compatible = "simple-bus"; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| clk32k_in: clock@0 { | |
| compatible = "fixed-clock"; | |
| reg=<0>; | |
| #clock-cells = <0>; | |
| clock-frequency = <32768>; | |
| }; | |
| }; | |
| gpio-keys { | |
| compatible = "gpio-keys"; | |
| power { | |
| label = "Power"; | |
| gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; | |
| linux,code = <KEY_POWER>; | |
| gpio-key,wakeup; | |
| }; | |
| lid { | |
| label = "Lid"; | |
| gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_HIGH>; | |
| linux,input-type = <5>; /* EV_SW */ | |
| linux,code = <0>; /* SW_LID */ | |
| debounce-interval = <1>; | |
| gpio-key,wakeup; | |
| }; | |
| }; | |
| panel: panel { | |
| compatible = "chunghwa,claa101wa01a", "simple-panel"; | |
| power-supply = <&vdd_pnl_reg>; | |
| enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>; | |
| backlight = <&backlight>; | |
| ddc-i2c-bus = <&lvds_ddc>; | |
| }; | |
| regulators { | |
| compatible = "simple-bus"; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| vdd_5v0_reg: regulator@0 { | |
| compatible = "regulator-fixed"; | |
| reg = <0>; | |
| regulator-name = "vdd_5v0"; | |
| regulator-min-microvolt = <5000000>; | |
| regulator-max-microvolt = <5000000>; | |
| regulator-always-on; | |
| }; | |
| regulator@1 { | |
| compatible = "regulator-fixed"; | |
| reg = <1>; | |
| regulator-name = "vdd_1v5"; | |
| regulator-min-microvolt = <1500000>; | |
| regulator-max-microvolt = <1500000>; | |
| gpio = <&pmic 0 GPIO_ACTIVE_HIGH>; | |
| }; | |
| regulator@2 { | |
| compatible = "regulator-fixed"; | |
| reg = <2>; | |
| regulator-name = "vdd_1v2"; | |
| regulator-min-microvolt = <1200000>; | |
| regulator-max-microvolt = <1200000>; | |
| gpio = <&pmic 1 GPIO_ACTIVE_HIGH>; | |
| enable-active-high; | |
| }; | |
| vbus_reg: regulator@3 { | |
| compatible = "regulator-fixed"; | |
| reg = <3>; | |
| regulator-name = "vdd_vbus_wup1"; | |
| regulator-min-microvolt = <5000000>; | |
| regulator-max-microvolt = <5000000>; | |
| enable-active-high; | |
| gpio = <&gpio TEGRA_GPIO(D, 0) 0>; | |
| regulator-always-on; | |
| regulator-boot-on; | |
| }; | |
| vdd_pnl_reg: regulator@4 { | |
| compatible = "regulator-fixed"; | |
| reg = <4>; | |
| regulator-name = "vdd_pnl"; | |
| regulator-min-microvolt = <2800000>; | |
| regulator-max-microvolt = <2800000>; | |
| gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>; | |
| enable-active-high; | |
| }; | |
| vdd_bl_reg: regulator@5 { | |
| compatible = "regulator-fixed"; | |
| reg = <5>; | |
| regulator-name = "vdd_bl"; | |
| regulator-min-microvolt = <2800000>; | |
| regulator-max-microvolt = <2800000>; | |
| gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>; | |
| enable-active-high; | |
| }; | |
| vdd_hdmi: regulator@6 { | |
| compatible = "regulator-fixed"; | |
| reg = <6>; | |
| regulator-name = "VDDIO_HDMI"; | |
| regulator-min-microvolt = <5000000>; | |
| regulator-max-microvolt = <5000000>; | |
| gpio = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_HIGH>; | |
| enable-active-high; | |
| vin-supply = <&vdd_5v0_reg>; | |
| }; | |
| }; | |
| sound { | |
| compatible = "nvidia,tegra-audio-wm8903-seaboard", | |
| "nvidia,tegra-audio-wm8903"; | |
| nvidia,model = "NVIDIA Tegra Seaboard"; | |
| nvidia,audio-routing = | |
| "Headphone Jack", "HPOUTR", | |
| "Headphone Jack", "HPOUTL", | |
| "Int Spk", "ROP", | |
| "Int Spk", "RON", | |
| "Int Spk", "LOP", | |
| "Int Spk", "LON", | |
| "Mic Jack", "MICBIAS", | |
| "IN1R", "Mic Jack"; | |
| nvidia,i2s-controller = <&tegra_i2s1>; | |
| nvidia,audio-codec = <&wm8903>; | |
| nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>; | |
| nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(X, 1) GPIO_ACTIVE_HIGH>; | |
| clocks = <&tegra_car TEGRA20_CLK_PLL_A>, | |
| <&tegra_car TEGRA20_CLK_PLL_A_OUT0>, | |
| <&tegra_car TEGRA20_CLK_CDEV1>; | |
| clock-names = "pll_a", "pll_a_out0", "mclk"; | |
| }; | |
| }; |