| // SPDX-License-Identifier: GPL-2.0-or-later | |
| /* | |
| * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC | |
| * applies to SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36 SoC | |
| * | |
| * Copyright (C) 2013 Atmel, | |
| * 2013 Ludovic Desroches <ludovic.desroches@atmel.com> | |
| */ | |
| #include <dt-bindings/dma/at91.h> | |
| #include <dt-bindings/pinctrl/at91.h> | |
| #include <dt-bindings/interrupt-controller/irq.h> | |
| #include <dt-bindings/gpio/gpio.h> | |
| #include <dt-bindings/clock/at91.h> | |
| #include <dt-bindings/mfd/at91-usart.h> | |
| / { | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| model = "Atmel SAMA5D3 family SoC"; | |
| compatible = "atmel,sama5d3", "atmel,sama5"; | |
| interrupt-parent = <&aic>; | |
| aliases { | |
| serial0 = &dbgu; | |
| serial1 = &usart0; | |
| serial2 = &usart1; | |
| serial3 = &usart2; | |
| serial4 = &usart3; | |
| serial5 = &uart0; | |
| gpio0 = &pioA; | |
| gpio1 = &pioB; | |
| gpio2 = &pioC; | |
| gpio3 = &pioD; | |
| gpio4 = &pioE; | |
| tcb0 = &tcb0; | |
| i2c0 = &i2c0; | |
| i2c1 = &i2c1; | |
| i2c2 = &i2c2; | |
| ssc0 = &ssc0; | |
| ssc1 = &ssc1; | |
| pwm0 = &pwm0; | |
| }; | |
| cpus { | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| cpu@0 { | |
| device_type = "cpu"; | |
| compatible = "arm,cortex-a5"; | |
| reg = <0x0>; | |
| }; | |
| }; | |
| pmu { | |
| compatible = "arm,cortex-a5-pmu"; | |
| interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>; | |
| }; | |
| memory@20000000 { | |
| device_type = "memory"; | |
| reg = <0x20000000 0x8000000>; | |
| }; | |
| clocks { | |
| slow_xtal: slow_xtal { | |
| compatible = "fixed-clock"; | |
| #clock-cells = <0>; | |
| clock-frequency = <0>; | |
| }; | |
| main_xtal: main_xtal { | |
| compatible = "fixed-clock"; | |
| #clock-cells = <0>; | |
| clock-frequency = <0>; | |
| }; | |
| adc_op_clk: adc_op_clk { | |
| compatible = "fixed-clock"; | |
| #clock-cells = <0>; | |
| clock-frequency = <1000000>; | |
| }; | |
| }; | |
| sram: sram@300000 { | |
| compatible = "mmio-sram"; | |
| reg = <0x00300000 0x20000>; | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| ranges = <0 0x00300000 0x20000>; | |
| }; | |
| ahb { | |
| compatible = "simple-bus"; | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| ranges; | |
| apb { | |
| compatible = "simple-bus"; | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| ranges; | |
| mmc0: mmc@f0000000 { | |
| compatible = "atmel,hsmci"; | |
| reg = <0xf0000000 0x600>; | |
| interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>; | |
| dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(0)>; | |
| dma-names = "rxtx"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>; | |
| status = "disabled"; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 21>; | |
| clock-names = "mci_clk"; | |
| }; | |
| spi0: spi@f0004000 { | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| compatible = "atmel,at91rm9200-spi"; | |
| reg = <0xf0004000 0x100>; | |
| interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>; | |
| dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(1)>, | |
| <&dma0 2 AT91_DMA_CFG_PER_ID(2)>; | |
| dma-names = "tx", "rx"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <&pinctrl_spi0>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 24>; | |
| clock-names = "spi_clk"; | |
| status = "disabled"; | |
| }; | |
| ssc0: ssc@f0008000 { | |
| compatible = "atmel,at91sam9g45-ssc"; | |
| reg = <0xf0008000 0x4000>; | |
| interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>; | |
| dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(13)>, | |
| <&dma0 2 AT91_DMA_CFG_PER_ID(14)>; | |
| dma-names = "tx", "rx"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 38>; | |
| clock-names = "pclk"; | |
| status = "disabled"; | |
| }; | |
| tcb0: timer@f0010000 { | |
| compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon"; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| reg = <0xf0010000 0x100>; | |
| interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&clk32k>; | |
| clock-names = "t0_clk", "slow_clk"; | |
| }; | |
| i2c0: i2c@f0014000 { | |
| compatible = "atmel,at91sam9x5-i2c"; | |
| reg = <0xf0014000 0x4000>; | |
| interrupts = <18 IRQ_TYPE_LEVEL_HIGH 6>; | |
| dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(7)>, | |
| <&dma0 2 AT91_DMA_CFG_PER_ID(8)>; | |
| dma-names = "tx", "rx"; | |
| pinctrl-names = "default", "gpio"; | |
| pinctrl-0 = <&pinctrl_i2c0>; | |
| pinctrl-1 = <&pinctrl_i2c0_gpio>; | |
| sda-gpios = <&pioA 30 GPIO_ACTIVE_HIGH>; | |
| scl-gpios = <&pioA 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 18>; | |
| status = "disabled"; | |
| }; | |
| i2c1: i2c@f0018000 { | |
| compatible = "atmel,at91sam9x5-i2c"; | |
| reg = <0xf0018000 0x4000>; | |
| interrupts = <19 IRQ_TYPE_LEVEL_HIGH 6>; | |
| dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(9)>, | |
| <&dma0 2 AT91_DMA_CFG_PER_ID(10)>; | |
| dma-names = "tx", "rx"; | |
| pinctrl-names = "default", "gpio"; | |
| pinctrl-0 = <&pinctrl_i2c1>; | |
| pinctrl-1 = <&pinctrl_i2c1_gpio>; | |
| sda-gpios = <&pioC 26 GPIO_ACTIVE_HIGH>; | |
| scl-gpios = <&pioC 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; | |
| status = "disabled"; | |
| }; | |
| usart0: serial@f001c000 { | |
| compatible = "atmel,at91sam9260-usart"; | |
| reg = <0xf001c000 0x100>; | |
| atmel,usart-mode = <AT91_USART_MODE_SERIAL>; | |
| interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>; | |
| dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>, | |
| <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>; | |
| dma-names = "tx", "rx"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <&pinctrl_usart0>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 12>; | |
| clock-names = "usart"; | |
| status = "disabled"; | |
| }; | |
| usart1: serial@f0020000 { | |
| compatible = "atmel,at91sam9260-usart"; | |
| reg = <0xf0020000 0x100>; | |
| atmel,usart-mode = <AT91_USART_MODE_SERIAL>; | |
| interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>; | |
| dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(5)>, | |
| <&dma0 2 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>; | |
| dma-names = "tx", "rx"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <&pinctrl_usart1>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; | |
| clock-names = "usart"; | |
| status = "disabled"; | |
| }; | |
| uart0: serial@f0024000 { | |
| compatible = "atmel,at91sam9260-usart"; | |
| reg = <0xf0024000 0x100>; | |
| atmel,usart-mode = <AT91_USART_MODE_SERIAL>; | |
| interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <&pinctrl_uart0>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 16>; | |
| clock-names = "usart"; | |
| status = "disabled"; | |
| }; | |
| pwm0: pwm@f002c000 { | |
| compatible = "atmel,sama5d3-pwm"; | |
| reg = <0xf002c000 0x300>; | |
| interrupts = <28 IRQ_TYPE_LEVEL_HIGH 4>; | |
| #pwm-cells = <3>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 28>; | |
| status = "disabled"; | |
| }; | |
| isi: isi@f0034000 { | |
| compatible = "atmel,at91sam9g45-isi"; | |
| reg = <0xf0034000 0x4000>; | |
| interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <&pinctrl_isi_data_0_7>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 37>; | |
| clock-names = "isi_clk"; | |
| status = "disabled"; | |
| port { | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| }; | |
| }; | |
| sfr: sfr@f0038000 { | |
| compatible = "atmel,sama5d3-sfr", "syscon"; | |
| reg = <0xf0038000 0x60>; | |
| }; | |
| mmc1: mmc@f8000000 { | |
| compatible = "atmel,hsmci"; | |
| reg = <0xf8000000 0x600>; | |
| interrupts = <22 IRQ_TYPE_LEVEL_HIGH 0>; | |
| dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(0)>; | |
| dma-names = "rxtx"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>; | |
| status = "disabled"; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 22>; | |
| clock-names = "mci_clk"; | |
| }; | |
| spi1: spi@f8008000 { | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| compatible = "atmel,at91rm9200-spi"; | |
| reg = <0xf8008000 0x100>; | |
| interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>; | |
| dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(15)>, | |
| <&dma1 2 AT91_DMA_CFG_PER_ID(16)>; | |
| dma-names = "tx", "rx"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <&pinctrl_spi1>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 25>; | |
| clock-names = "spi_clk"; | |
| status = "disabled"; | |
| }; | |
| ssc1: ssc@f800c000 { | |
| compatible = "atmel,at91sam9g45-ssc"; | |
| reg = <0xf800c000 0x4000>; | |
| interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>; | |
| dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(3)>, | |
| <&dma1 2 AT91_DMA_CFG_PER_ID(4)>; | |
| dma-names = "tx", "rx"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 39>; | |
| clock-names = "pclk"; | |
| status = "disabled"; | |
| }; | |
| adc0: adc@f8018000 { | |
| compatible = "atmel,sama5d3-adc"; | |
| reg = <0xf8018000 0x100>; | |
| interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < | |
| &pinctrl_adc0_adtrg | |
| &pinctrl_adc0_ad0 | |
| &pinctrl_adc0_ad1 | |
| &pinctrl_adc0_ad2 | |
| &pinctrl_adc0_ad3 | |
| &pinctrl_adc0_ad4 | |
| &pinctrl_adc0_ad5 | |
| &pinctrl_adc0_ad6 | |
| &pinctrl_adc0_ad7 | |
| &pinctrl_adc0_ad8 | |
| &pinctrl_adc0_ad9 | |
| &pinctrl_adc0_ad10 | |
| &pinctrl_adc0_ad11 | |
| >; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 29>, | |
| <&adc_op_clk>; | |
| clock-names = "adc_clk", "adc_op_clk"; | |
| atmel,adc-channels-used = <0xfff>; | |
| atmel,adc-startup-time = <40>; | |
| atmel,adc-use-external-triggers; | |
| atmel,adc-vref = <3000>; | |
| atmel,adc-sample-hold-time = <11>; | |
| status = "disabled"; | |
| }; | |
| i2c2: i2c@f801c000 { | |
| compatible = "atmel,at91sam9x5-i2c"; | |
| reg = <0xf801c000 0x4000>; | |
| interrupts = <20 IRQ_TYPE_LEVEL_HIGH 6>; | |
| dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(11)>, | |
| <&dma1 2 AT91_DMA_CFG_PER_ID(12)>; | |
| dma-names = "tx", "rx"; | |
| pinctrl-names = "default", "gpio"; | |
| pinctrl-0 = <&pinctrl_i2c2>; | |
| pinctrl-1 = <&pinctrl_i2c2_gpio>; | |
| sda-gpios = <&pioA 18 GPIO_ACTIVE_HIGH>; | |
| scl-gpios = <&pioA 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 20>; | |
| status = "disabled"; | |
| }; | |
| usart2: serial@f8020000 { | |
| compatible = "atmel,at91sam9260-usart"; | |
| reg = <0xf8020000 0x100>; | |
| atmel,usart-mode = <AT91_USART_MODE_SERIAL>; | |
| interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; | |
| dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(7)>, | |
| <&dma1 2 (AT91_DMA_CFG_PER_ID(8) | AT91_DMA_CFG_FIFOCFG_ASAP)>; | |
| dma-names = "tx", "rx"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <&pinctrl_usart2>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; | |
| clock-names = "usart"; | |
| status = "disabled"; | |
| }; | |
| usart3: serial@f8024000 { | |
| compatible = "atmel,at91sam9260-usart"; | |
| reg = <0xf8024000 0x100>; | |
| atmel,usart-mode = <AT91_USART_MODE_SERIAL>; | |
| interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; | |
| dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(9)>, | |
| <&dma1 2 (AT91_DMA_CFG_PER_ID(10) | AT91_DMA_CFG_FIFOCFG_ASAP)>; | |
| dma-names = "tx", "rx"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <&pinctrl_usart3>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 15>; | |
| clock-names = "usart"; | |
| status = "disabled"; | |
| }; | |
| sha: crypto@f8034000 { | |
| compatible = "atmel,at91sam9g46-sha"; | |
| reg = <0xf8034000 0x100>; | |
| interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>; | |
| dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(17)>; | |
| dma-names = "tx"; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 42>; | |
| clock-names = "sha_clk"; | |
| }; | |
| aes: crypto@f8038000 { | |
| compatible = "atmel,at91sam9g46-aes"; | |
| reg = <0xf8038000 0x100>; | |
| interrupts = <43 IRQ_TYPE_LEVEL_HIGH 0>; | |
| dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(18)>, | |
| <&dma1 2 AT91_DMA_CFG_PER_ID(19)>; | |
| dma-names = "tx", "rx"; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 43>; | |
| clock-names = "aes_clk"; | |
| }; | |
| tdes: crypto@f803c000 { | |
| compatible = "atmel,at91sam9g46-tdes"; | |
| reg = <0xf803c000 0x100>; | |
| interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>; | |
| dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(20)>, | |
| <&dma1 2 AT91_DMA_CFG_PER_ID(21)>; | |
| dma-names = "tx", "rx"; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 44>; | |
| clock-names = "tdes_clk"; | |
| }; | |
| trng@f8040000 { | |
| compatible = "atmel,at91sam9g45-trng"; | |
| reg = <0xf8040000 0x100>; | |
| interrupts = <45 IRQ_TYPE_LEVEL_HIGH 0>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 45>; | |
| }; | |
| hsmc: hsmc@ffffc000 { | |
| compatible = "atmel,sama5d3-smc", "syscon", "simple-mfd"; | |
| reg = <0xffffc000 0x1000>; | |
| interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| ranges; | |
| pmecc: ecc-engine@ffffc070 { | |
| compatible = "atmel,at91sam9g45-pmecc"; | |
| reg = <0xffffc070 0x490>, | |
| <0xffffc500 0x100>; | |
| }; | |
| }; | |
| dma0: dma-controller@ffffe600 { | |
| compatible = "atmel,at91sam9g45-dma"; | |
| reg = <0xffffe600 0x200>; | |
| interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>; | |
| #dma-cells = <2>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 30>; | |
| clock-names = "dma_clk"; | |
| }; | |
| dma1: dma-controller@ffffe800 { | |
| compatible = "atmel,at91sam9g45-dma"; | |
| reg = <0xffffe800 0x200>; | |
| interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>; | |
| #dma-cells = <2>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 31>; | |
| clock-names = "dma_clk"; | |
| }; | |
| ramc0: ramc@ffffea00 { | |
| compatible = "atmel,sama5d3-ddramc"; | |
| reg = <0xffffea00 0x200>; | |
| clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_PERIPHERAL 49>; | |
| clock-names = "ddrck", "mpddr"; | |
| }; | |
| dbgu: serial@ffffee00 { | |
| compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; | |
| reg = <0xffffee00 0x200>; | |
| atmel,usart-mode = <AT91_USART_MODE_SERIAL>; | |
| interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>; | |
| dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(13)>, | |
| <&dma1 2 (AT91_DMA_CFG_PER_ID(14) | AT91_DMA_CFG_FIFOCFG_ASAP)>; | |
| dma-names = "tx", "rx"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <&pinctrl_dbgu>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 2>; | |
| clock-names = "usart"; | |
| status = "disabled"; | |
| }; | |
| aic: interrupt-controller@fffff000 { | |
| #interrupt-cells = <3>; | |
| compatible = "atmel,sama5d3-aic"; | |
| interrupt-controller; | |
| reg = <0xfffff000 0x200>; | |
| atmel,external-irqs = <47>; | |
| }; | |
| pinctrl: pinctrl@fffff200 { | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-bus"; | |
| ranges = <0xfffff200 0xfffff200 0xa00>; | |
| atmel,mux-mask = < | |
| /* A B C */ | |
| 0xffffffff 0xc0fc0000 0xc0ff0000 /* pioA */ | |
| 0xffffffff 0x0ff8ffff 0x00000000 /* pioB */ | |
| 0xffffffff 0xbc00f1ff 0x7c00fc00 /* pioC */ | |
| 0xffffffff 0xc001c0e0 0x0001c1e0 /* pioD */ | |
| 0xffffffff 0xbf9f8000 0x18000000 /* pioE */ | |
| >; | |
| /* shared pinctrl settings */ | |
| adc0 { | |
| pinctrl_adc0_adtrg: adc0_adtrg { | |
| atmel,pins = | |
| <AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD19 periph A ADTRG */ | |
| }; | |
| pinctrl_adc0_ad0: adc0_ad0 { | |
| atmel,pins = | |
| <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD20 periph A AD0 */ | |
| }; | |
| pinctrl_adc0_ad1: adc0_ad1 { | |
| atmel,pins = | |
| <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A AD1 */ | |
| }; | |
| pinctrl_adc0_ad2: adc0_ad2 { | |
| atmel,pins = | |
| <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD22 periph A AD2 */ | |
| }; | |
| pinctrl_adc0_ad3: adc0_ad3 { | |
| atmel,pins = | |
| <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD23 periph A AD3 */ | |
| }; | |
| pinctrl_adc0_ad4: adc0_ad4 { | |
| atmel,pins = | |
| <AT91_PIOD 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD24 periph A AD4 */ | |
| }; | |
| pinctrl_adc0_ad5: adc0_ad5 { | |
| atmel,pins = | |
| <AT91_PIOD 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD25 periph A AD5 */ | |
| }; | |
| pinctrl_adc0_ad6: adc0_ad6 { | |
| atmel,pins = | |
| <AT91_PIOD 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD26 periph A AD6 */ | |
| }; | |
| pinctrl_adc0_ad7: adc0_ad7 { | |
| atmel,pins = | |
| <AT91_PIOD 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD27 periph A AD7 */ | |
| }; | |
| pinctrl_adc0_ad8: adc0_ad8 { | |
| atmel,pins = | |
| <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD28 periph A AD8 */ | |
| }; | |
| pinctrl_adc0_ad9: adc0_ad9 { | |
| atmel,pins = | |
| <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD29 periph A AD9 */ | |
| }; | |
| pinctrl_adc0_ad10: adc0_ad10 { | |
| atmel,pins = | |
| <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD30 periph A AD10, conflicts with PCK0 */ | |
| }; | |
| pinctrl_adc0_ad11: adc0_ad11 { | |
| atmel,pins = | |
| <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD31 periph A AD11, conflicts with PCK1 */ | |
| }; | |
| }; | |
| dbgu { | |
| pinctrl_dbgu: dbgu-0 { | |
| atmel,pins = | |
| <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP | |
| AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
| }; | |
| }; | |
| ebi { | |
| pinctrl_ebi_addr: ebi-addr-0 { | |
| atmel,pins = | |
| <AT91_PIOE 1 AT91_PERIPH_A AT91_PINCTRL_NONE | |
| AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE | |
| AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE | |
| AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE | |
| AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE | |
| AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE | |
| AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE | |
| AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE | |
| AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE | |
| AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE | |
| AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE | |
| AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE | |
| AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE | |
| AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE | |
| AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE | |
| AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE | |
| AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE | |
| AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE | |
| AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE | |
| AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE | |
| AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE | |
| AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE | |
| AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
| }; | |
| pinctrl_ebi_nand_addr: ebi-addr-1 { | |
| atmel,pins = | |
| <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE | |
| AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
| }; | |
| pinctrl_ebi_cs0: ebi-cs0-0 { | |
| atmel,pins = | |
| <AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
| }; | |
| pinctrl_ebi_cs1: ebi-cs1-0 { | |
| atmel,pins = | |
| <AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
| }; | |
| pinctrl_ebi_cs2: ebi-cs2-0 { | |
| atmel,pins = | |
| <AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
| }; | |
| pinctrl_ebi_nwait: ebi-nwait-0 { | |
| atmel,pins = | |
| <AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
| }; | |
| pinctrl_ebi_nwr1_nbs1: ebi-nwr1-nbs1-0 { | |
| atmel,pins = | |
| <AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
| }; | |
| }; | |
| i2c0 { | |
| pinctrl_i2c0: i2c0-0 { | |
| atmel,pins = | |
| <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */ | |
| AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */ | |
| }; | |
| pinctrl_i2c0_gpio: i2c0-gpio { | |
| atmel,pins = | |
| <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE | |
| AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; | |
| }; | |
| }; | |
| i2c1 { | |
| pinctrl_i2c1: i2c1-0 { | |
| atmel,pins = | |
| <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */ | |
| AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */ | |
| }; | |
| pinctrl_i2c1_gpio: i2c1-gpio { | |
| atmel,pins = | |
| <AT91_PIOC 26 AT91_PERIPH_GPIO AT91_PINCTRL_NONE | |
| AT91_PIOC 27 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; | |
| }; | |
| }; | |
| i2c2 { | |
| pinctrl_i2c2: i2c2-0 { | |
| atmel,pins = | |
| <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* TWD2 pin, conflicts with LCDDAT18, ISI_D2 */ | |
| AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TWCK2 pin, conflicts with LCDDAT19, ISI_D3 */ | |
| }; | |
| pinctrl_i2c2_gpio: i2c2-gpio { | |
| atmel,pins = | |
| <AT91_PIOA 18 AT91_PERIPH_GPIO AT91_PINCTRL_NONE | |
| AT91_PIOA 19 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; | |
| }; | |
| }; | |
| isi { | |
| pinctrl_isi_data_0_7: isi-0-data-0-7 { | |
| atmel,pins = | |
| <AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */ | |
| AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */ | |
| AT91_PIOA 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */ | |
| AT91_PIOA 19 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */ | |
| AT91_PIOA 20 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */ | |
| AT91_PIOA 21 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */ | |
| AT91_PIOA 22 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */ | |
| AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */ | |
| AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC30 periph C ISI_PCK, conflicts with UTXD0 */ | |
| AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */ | |
| AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */ | |
| }; | |
| pinctrl_isi_data_8_9: isi-0-data-8-9 { | |
| atmel,pins = | |
| <AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */ | |
| AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */ | |
| }; | |
| pinctrl_isi_data_10_11: isi-0-data-10-11 { | |
| atmel,pins = | |
| <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC27 periph C ISI_PD10, conflicts with SPI1_NPCS2, TWCK1 */ | |
| AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC26 periph C ISI_PD11, conflicts with SPI1_NPCS1, TWD1 */ | |
| }; | |
| }; | |
| mmc0 { | |
| pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 { | |
| atmel,pins = | |
| <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A MCI0_CK */ | |
| AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A MCI0_CDA with pullup */ | |
| AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD1 periph A MCI0_DA0 with pullup */ | |
| }; | |
| pinctrl_mmc0_dat1_3: mmc0_dat1_3 { | |
| atmel,pins = | |
| <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A MCI0_DA1 with pullup */ | |
| AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A MCI0_DA2 with pullup */ | |
| AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD4 periph A MCI0_DA3 with pullup */ | |
| }; | |
| pinctrl_mmc0_dat4_7: mmc0_dat4_7 { | |
| atmel,pins = | |
| <AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */ | |
| AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */ | |
| AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A MCI0_DA6 with pullup, conflicts with TCLK0, PWMH3 */ | |
| AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */ | |
| }; | |
| }; | |
| mmc1 { | |
| pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 { | |
| atmel,pins = | |
| <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A MCI1_CK, conflicts with GRX5 */ | |
| AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */ | |
| AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */ | |
| }; | |
| pinctrl_mmc1_dat1_3: mmc1_dat1_3 { | |
| atmel,pins = | |
| <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */ | |
| AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */ | |
| AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */ | |
| }; | |
| }; | |
| nand0 { | |
| pinctrl_nand0_ale_cle: nand0_ale_cle-0 { | |
| atmel,pins = | |
| <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PE21 periph A with pullup */ | |
| AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PE22 periph A with pullup */ | |
| }; | |
| }; | |
| pwm0 { | |
| pinctrl_pwm0_pwmh0_0: pwm0_pwmh0-0 { | |
| atmel,pins = | |
| <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D4 and LCDDAT20 */ | |
| }; | |
| pinctrl_pwm0_pwmh0_1: pwm0_pwmh0-1 { | |
| atmel,pins = | |
| <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX0 */ | |
| }; | |
| pinctrl_pwm0_pwml0_0: pwm0_pwml0-0 { | |
| atmel,pins = | |
| <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D5 and LCDDAT21 */ | |
| }; | |
| pinctrl_pwm0_pwml0_1: pwm0_pwml0-1 { | |
| atmel,pins = | |
| <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX1 */ | |
| }; | |
| pinctrl_pwm0_pwmh1_0: pwm0_pwmh1-0 { | |
| atmel,pins = | |
| <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D6 and LCDDAT22 */ | |
| }; | |
| pinctrl_pwm0_pwmh1_1: pwm0_pwmh1-1 { | |
| atmel,pins = | |
| <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX0 */ | |
| }; | |
| pinctrl_pwm0_pwmh1_2: pwm0_pwmh1-2 { | |
| atmel,pins = | |
| <AT91_PIOB 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with G125CKO and RTS1 */ | |
| }; | |
| pinctrl_pwm0_pwml1_0: pwm0_pwml1-0 { | |
| atmel,pins = | |
| <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D7 and LCDDAT23 */ | |
| }; | |
| pinctrl_pwm0_pwml1_1: pwm0_pwml1-1 { | |
| atmel,pins = | |
| <AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX1 */ | |
| }; | |
| pinctrl_pwm0_pwml1_2: pwm0_pwml1-2 { | |
| atmel,pins = | |
| <AT91_PIOE 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with IRQ */ | |
| }; | |
| pinctrl_pwm0_pwmh2_0: pwm0_pwmh2-0 { | |
| atmel,pins = | |
| <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXCK */ | |
| }; | |
| pinctrl_pwm0_pwmh2_1: pwm0_pwmh2-1 { | |
| atmel,pins = | |
| <AT91_PIOD 5 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA4 and TIOA0 */ | |
| }; | |
| pinctrl_pwm0_pwml2_0: pwm0_pwml2-0 { | |
| atmel,pins = | |
| <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXEN */ | |
| }; | |
| pinctrl_pwm0_pwml2_1: pwm0_pwml2-1 { | |
| atmel,pins = | |
| <AT91_PIOD 6 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA5 and TIOB0 */ | |
| }; | |
| pinctrl_pwm0_pwmh3_0: pwm0_pwmh3-0 { | |
| atmel,pins = | |
| <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXDV */ | |
| }; | |
| pinctrl_pwm0_pwmh3_1: pwm0_pwmh3-1 { | |
| atmel,pins = | |
| <AT91_PIOD 7 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA6 and TCLK0 */ | |
| }; | |
| pinctrl_pwm0_pwml3_0: pwm0_pwml3-0 { | |
| atmel,pins = | |
| <AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXER */ | |
| }; | |
| pinctrl_pwm0_pwml3_1: pwm0_pwml3-1 { | |
| atmel,pins = | |
| <AT91_PIOD 8 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA7 */ | |
| }; | |
| }; | |
| spi0 { | |
| pinctrl_spi0: spi0-0 { | |
| atmel,pins = | |
| <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A SPI0_MISO pin */ | |
| AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A SPI0_MOSI pin */ | |
| AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A SPI0_SPCK pin */ | |
| }; | |
| }; | |
| spi1 { | |
| pinctrl_spi1: spi1-0 { | |
| atmel,pins = | |
| <AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A SPI1_MISO pin */ | |
| AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A SPI1_MOSI pin */ | |
| AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC24 periph A SPI1_SPCK pin */ | |
| }; | |
| }; | |
| ssc0 { | |
| pinctrl_ssc0_tx: ssc0_tx { | |
| atmel,pins = | |
| <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A TK0 */ | |
| AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC17 periph A TF0 */ | |
| AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC18 periph A TD0 */ | |
| }; | |
| pinctrl_ssc0_rx: ssc0_rx { | |
| atmel,pins = | |
| <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A RK0 */ | |
| AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC20 periph A RF0 */ | |
| AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC21 periph A RD0 */ | |
| }; | |
| }; | |
| ssc1 { | |
| pinctrl_ssc1_tx: ssc1_tx { | |
| atmel,pins = | |
| <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB2 periph B TK1, conflicts with GTX2 */ | |
| AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B TF1, conflicts with GTX3 */ | |
| AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB6 periph B TD1, conflicts with TD1 */ | |
| }; | |
| pinctrl_ssc1_rx: ssc1_rx { | |
| atmel,pins = | |
| <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB7 periph B RK1, conflicts with EREFCK */ | |
| AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB10 periph B RF1, conflicts with GTXER */ | |
| AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB11 periph B RD1, conflicts with GRXCK */ | |
| }; | |
| }; | |
| uart0 { | |
| pinctrl_uart0: uart0-0 { | |
| atmel,pins = | |
| <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* conflicts with PWMFI2, ISI_D8 */ | |
| AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with ISI_PCK */ | |
| }; | |
| }; | |
| uart1 { | |
| pinctrl_uart1: uart1-0 { | |
| atmel,pins = | |
| <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with TWD0, ISI_VSYNC */ | |
| AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with TWCK0, ISI_HSYNC */ | |
| }; | |
| }; | |
| usart0 { | |
| pinctrl_usart0: usart0-0 { | |
| atmel,pins = | |
| <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP | |
| AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
| }; | |
| pinctrl_usart0_rts_cts: usart0_rts_cts-0 { | |
| atmel,pins = | |
| <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */ | |
| AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */ | |
| }; | |
| }; | |
| usart1 { | |
| pinctrl_usart1: usart1-0 { | |
| atmel,pins = | |
| <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP | |
| AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
| }; | |
| pinctrl_usart1_rts_cts: usart1_rts_cts-0 { | |
| atmel,pins = | |
| <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB26 periph A, conflicts with GRX7 */ | |
| AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A, conflicts with G125CKO */ | |
| }; | |
| }; | |
| usart2 { | |
| pinctrl_usart2: usart2-0 { | |
| atmel,pins = | |
| <AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with A25 */ | |
| AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts NCS0 */ | |
| }; | |
| pinctrl_usart2_rts_cts: usart2_rts_cts-0 { | |
| atmel,pins = | |
| <AT91_PIOE 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE23 periph B, conflicts with A23 */ | |
| AT91_PIOE 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE24 periph B, conflicts with A24 */ | |
| }; | |
| }; | |
| usart3 { | |
| pinctrl_usart3: usart3-0 { | |
| atmel,pins = | |
| <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with A18 */ | |
| AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with A19 */ | |
| }; | |
| pinctrl_usart3_rts_cts: usart3_rts_cts-0 { | |
| atmel,pins = | |
| <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE16 periph B, conflicts with A16 */ | |
| AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE17 periph B, conflicts with A17 */ | |
| }; | |
| }; | |
| pioA: gpio@fffff200 { | |
| compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | |
| reg = <0xfffff200 0x100>; | |
| interrupts = <6 IRQ_TYPE_LEVEL_HIGH 1>; | |
| #gpio-cells = <2>; | |
| gpio-controller; | |
| interrupt-controller; | |
| #interrupt-cells = <2>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; | |
| }; | |
| pioB: gpio@fffff400 { | |
| compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | |
| reg = <0xfffff400 0x100>; | |
| interrupts = <7 IRQ_TYPE_LEVEL_HIGH 1>; | |
| #gpio-cells = <2>; | |
| gpio-controller; | |
| interrupt-controller; | |
| #interrupt-cells = <2>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; | |
| }; | |
| pioC: gpio@fffff600 { | |
| compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | |
| reg = <0xfffff600 0x100>; | |
| interrupts = <8 IRQ_TYPE_LEVEL_HIGH 1>; | |
| #gpio-cells = <2>; | |
| gpio-controller; | |
| interrupt-controller; | |
| #interrupt-cells = <2>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; | |
| }; | |
| pioD: gpio@fffff800 { | |
| compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | |
| reg = <0xfffff800 0x100>; | |
| interrupts = <9 IRQ_TYPE_LEVEL_HIGH 1>; | |
| #gpio-cells = <2>; | |
| gpio-controller; | |
| interrupt-controller; | |
| #interrupt-cells = <2>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; | |
| }; | |
| pioE: gpio@fffffa00 { | |
| compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | |
| reg = <0xfffffa00 0x100>; | |
| interrupts = <10 IRQ_TYPE_LEVEL_HIGH 1>; | |
| #gpio-cells = <2>; | |
| gpio-controller; | |
| interrupt-controller; | |
| #interrupt-cells = <2>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 10>; | |
| }; | |
| }; | |
| pmc: clock-controller@fffffc00 { | |
| compatible = "atmel,sama5d3-pmc", "syscon"; | |
| reg = <0xfffffc00 0x120>; | |
| interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; | |
| #clock-cells = <2>; | |
| clocks = <&clk32k>, <&main_xtal>; | |
| clock-names = "slow_clk", "main_xtal"; | |
| }; | |
| reset_controller: reset-controller@fffffe00 { | |
| compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc"; | |
| reg = <0xfffffe00 0x10>; | |
| clocks = <&clk32k>; | |
| }; | |
| shutdown_controller: poweroff@fffffe10 { | |
| compatible = "atmel,at91sam9x5-shdwc"; | |
| reg = <0xfffffe10 0x10>; | |
| clocks = <&clk32k>; | |
| }; | |
| pit: timer@fffffe30 { | |
| compatible = "atmel,at91sam9260-pit"; | |
| reg = <0xfffffe30 0xf>; | |
| interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>; | |
| clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; | |
| }; | |
| watchdog: watchdog@fffffe40 { | |
| compatible = "atmel,at91sam9260-wdt"; | |
| reg = <0xfffffe40 0x10>; | |
| interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>; | |
| clocks = <&clk32k>; | |
| atmel,watchdog-type = "hardware"; | |
| atmel,reset-type = "all"; | |
| atmel,dbg-halt; | |
| status = "disabled"; | |
| }; | |
| clk32k: clock-controller@fffffe50 { | |
| compatible = "atmel,sama5d3-sckc"; | |
| reg = <0xfffffe50 0x4>; | |
| clocks = <&slow_xtal>; | |
| #clock-cells = <0>; | |
| }; | |
| rtc@fffffeb0 { | |
| compatible = "atmel,at91rm9200-rtc"; | |
| reg = <0xfffffeb0 0x30>; | |
| interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; | |
| clocks = <&clk32k>; | |
| }; | |
| }; | |
| nfc_sram: sram@200000 { | |
| compatible = "mmio-sram"; | |
| no-memory-wc; | |
| reg = <0x200000 0x2400>; | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| ranges = <0 0x200000 0x2400>; | |
| }; | |
| usb0: gadget@500000 { | |
| compatible = "atmel,sama5d3-udc"; | |
| reg = <0x00500000 0x100000 | |
| 0xf8030000 0x4000>; | |
| interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 33>, <&pmc PMC_TYPE_CORE PMC_UTMI>; | |
| clock-names = "pclk", "hclk"; | |
| status = "disabled"; | |
| }; | |
| usb1: ohci@600000 { | |
| compatible = "atmel,at91rm9200-ohci", "usb-ohci"; | |
| reg = <0x00600000 0x100000>; | |
| interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 32>, <&pmc PMC_TYPE_PERIPHERAL 32>, <&pmc PMC_TYPE_SYSTEM 6>; | |
| clock-names = "ohci_clk", "hclk", "uhpck"; | |
| status = "disabled"; | |
| }; | |
| usb2: ehci@700000 { | |
| compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; | |
| reg = <0x00700000 0x100000>; | |
| interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>; | |
| clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 32>; | |
| clock-names = "usb_clk", "ehci_clk"; | |
| status = "disabled"; | |
| }; | |
| ebi: ebi@10000000 { | |
| compatible = "atmel,sama5d3-ebi"; | |
| #address-cells = <2>; | |
| #size-cells = <1>; | |
| atmel,smc = <&hsmc>; | |
| reg = <0x10000000 0x10000000 | |
| 0x40000000 0x30000000>; | |
| ranges = <0x0 0x0 0x10000000 0x10000000 | |
| 0x1 0x0 0x40000000 0x10000000 | |
| 0x2 0x0 0x50000000 0x10000000 | |
| 0x3 0x0 0x60000000 0x10000000>; | |
| clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; | |
| status = "disabled"; | |
| nand_controller: nand-controller { | |
| compatible = "atmel,sama5d3-nand-controller"; | |
| atmel,nfc-sram = <&nfc_sram>; | |
| atmel,nfc-io = <&nfc_io>; | |
| ecc-engine = <&pmecc>; | |
| #address-cells = <2>; | |
| #size-cells = <1>; | |
| ranges; | |
| status = "disabled"; | |
| }; | |
| }; | |
| nfc_io: nfc-io@70000000 { | |
| compatible = "atmel,sama5d3-nfc-io", "syscon"; | |
| reg = <0x70000000 0x8000000>; | |
| }; | |
| }; | |
| }; |