Merge tag 'mediatek-for-master-2026-06-24' of https://source.denx.de/u-boot/custodians/u-boot-mediatek - Cherry-pick upstream devicetree fix for duplicate regulator names. - Fix regressions due to recent mach-wide cleanups accidentally changing gd->bd->bi_dram[0].size.
diff --git a/arch/arm/mach-mediatek/Kconfig b/arch/arm/mach-mediatek/Kconfig index 80f7185..799c630 100644 --- a/arch/arm/mach-mediatek/Kconfig +++ b/arch/arm/mach-mediatek/Kconfig
@@ -199,8 +199,6 @@ default "mt7629" if TARGET_MT7629 default "mt7981" if TARGET_MT7981 default "mt7986" if TARGET_MT7986 - default "mt7987" if TARGET_MT7987 - default "mt7988" if TARGET_MT7988 default "mt8183" if TARGET_MT8183 default "mt8512" if TARGET_MT8512 default "mt8516" if TARGET_MT8516
diff --git a/arch/arm/mach-mediatek/mt7988/init.c b/arch/arm/mach-mediatek/mt7988/init.c index 7f4d934..5b37a91 100644 --- a/arch/arm/mach-mediatek/mt7988/init.c +++ b/arch/arm/mach-mediatek/mt7988/init.c
@@ -6,6 +6,7 @@ #include <fdtdec.h> #include <init.h> +#include <linux/kernel.h> #include <linux/sizes.h> #include <asm/armv8/mmu.h> #include <asm/global_data.h> @@ -26,6 +27,15 @@ return 0; } +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) +{ + /* + * Limit gd->ram_top not exceeding SZ_4G. Because some peripherals like + * MMC requires DMA buffer allocated below SZ_4G. + */ + return min(gd->ram_top, SZ_4G); +} + void reset_cpu(ulong addr) { psci_system_reset();
diff --git a/arch/arm/mach-mediatek/mt8188/init.c b/arch/arm/mach-mediatek/mt8188/init.c index a48a41f..1108bc1 100644 --- a/arch/arm/mach-mediatek/mt8188/init.c +++ b/arch/arm/mach-mediatek/mt8188/init.c
@@ -20,13 +20,13 @@ return fdtdec_setup_mem_size_base(); } -phys_size_t get_effective_memsize(void) +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { /* * Limit gd->ram_top not exceeding SZ_4G. Because some peripherals like * MMC requires DMA buffer allocated below SZ_4G. */ - return min(SZ_4G - gd->ram_base, gd->ram_size); + return min(gd->ram_top, SZ_4G); } void reset_cpu(void)
diff --git a/arch/arm/mach-mediatek/mt8189/init.c b/arch/arm/mach-mediatek/mt8189/init.c index ec7587c..4435c75 100644 --- a/arch/arm/mach-mediatek/mt8189/init.c +++ b/arch/arm/mach-mediatek/mt8189/init.c
@@ -20,13 +20,13 @@ return fdtdec_setup_mem_size_base(); } -phys_size_t get_effective_memsize(void) +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { /* * Limit gd->ram_top not exceeding SZ_4G. Because some peripherals like * MMC requires DMA buffer allocated below SZ_4G. */ - return min(SZ_4G - gd->ram_base, gd->ram_size); + return min(gd->ram_top, SZ_4G); } void reset_cpu(ulong addr)
diff --git a/arch/arm/mach-mediatek/mt8195/init.c b/arch/arm/mach-mediatek/mt8195/init.c index e31d4ee..83cac9d 100644 --- a/arch/arm/mach-mediatek/mt8195/init.c +++ b/arch/arm/mach-mediatek/mt8195/init.c
@@ -20,13 +20,13 @@ return fdtdec_setup_mem_size_base(); } -phys_size_t get_effective_memsize(void) +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { /* * Limit gd->ram_top not exceeding SZ_4G. Because some peripherals like * MMC requires DMA buffer allocated below SZ_4G. */ - return min(SZ_4G - gd->ram_base, gd->ram_size); + return min(gd->ram_top, SZ_4G); } int mtk_soc_early_init(void)
diff --git a/arch/arm/mach-mediatek/mt8512/init.c b/arch/arm/mach-mediatek/mt8512/init.c index bc1d515..6a9ae77 100644 --- a/arch/arm/mach-mediatek/mt8512/init.c +++ b/arch/arm/mach-mediatek/mt8512/init.c
@@ -29,10 +29,10 @@ return fdtdec_setup_mem_size_base(); } -phys_size_t get_effective_memsize(void) +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { /* limit stack below tee reserve memory */ - return gd->ram_size - 6 * SZ_1M; + return gd->ram_base + gd->ram_size - 6 * SZ_1M; } void reset_cpu(void)
diff --git a/arch/arm/mach-mediatek/tzcfg.c b/arch/arm/mach-mediatek/tzcfg.c index c8fe8ac..fbc96d9 100644 --- a/arch/arm/mach-mediatek/tzcfg.c +++ b/arch/arm/mach-mediatek/tzcfg.c
@@ -35,12 +35,13 @@ }; static bool fix_tz_region(struct tz_reserved_region region[], - uint32_t used_regions) + uint32_t used_regions, + phys_addr_t ram_top) { phys_addr_t size; - if (region[0].addr + region[0].size > gd->ram_top) { - if (region[0].addr >= gd->ram_top) { + if (region[0].addr + region[0].size > ram_top) { + if (region[0].addr >= ram_top) { debug("Discarded region 0x%08llx, size 0x%llx\n", region[0].addr, region[0].size); @@ -50,7 +51,7 @@ return true; } - size = gd->ram_top - region[0].addr; + size = ram_top - region[0].addr; debug("Truncated region 0x%08llx, size 0x%llx -> 0x%llx\n", region[0].addr, region[0].size, size); @@ -63,12 +64,15 @@ phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { - phys_addr_t uboot_ram_top, pstore_size, uboot_size = 0; + phys_addr_t uboot_ram_top, ram_top, pstore_size = 0, uboot_size = 0; struct tz_reserved_region region[2], tmp; phys_addr_t top_addr, low_addr; struct arm_smccc_res res; u32 used_regions = 1; + /* ram_top must be <= 4GiB due to DMA limitations */ + ram_top = min_t(phys_addr_t, gd->ram_top, SZ_4G); + /* BL31 region */ arm_smccc_smc(MTK_SIP_GET_BL31_REGION, 0, 0, 0, 0, 0, 0, 0, &res); if (res.a0) { @@ -119,14 +123,14 @@ } debug("Effective memory @ 0x%08zx, size 0x%llx\n", gd->ram_base, - gd->ram_top - gd->ram_base); + ram_top - gd->ram_base); /* Discard/fix region which is outside the effective memory */ - if (fix_tz_region(region, used_regions)) { + if (fix_tz_region(region, used_regions, ram_top)) { used_regions--; if (used_regions) { - if (fix_tz_region(region, used_regions)) + if (fix_tz_region(region, used_regions, ram_top)) used_regions--; } } @@ -144,7 +148,7 @@ uboot_size += U_BOOT_MIN_STACK_SIZE + REGION_ALIGNMENT - 1; uboot_size &= ~(REGION_ALIGNMENT - 1); - uboot_ram_top = gd->ram_top & ~(REGION_ALIGNMENT - 1); + uboot_ram_top = ram_top & ~(REGION_ALIGNMENT - 1); if (!used_regions || (uboot_ram_top - region[0].addr - region[0].size >= uboot_size)) {
diff --git a/board/mediatek/mt7987/MAINTAINERS b/board/mediatek/mt7987/MAINTAINERS index c257d0b..b245174 100644 --- a/board/mediatek/mt7987/MAINTAINERS +++ b/board/mediatek/mt7987/MAINTAINERS
@@ -2,7 +2,6 @@ M: Sam Shih <sam.shih@mediatek.com> S: Maintained F: board/mediatek/mt7987 -F: include/configs/mt7987.h F: configs/mt7987_rfb_defconfig F: configs/mt7987_emmc_rfb_defconfig F: configs/mt7987_sd_rfb_defconfig
diff --git a/board/mediatek/mt7988/MAINTAINERS b/board/mediatek/mt7988/MAINTAINERS index a45bfff..c7e3034 100644 --- a/board/mediatek/mt7988/MAINTAINERS +++ b/board/mediatek/mt7988/MAINTAINERS
@@ -2,6 +2,5 @@ M: Sam Shih <sam.shih@mediatek.com> S: Maintained F: board/mediatek/mt7988 -F: include/configs/mt7988.h F: configs/mt7988_rfb_defconfig F: configs/mt7988_sd_rfb_defconfig
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 24bd16a..6c51332 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig
@@ -858,6 +858,7 @@ bool "MediaTek SD/MMC Card Interface support" depends on ARCH_MEDIATEK || ARCH_MTMIPS || ARCH_AIROHA depends on OF_CONTROL + imply LMB_LIMIT_DMA_BELOW_RAM_TOP help This selects the MediaTek(R) Secure digital and Multimedia card Interface. If you have a machine with a integrated SD/MMC card reader, say Y here.
diff --git a/drivers/net/mtk_eth/Kconfig b/drivers/net/mtk_eth/Kconfig index 5d4e54a..7d58f54 100644 --- a/drivers/net/mtk_eth/Kconfig +++ b/drivers/net/mtk_eth/Kconfig
@@ -5,6 +5,7 @@ select PHYLIB select DM_GPIO select DM_RESET + select LMB_LIMIT_DMA_BELOW_RAM_TOP help This Driver support MediaTek Ethernet GMAC Say Y to enable support for the MediaTek Ethernet GMAC.
diff --git a/dts/upstream/src/arm64/mediatek/mt6359.dtsi b/dts/upstream/src/arm64/mediatek/mt6359.dtsi index 467d8a4..45ad69e 100644 --- a/dts/upstream/src/arm64/mediatek/mt6359.dtsi +++ b/dts/upstream/src/arm64/mediatek/mt6359.dtsi
@@ -205,7 +205,7 @@ regulator-max-microvolt = <1700000>; }; mt6359_vrfck_1_ldo_reg: ldo_vrfck_1 { - regulator-name = "vrfck"; + regulator-name = "vrfck_1"; regulator-min-microvolt = <1240000>; regulator-max-microvolt = <1600000>; }; @@ -227,7 +227,7 @@ regulator-max-microvolt = <3300000>; }; mt6359_vemc_1_ldo_reg: ldo_vemc_1 { - regulator-name = "vemc"; + regulator-name = "vemc_1"; regulator-min-microvolt = <2500000>; regulator-max-microvolt = <3300000>; };
diff --git a/include/configs/mt7987.h b/include/configs/mt7987.h deleted file mode 100644 index 18ed3c7..0000000 --- a/include/configs/mt7987.h +++ /dev/null
@@ -1,14 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Configuration for MediaTek MT7987 SoC - * - * Copyright (C) 2025 MediaTek Inc. - * Author: Sam Shih <sam.shih@mediatek.com> - */ - -#ifndef __MT7987_H -#define __MT7987_H - -#define CFG_MAX_MEM_MAPPED 0xC0000000 - -#endif
diff --git a/include/configs/mt7988.h b/include/configs/mt7988.h deleted file mode 100644 index e63825a..0000000 --- a/include/configs/mt7988.h +++ /dev/null
@@ -1,14 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Configuration for MediaTek MT7988 SoC - * - * Copyright (C) 2022 MediaTek Inc. - * Author: Sam Shih <sam.shih@mediatek.com> - */ - -#ifndef __MT7988_H -#define __MT7988_H - -#define CFG_MAX_MEM_MAPPED 0xC0000000 - -#endif