| /* | |
| * U-boot - Configuration file for BF561 EZKIT board | |
| */ | |
| #ifndef __CONFIG_BF561_EZKIT_H__ | |
| #define __CONFIG_BF561_EZKIT_H__ | |
| #include <asm/config-pre.h> | |
| /* | |
| * Processor Settings | |
| */ | |
| #define CONFIG_BFIN_CPU bf561-0.3 | |
| #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS | |
| /* | |
| * Clock Settings | |
| * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV | |
| * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV | |
| */ | |
| /* CONFIG_CLKIN_HZ is any value in Hz */ | |
| #define CONFIG_CLKIN_HZ 30000000 | |
| /* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ | |
| /* 1 = CLKIN / 2 */ | |
| #define CONFIG_CLKIN_HALF 0 | |
| /* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ | |
| /* 1 = bypass PLL */ | |
| #define CONFIG_PLL_BYPASS 0 | |
| /* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ | |
| /* Values can range from 0-63 (where 0 means 64) */ | |
| #define CONFIG_VCO_MULT 20 | |
| /* CCLK_DIV controls the core clock divider */ | |
| /* Values can be 1, 2, 4, or 8 ONLY */ | |
| #define CONFIG_CCLK_DIV 1 | |
| /* SCLK_DIV controls the system clock divider */ | |
| /* Values can range from 1-15 */ | |
| #define CONFIG_SCLK_DIV 6 | |
| /* | |
| * Memory Settings | |
| */ | |
| #define CONFIG_MEM_ADD_WDTH 9 | |
| #define CONFIG_MEM_SIZE 64 | |
| #define CONFIG_EBIU_SDRRC_VAL 0x306 | |
| #define CONFIG_EBIU_SDGCTL_VAL 0x91114d | |
| #define CONFIG_EBIU_AMGCTL_VAL 0x3F | |
| #define CONFIG_EBIU_AMBCTL0_VAL 0x7BB07BB0 | |
| #define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0 | |
| #define CONFIG_SYS_MONITOR_LEN (256 * 1024) | |
| #define CONFIG_SYS_MALLOC_LEN (128 * 1024) | |
| /* | |
| * Network Settings | |
| */ | |
| #define ADI_CMDS_NETWORK 1 | |
| #define CONFIG_SMC91111 1 | |
| #define CONFIG_SMC91111_BASE 0x2C010300 | |
| #define CONFIG_SMC_USE_32_BIT 1 | |
| #define CONFIG_HOSTNAME bf561-ezkit | |
| /* Uncomment next line to use fixed MAC address */ | |
| /* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */ | |
| /* | |
| * Flash Settings | |
| */ | |
| #define CONFIG_SYS_FLASH_CFI | |
| #define CONFIG_FLASH_CFI_DRIVER | |
| #define CONFIG_SYS_FLASH_CFI_AMD_RESET | |
| #define CONFIG_SYS_FLASH_BASE 0x20000000 | |
| #define CONFIG_SYS_MAX_FLASH_BANKS 1 | |
| #define CONFIG_SYS_MAX_FLASH_SECT 135 | |
| /* The BF561-EZKIT uses a top boot flash */ | |
| #define CONFIG_ENV_IS_IN_FLASH 1 | |
| #define CONFIG_ENV_OFFSET (0x800000 - CONFIG_ENV_SECT_SIZE) | |
| #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) | |
| #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE | |
| #define CONFIG_ENV_SECT_SIZE 0x2000 | |
| /* | |
| * I2C Settings | |
| */ | |
| #define CONFIG_SOFT_I2C | |
| #define CONFIG_SOFT_I2C_GPIO_SCL GPIO_PF0 | |
| #define CONFIG_SOFT_I2C_GPIO_SDA GPIO_PF1 | |
| /* | |
| * Misc Settings | |
| */ | |
| #define CONFIG_UART_CONSOLE 0 | |
| /* | |
| * Pull in common ADI header for remaining command/environment setup | |
| */ | |
| #include <configs/bfin_adi_common.h> | |
| #endif |