| /* | |
| * Copyright (C) 2011 Samsung Electronics | |
| * | |
| * Configuration settings for the SAMSUNG SMDK5250 (EXYNOS5250) board. | |
| * | |
| * See file CREDITS for list of people who contributed to this | |
| * project. | |
| * | |
| * This program is free software; you can redistribute it and/or | |
| * modify it under the terms of the GNU General Public License as | |
| * published by the Free Software Foundation; either version 2 of | |
| * the License, or (at your option) any later version. | |
| * | |
| * This program is distributed in the hope that it will be useful, | |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| * GNU General Public License for more details. | |
| * | |
| * You should have received a copy of the GNU General Public License | |
| * along with this program; if not, write to the Free Software | |
| * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
| * MA 02111-1307 USA | |
| */ | |
| #ifndef __CONFIG_H | |
| #define __CONFIG_H | |
| /* High Level Configuration Options */ | |
| #define CONFIG_SAMSUNG /* in a SAMSUNG core */ | |
| #define CONFIG_S5P /* S5P Family */ | |
| #define CONFIG_EXYNOS5 /* which is in a Exynos5 Family */ | |
| #define CONFIG_SMDK5250 /* which is in a SMDK5250 */ | |
| #include <asm/arch/cpu.h> /* get chip and board defs */ | |
| #define CONFIG_ARCH_CPU_INIT | |
| #define CONFIG_DISPLAY_CPUINFO | |
| #define CONFIG_DISPLAY_BOARDINFO | |
| /* Keep L2 Cache Disabled */ | |
| #define CONFIG_SYS_DCACHE_OFF | |
| #define CONFIG_SYS_SDRAM_BASE 0x40000000 | |
| #define CONFIG_SYS_TEXT_BASE 0x43E00000 | |
| /* input clock of PLL: SMDK5250 has 24MHz input clock */ | |
| #define CONFIG_SYS_CLK_FREQ 24000000 | |
| #define CONFIG_SETUP_MEMORY_TAGS | |
| #define CONFIG_CMDLINE_TAG | |
| #define CONFIG_INITRD_TAG | |
| #define CONFIG_CMDLINE_EDITING | |
| /* MACH_TYPE_SMDK5250 macro will be removed once added to mach-types */ | |
| #define MACH_TYPE_SMDK5250 3774 | |
| #define CONFIG_MACH_TYPE MACH_TYPE_SMDK5250 | |
| /* Power Down Modes */ | |
| #define S5P_CHECK_SLEEP 0x00000BAD | |
| #define S5P_CHECK_DIDLE 0xBAD00000 | |
| #define S5P_CHECK_LPA 0xABAD0000 | |
| /* Offset for inform registers */ | |
| #define INFORM0_OFFSET 0x800 | |
| #define INFORM1_OFFSET 0x804 | |
| /* Size of malloc() pool */ | |
| #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20)) | |
| /* select serial console configuration */ | |
| #define CONFIG_SERIAL_MULTI | |
| #define CONFIG_SERIAL3 /* use SERIAL 3 */ | |
| #define CONFIG_BAUDRATE 115200 | |
| #define EXYNOS5_DEFAULT_UART_OFFSET 0x010000 | |
| #define TZPC_BASE_OFFSET 0x10000 | |
| /* SD/MMC configuration */ | |
| #define CONFIG_GENERIC_MMC | |
| #define CONFIG_MMC | |
| #define CONFIG_SDHCI | |
| #define CONFIG_S5P_SDHCI | |
| #define CONFIG_BOARD_EARLY_INIT_F | |
| /* PWM */ | |
| #define CONFIG_PWM | |
| /* allow to overwrite serial and ethaddr */ | |
| #define CONFIG_ENV_OVERWRITE | |
| /* Command definition*/ | |
| #include <config_cmd_default.h> | |
| #define CONFIG_CMD_PING | |
| #define CONFIG_CMD_ELF | |
| #define CONFIG_CMD_MMC | |
| #define CONFIG_CMD_EXT2 | |
| #define CONFIG_CMD_FAT | |
| #define CONFIG_CMD_NET | |
| #define CONFIG_BOOTDELAY 3 | |
| #define CONFIG_ZERO_BOOTDELAY_CHECK | |
| /* USB */ | |
| #define CONFIG_CMD_USB | |
| #define CONFIG_USB_EHCI | |
| #define CONFIG_USB_EHCI_EXYNOS | |
| #define CONFIG_USB_STORAGE | |
| /* MMC SPL */ | |
| #define CONFIG_SPL | |
| #define COPY_BL2_FNPTR_ADDR 0x02020030 | |
| /* specific .lds file */ | |
| #define CONFIG_SPL_LDSCRIPT "board/samsung/smdk5250/smdk5250-uboot-spl.lds" | |
| #define CONFIG_SPL_TEXT_BASE 0x02023400 | |
| #define CONFIG_SPL_MAX_SIZE (14 * 1024) | |
| #define CONFIG_BOOTCOMMAND "mmc read 40007000 451 2000; bootm 40007000" | |
| /* Miscellaneous configurable options */ | |
| #define CONFIG_SYS_LONGHELP /* undef to save memory */ | |
| #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ | |
| #define CONFIG_SYS_PROMPT "SMDK5250 # " | |
| #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ | |
| #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ | |
| #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ | |
| #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" | |
| /* Boot Argument Buffer Size */ | |
| #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
| /* memtest works on */ | |
| #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE | |
| #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5E00000) | |
| #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000) | |
| #define CONFIG_SYS_HZ 1000 | |
| #define CONFIG_RD_LVL | |
| #define CONFIG_NR_DRAM_BANKS 8 | |
| #define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ | |
| #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE | |
| #define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE | |
| #define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) | |
| #define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE | |
| #define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE)) | |
| #define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE | |
| #define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE)) | |
| #define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE | |
| #define PHYS_SDRAM_5 (CONFIG_SYS_SDRAM_BASE + (4 * SDRAM_BANK_SIZE)) | |
| #define PHYS_SDRAM_5_SIZE SDRAM_BANK_SIZE | |
| #define PHYS_SDRAM_6 (CONFIG_SYS_SDRAM_BASE + (5 * SDRAM_BANK_SIZE)) | |
| #define PHYS_SDRAM_6_SIZE SDRAM_BANK_SIZE | |
| #define PHYS_SDRAM_7 (CONFIG_SYS_SDRAM_BASE + (6 * SDRAM_BANK_SIZE)) | |
| #define PHYS_SDRAM_7_SIZE SDRAM_BANK_SIZE | |
| #define PHYS_SDRAM_8 (CONFIG_SYS_SDRAM_BASE + (7 * SDRAM_BANK_SIZE)) | |
| #define PHYS_SDRAM_8_SIZE SDRAM_BANK_SIZE | |
| #define CONFIG_SYS_MONITOR_BASE 0x00000000 | |
| /* FLASH and environment organization */ | |
| #define CONFIG_SYS_NO_FLASH | |
| #undef CONFIG_CMD_IMLS | |
| #define CONFIG_IDENT_STRING " for SMDK5250" | |
| #define CONFIG_ENV_IS_IN_MMC | |
| #define CONFIG_SYS_MMC_ENV_DEV 0 | |
| #define CONFIG_SECURE_BL1_ONLY | |
| /* Secure FW size configuration */ | |
| #ifdef CONFIG_SECURE_BL1_ONLY | |
| #define CONFIG_SEC_FW_SIZE (8 << 10) /* 8KB */ | |
| #else | |
| #define CONFIG_SEC_FW_SIZE 0 | |
| #endif | |
| /* Configuration of BL1, BL2, ENV Blocks on mmc */ | |
| #define CONFIG_RES_BLOCK_SIZE (512) | |
| #define CONFIG_BL1_SIZE (16 << 10) /*16 K reserved for BL1*/ | |
| #define CONFIG_BL2_SIZE (512UL << 10UL) /* 512 KB */ | |
| #define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */ | |
| #define CONFIG_BL1_OFFSET (CONFIG_RES_BLOCK_SIZE + CONFIG_SEC_FW_SIZE) | |
| #define CONFIG_BL2_OFFSET (CONFIG_BL1_OFFSET + CONFIG_BL1_SIZE) | |
| #define CONFIG_ENV_OFFSET (CONFIG_BL2_OFFSET + CONFIG_BL2_SIZE) | |
| /* U-boot copy size from boot Media to DRAM.*/ | |
| #define BL2_START_OFFSET (CONFIG_BL2_OFFSET/512) | |
| #define BL2_SIZE_BLOC_COUNT (CONFIG_BL2_SIZE/512) | |
| #define CONFIG_DOS_PARTITION | |
| #define CONFIG_IRAM_STACK 0x02050000 | |
| #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000) | |
| /* I2C */ | |
| #define CONFIG_SYS_I2C_INIT_BOARD | |
| #define CONFIG_HARD_I2C | |
| #define CONFIG_CMD_I2C | |
| #define CONFIG_SYS_I2C_SPEED 100000 /* 100 Kbps */ | |
| #define CONFIG_DRIVER_S3C24X0_I2C | |
| #define CONFIG_I2C_MULTI_BUS | |
| #define CONFIG_MAX_I2C_NUM 8 | |
| #define CONFIG_SYS_I2C_SLAVE 0x0 | |
| /* Ethernet Controllor Driver */ | |
| #ifdef CONFIG_CMD_NET | |
| #define CONFIG_SMC911X | |
| #define CONFIG_SMC911X_BASE 0x5000000 | |
| #define CONFIG_SMC911X_16_BIT | |
| #define CONFIG_ENV_SROM_BANK 1 | |
| #endif /*CONFIG_CMD_NET*/ | |
| /* Enable devicetree support */ | |
| #define CONFIG_OF_LIBFDT | |
| #endif /* __CONFIG_H */ |