| /* SPDX-License-Identifier: GPL-2.0+ */ | |
| /* | |
| * Copyright 2019 NXP | |
| */ | |
| #ifndef __IMX8MP_EVK_H | |
| #define __IMX8MP_EVK_H | |
| #include <linux/sizes.h> | |
| #include <linux/stringify.h> | |
| #include <asm/arch/imx-regs.h> | |
| #define CFG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) | |
| #if defined(CONFIG_CMD_NET) | |
| #define CFG_FEC_MXC_PHYADDR 1 | |
| #endif | |
| /* Link Definitions */ | |
| #define CFG_SYS_INIT_RAM_ADDR 0x40000000 | |
| #define CFG_SYS_INIT_RAM_SIZE 0x80000 | |
| /* Totally 6GB DDR */ | |
| #define CFG_SYS_SDRAM_BASE 0x40000000 | |
| #define PHYS_SDRAM 0x40000000 | |
| #define PHYS_SDRAM_SIZE 0xC0000000 /* 3 GB */ | |
| #define PHYS_SDRAM_2 0x100000000 | |
| #define PHYS_SDRAM_2_SIZE 0xC0000000 /* 3 GB */ | |
| #endif |